Product Folder Sample & Buy Support & Community Tools & Software Technical Documents SN54HC02, SN74HC02 SCLS076F – DECEMBER 1982 – REVISED APRIL 2015 SNx4HC02 Quadruple 2-Input Positive-NOR Gates 1 Features 3 Description • • • • • • The SNx4HC02 devices contain four independent 2input NOR gates. They perform the Boolean function Y = A + B or Y = A • B in positive logic. 1 Wide Operating Voltage Range of 2 V to 6 V Outputs Can Drive Up to 10 LSTTL Loads Low Power Consumption: Maximum ICC of 20 µA Typical tpd = 8 ns ±4-mA Output Drive at 5 V Low Input Current of 1-µA Maximum Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) SN74HC02D SOIC (14) 4.90 mm × 3.91 mm SN74HC02N PDIP (14) 19.30 mm × 6.35 mm 2 Applications SN74HC02PW TSSOP (14) 5.00 mm × 4.40 mm • • • • • • • • • • • SN74HC02NS SO (14) 10.30 mm × 5.30 mm SN74HC02DB SSOP (14) 6.20 mm × 5.30 mm SN54HC02J CDIP (14) 19.94 mm × 7.62 mm SN54HC02W CFP (14) 9.21 mm × 7.11 mm SN54HC02FK LCCC (20) 8.89 mm × 8.89 mm Education Toys Musical Instruments Medical Healthcare and Fitness Grid Infrastructure Electronic Point of Sale Test and Measurement Factory Automation and Control Building Automation RS Latch Falling Edge Detector (1) For all available packages, see the orderable addendum at the end of the data sheet. SNx4HC02 Functional Block Diagram 1Y 1 14 V CC 1A 2 13 4Y 1B 3 12 4B 2Y 4 11 4A 2A 5 10 3Y 2B 6 9 3B GND 7 8 3A Copyright © 2016, Texas Instruments Incorporated 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. SN54HC02, SN74HC02 SCLS076F – DECEMBER 1982 – REVISED APRIL 2015 www.ti.com Table of Contents 1 2 3 4 5 6 7 8 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 4 4 4 5 5 5 6 6 6 Absolute Maximum Ratings ...................................... ESD Ratings – SN74HC02 ....................................... Recommended Operating Conditions....................... Thermal Information – SN74HC02............................ Thermal Information – SN54HC02............................ Electrical Characteristics........................................... Switching Characteristics .......................................... Operating Characteristics.......................................... Typical Characteristics .............................................. Parameter Measurement Information .................. 7 Detailed Description .............................................. 8 8.1 Overview ................................................................... 8 8.2 Functional Block Diagram ......................................... 8 8.3 Feature Description................................................... 8 8.4 Device Functional Modes.......................................... 8 9 Application and Implementation ........................ 10 9.1 Application Information............................................ 10 9.2 Typical Application ................................................. 10 10 Power Supply Recommendations ..................... 11 11 Layout................................................................... 11 11.1 Layout Guidelines ................................................. 11 11.2 Layout Example .................................................... 11 12 Device and Documentation Support ................. 12 12.1 12.2 12.3 12.4 12.5 12.6 Documentation Support ........................................ Related Links ........................................................ Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 12 12 12 12 12 12 13 Mechanical, Packaging, and Orderable Information ........................................................... 12 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision E (August 2003) to Revision F Page • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1 • Removed ordering information. .............................................................................................................................................. 1 2 Submit Documentation Feedback Copyright © 1982–2015, Texas Instruments Incorporated Product Folder Links: SN54HC02 SN74HC02 SN54HC02, SN74HC02 www.ti.com SCLS076F – DECEMBER 1982 – REVISED APRIL 2015 5 Pin Configuration and Functions D, DB, N, NS, PW, J, or W Package 14-Pin SOIC, SSOP, PDIP, SO, TSSOP, CDIP, or CFP Top View 1Y 1 14 VCC 1A 2 13 4Y 1B 3 12 4B 2Y 4 11 4A 2A 5 10 FK Package 20-Pin LCCC Top View 1A 1Y NC VCC 4Y 3 2 1 20 19 1B 4 18 4B NC 5 17 NC 2Y 6 16 4A NC 7 15 NC 2A 8 14 3Y Submit Documentation Feedback 3 3Y 2B 6 9 3B GND 7 8 3A 9 10 11 12 13 2B GND NC 3A 3B Pin Functions PIN SOIC, SSOP, PDIP, SO, TSSOP, CDIP, CFP LCCC 1Y 1 2 O Gate 1 output 1A 2 3 I Gate 1 input A 1B 3 4 I Gate 1 input B 2Y 4 6 O Gate 2 output 2A 5 8 I Gate 2 input A 2B 6 9 I Gate 2 input B GND 7 10 — 3A 8 12 I Gate 3 input A 3B 9 13 I Gate 3 input B 3Y 10 14 O Gate 3 output 4A 11 16 I Gate 4 input A 4B 12 18 I Gate 4 input B 4Y 13 19 O Gate 4 output VCC 14 20 — Power pin NC — 1, 5, 7, 11, 15, 17 — No internal connection NAME I/O DESCRIPTION Ground Pin Copyright © 1982–2015, Texas Instruments Incorporated Product Folder Links: SN54HC02 SN74HC02 SN54HC02, SN74HC02 SCLS076F – DECEMBER 1982 – REVISED APRIL 2015 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) VCC Supply voltage (2) MIN MAX UNIT –0.5 7 V IIK Input clamp current VI < 0 or VI > VCC ±20 mA IOK Output clamp current (2) VO < 0 or VO > VCC ±20 mA IO Continuous output current VO = 0 to VCC ±25 mA Continuous current through VCC or GND ±50 mA Tj Operating virtual junction temperature 150 °C Tstg Storage temperature 150 °C (1) (2) –65 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 6.2 ESD Ratings – SN74HC02 VALUE V(ESD) (1) (2) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) UNIT ±1500 Charged-device model (CDM), per JEDEC specification JESD22-C101 (2) V ±2000 JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions See (1) . VCC MIN NOM MAX 2 5 6 Supply voltage VCC = 2 V VIH High-level input voltage VCC = 4.5 V VCC = 6 V Low-level input voltage 3.15 Input voltage VO Output voltage 0.5 VCC = 4.5 V 1.35 TA (1) 4 Input transition rise and fall time Operating free-air temperature V 1.8 0 0 VCC = 2 V ∆t/∆v V 4.2 VCC = 6 V VI V 1.5 VCC = 2 V VIL UNIT VCC V VCC V 1000 VCC = 4.5 V 500 VCC = 6 V 400 SN54HC02 –55 125 SN74HC02 –40 85 ns/V °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. See the TI application report, Implications of Slow or Floating CMOS Inputs, SCBA004. Submit Documentation Feedback Copyright © 1982–2015, Texas Instruments Incorporated Product Folder Links: SN54HC02 SN74HC02 SN54HC02, SN74HC02 www.ti.com SCLS076F – DECEMBER 1982 – REVISED APRIL 2015 6.4 Thermal Information – SN74HC02 SN74HC02 THERMAL METRIC (1) D (SOIC) DB (SSOP) N (PDIP) NS (SO) PW (TSSOP) UNIT 14 PINS 14 PINS 14 PINS 14 PINS 14 PINS RθJA Junction-to-ambient thermal resistance (1) 94 105.4 54.9 88.8 119.6 °C/W RθJC(top) Junction-to-case (top) thermal resistance 53.2 57.3 42.5 46.5 48.4 °C/W RθJB Junction-to-board thermal resistance 48.7 52.7 34.7 47.6 61.3 °C/W ψJT Junction-to-top characterization parameter 15.6 22.6 27.9 16.8 5.6 °C/W ψJB Junction-to-board characterization parameter 48.4 52.2 34.6 47.2 60.7 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. 6.5 Thermal Information – SN54HC02 SN54HC02 THERMAL METRIC (1) J (CDIP) W (CFP) FK (LCCC) UNIT 14 PINS 14 PINS 20 PINS RθJC(top) Junction-to-case (top) thermal resistance 53.8 89.6 61.1 °C/W RθJB Junction-to-board thermal resistance 73.1 164.1 59.8 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance 26.7 15.5 11.7 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. 6.6 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = –20 µA VCC MIN TYP 2V TA 1.9 1.998 4.5 V 4.4 4.499 6V 5.9 5.999 3.98 4.3 TA = 25°C VOH VI = VIH or VIL IOH = –4 mA IOH = –5.2 mA IOL = 20 µA 4.5 V 6V SN54HC02 3.7 SN74HC02 3.84 TA = 25°C 5.48 SN54HC02 5.2 SN74HC02 5.34 VI = VIH or VIL IOL = 4 mA 5.8 2V 0.002 0.1 0.001 0.1 TA = 25°C 4.5 V 0.001 0.1 0.17 0.26 SN54HC02 0.4 SN74HC02 TA = 25°C IOL = 5.2 mA 6V 0.26 0.4 SN74HC02 0.33 ±0.1 ±100 II VI = VCC or 0 6V SN54HC02, SN74HC02 TA = 25°C 2 ICC VI = VCC or 0, IO = 0 6V SN54HC02 40 SN74HC02 20 Ci 2 V to 6 V Copyright © 1982–2015, Texas Instruments Incorporated Product Folder Links: SN54HC02 SN74HC02 V 0.33 0.15 SN54HC02 TA = 25°C UNIT V 4.5 V 6V VOL MAX ±1000 3 10 Submit Documentation Feedback nA µA pF 5 SN54HC02, SN74HC02 SCLS076F – DECEMBER 1982 – REVISED APRIL 2015 www.ti.com 6.7 Switching Characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 2) FROM (INPUT) PARAMETER TO (OUTPUT) VCC TA MIN TYP 2V SN54HC02 135 SN74HC02 115 TA = 25°C 45 TA = 25°C tpd A or B Y 4.5 V 9 27 23 8 38 SN54HC02 95 TA = 25°C Y 4.5 V 8 15 SN54HC02 22 SN74HC02 19 TA = 25°C 6V 75 110 SN74HC02 A or B 15 20 TA = 25°C tt ns 23 SN74HC02 2V 18 SN74HC02 SN54HC02 UNIT 90 SN54HC02 TA = 25°C 6V MAX 6 ns 13 SN54HC02 19 SN74HC02 16 6.8 Operating Characteristics TA = 25°C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance per gate No load TYP 22 UNIT pF 6.9 Typical Characteristics 80 tt (max)(ns) 70 60 TA = 25oC CL = 50 pF 40 20 10 0 2 4 5 6 Vcc Figure 1. tt vs VCC 6 Submit Documentation Feedback Copyright © 1982–2015, Texas Instruments Incorporated Product Folder Links: SN54HC02 SN74HC02 SN54HC02, SN74HC02 www.ti.com SCLS076F – DECEMBER 1982 – REVISED APRIL 2015 7 Parameter Measurement Information From Output Under Test Test Point Input VCC 50% 50% 0V CL = 50 pF (see Note A) tPLH In-Phase Output LOAD CIRCUIT tPHL 90% 50% 10% 90% tr Input 50% 10% 90% tPHL VCC 90% 50% 10% 0 V tr Out-of-Phase Output tPLH 90% 50% 10% tf VOLTAGE WAVEFORM INPUT RISE AND FALL TIMES VOH 50% 10% VOL tf 50% 10% 90% tf VOH VOL tr VOLTAGE WAVEFORMS PROPAGATION DELAY AND OUTPUT TRANSITION TIMES A. CL includes probe and test-fixture capacitance. B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns. C. The outputs are measured one at a time with one input transition per measurement. D. tPLH and tPHL are the same as tpd. Figure 2. Load Circuit and Voltage Waveforms Copyright © 1982–2015, Texas Instruments Incorporated Product Folder Links: SN54HC02 SN74HC02 Submit Documentation Feedback 7 SN54HC02, SN74HC02 SCLS076F – DECEMBER 1982 – REVISED APRIL 2015 www.ti.com 8 Detailed Description 8.1 Overview The SNx4HC02 devices are quad 2-input NOR gates. These devices are members of the High-Speed CMOS (HC) logic family. The HC family of logic is optimized to operate with a 5-V supply, is low noise without characteristic overshoot and undershoot, has low power consumption, small propagation delay, balanced propagation delay and transition times, and operates over a wide temperature range. 8.2 Functional Block Diagram 1Y 1 14 V CC 1A 2 13 4Y 1B 3 12 4B 2Y 4 11 4A 2A 5 10 3Y 2B 6 9 3B GND 7 8 3A Copyright © 2016, Texas Instruments Incorporated 8.3 Feature Description 8.3.1 Operating Voltage Range The SNx4HC series of devices offer a wide operating voltage range from 2 V to 6 V. 8.3.2 LSTTL Loads The outputs of the SNx4HC series can drive up to 10 LSTTL loads. 8.3.3 Low Power Consumption The SNx4HC02 offers low power consumption of 20 μA maximum. 8.3.4 Output Drive Capability At 5 V, the outputs have ±4 mA of output drive capability. 8.3.5 Low Input Current Leakage Inputs have low input current leakage of 1 μA maximum. 8.4 Device Functional Modes Table 1 lists the functional modes of the SNx4HC02. Table 1. Function Table INPUTS B OUTPUT Y H X L X H L L L H A 8 Submit Documentation Feedback Copyright © 1982–2015, Texas Instruments Incorporated Product Folder Links: SN54HC02 SN74HC02 SN54HC02, SN74HC02 www.ti.com SCLS076F – DECEMBER 1982 – REVISED APRIL 2015 A Y B Figure 3. Logic Diagram (Positive Logic) Copyright © 1982–2015, Texas Instruments Incorporated Product Folder Links: SN54HC02 SN74HC02 Submit Documentation Feedback 9 SN54HC02, SN74HC02 SCLS076F – DECEMBER 1982 – REVISED APRIL 2015 www.ti.com 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information The SNX4HC02 is a low-drive CMOS device that can be used for a multitude of NOR type functions. The device can produce 4 mA of drive current at 5 V, making it Ideal for driving multiple outputs and good for low-noise applications. This application is for using a single SNX4HC02 as a falling edge detector circuit. The edge detector operates by using the inherent propagation delay from input to output of each device stage. In steady-state, the inputs to the output stage will always be different, and thus the output will always be low. Only during the brief time when both inputs are low (that is, immediately following a falling edge on VIN), the output will be high. 9.2 Typical Application VIN VOUT Copyright © 2016, Texas Instruments Incorporated Figure 4. Falling Edge Detector Schematic 9.2.1 Design Requirements This device uses CMOS technology and has balanced output drive. Take care to avoid bus contention because it can drive currents that would exceed maximum limits. The high drive also creates fast edges into light loads, so routing and load conditions must be considered to prevent ringing. The output pulse time will be approximately three times tpd from Switching Characteristics for the selected VCC, device, and temperature range. 9.2.2 Detailed Design Procedure 1. Recommended Input Conditions – For rise time and fall time specifications, see Δt/ΔV in Recommended Operating Conditions. – For specified high and low levels, see VIH and VIL in Recommended Operating Conditions. – Inputs are not overvoltage tolerant, allowing them to go as high as VCC. 2. Recommend Output Conditions – Load currents must not exceed 20 mA per output and 50 mA total for the part. – Outputs must not be pulled above VCC. 10 Submit Documentation Feedback Copyright © 1982–2015, Texas Instruments Incorporated Product Folder Links: SN54HC02 SN74HC02 SN54HC02, SN74HC02 www.ti.com SCLS076F – DECEMBER 1982 – REVISED APRIL 2015 Typical Application (continued) 9.2.3 Application Curve Typical Output Pulse Length (ns) 150 125 100 75 50 25 0 1.5 2 2.5 3 3.5 4 4.5 5 5.5 Supply Voltage (V) 6 6.5 C001 Figure 5. Typical Output Pulse Length Over VCC Range 10 Power Supply Recommendations The power supply can be any voltage between the minimum and maximum supply voltage rating located in Recommended Operating Conditions. Each VCC pin must have a good bypass capacitor to prevent power disturbance. For devices with a single supply, TI recommends a 0.1-μF bypass capacitor. If there are multiple VCC pins, TI recommends a 0.01-μF or 0.022-μF bypass capacitors for each power pin. It is acceptable to parallel multiple bypass capacitors to reject different frequencies of noise. Two bypass capacitors of value 0.1 μF and 1 μF are commonly used in parallel. For best results, install the bypass capacitor(s) as close to the power pin as possible. 11 Layout 11.1 Layout Guidelines When using multiple bit logic devices, inputs must not float. In many cases, functions or parts of functions of digital logic devices are unused. Some examples are when only two inputs of a triple-input AND gate are used, or when only 3 of the 4-buffer gates are used. Such input pins must not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. Specified in Absolute Maximum Ratings are rules that must be observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating. The logic level that must be applied to any particular unused input depends on the function of the device. Generally they will be tied to GND or VCC, whichever makes more sense or is more convenient. It is acceptable to float outputs unless the part is a transceiver. If the transceiver has an output enable pin, it will disable the outputs section of the part when asserted. This will not disable the input section of the I/Os so they also cannot float when disabled. 11.2 Layout Example Figure 6. Layout Recommendation Copyright © 1982–2015, Texas Instruments Incorporated Product Folder Links: SN54HC02 SN74HC02 Submit Documentation Feedback 11 SN54HC02, SN74HC02 SCLS076F – DECEMBER 1982 – REVISED APRIL 2015 www.ti.com 12 Device and Documentation Support 12.1 Documentation Support 12.1.1 Related Documentation For related documentation, see the following: Implications of Slow or Floating CMOS Inputs, SCBA004 12.2 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 2. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY SN54HC02 Click here Click here Click here Click here Click here SN74HC02 Click here Click here Click here Click here Click here 12.3 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 12.4 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 12.5 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 12.6 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 12 Submit Documentation Feedback Copyright © 1982–2015, Texas Instruments Incorporated Product Folder Links: SN54HC02 SN74HC02 PACKAGE OPTION ADDENDUM www.ti.com 17-Dec-2015 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) 5962-8404101VCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8404101VC A SNV54HC02J 84041012A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 84041012A SNJ54HC 02FK 8404101CA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 8404101CA SNJ54HC02J 8404101DA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 8404101DA SNJ54HC02W JM38510/65101B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/ 65101B2A JM38510/65101BCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 65101BCA JM38510/65101BDA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 65101BDA M38510/65101B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/ 65101B2A M38510/65101BCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 65101BCA M38510/65101BDA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 65101BDA SN54HC02J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 SN54HC02J SN74HC02D ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC02 SN74HC02DBLE OBSOLETE SSOP DB 14 TBD Call TI Call TI -40 to 85 SN74HC02DBR ACTIVE SSOP DB 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC02 SN74HC02DE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC02 SN74HC02DG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC02 SN74HC02DR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 HC02 Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 17-Dec-2015 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) SN74HC02DRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC02 SN74HC02DRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC02 SN74HC02DT ACTIVE SOIC D 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC02 SN74HC02DTE4 ACTIVE SOIC D 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC02 SN74HC02N ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU | CU SN N / A for Pkg Type -40 to 85 SN74HC02N SN74HC02N3 OBSOLETE PDIP N 14 TBD Call TI Call TI -40 to 85 SN74HC02NE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 SN74HC02N SN74HC02NSR ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC02 SN74HC02NSRG4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC02 SN74HC02PW ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC02 SN74HC02PWG4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC02 SN74HC02PWLE OBSOLETE TSSOP PW 14 TBD Call TI Call TI -40 to 85 SN74HC02PWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 HC02 SN74HC02PWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC02 SN74HC02PWT ACTIVE TSSOP PW 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC02 SNJ54HC02FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 84041012A SNJ54HC 02FK SNJ54HC02J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 8404101CA SNJ54HC02J SNJ54HC02W ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 8404101DA SNJ54HC02W Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com 17-Dec-2015 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN54HC02, SN54HC02-SP, SN74HC02 : • Catalog: SN74HC02, SN54HC02 • Automotive: SN74HC02-Q1, SN74HC02-Q1 Addendum-Page 3 PACKAGE OPTION ADDENDUM www.ti.com 17-Dec-2015 • Enhanced Product: SN74HC02-EP, SN74HC02-EP • Military: SN54HC02 • Space: SN54HC02-SP NOTE: Qualified Version Definitions: • Catalog - TI's standard catalog product • Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects • Enhanced Product - Supports Defense, Aerospace and Medical Applications • Military - QML certified for Military and Defense Applications • Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application Addendum-Page 4 PACKAGE MATERIALS INFORMATION www.ti.com 10-Mar-2016 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74HC02DBR SSOP DB 14 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1 SN74HC02DR SOIC D 14 2500 330.0 16.8 6.5 9.5 2.3 8.0 16.0 Q1 SN74HC02DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74HC02DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74HC02DRG4 SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74HC02DRG4 SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74HC02DT SOIC D 14 250 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74HC02PWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74HC02PWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74HC02PWRG4 TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74HC02PWT TSSOP PW 14 250 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 10-Mar-2016 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74HC02DBR SSOP DB 14 2000 367.0 367.0 38.0 SN74HC02DR SOIC D 14 2500 364.0 364.0 27.0 SN74HC02DR SOIC D 14 2500 333.2 345.9 28.6 SN74HC02DR SOIC D 14 2500 367.0 367.0 38.0 SN74HC02DRG4 SOIC D 14 2500 367.0 367.0 38.0 SN74HC02DRG4 SOIC D 14 2500 333.2 345.9 28.6 SN74HC02DT SOIC D 14 250 367.0 367.0 38.0 SN74HC02PWR TSSOP PW 14 2000 364.0 364.0 27.0 SN74HC02PWR TSSOP PW 14 2000 367.0 367.0 35.0 SN74HC02PWRG4 TSSOP PW 14 2000 367.0 367.0 35.0 SN74HC02PWT TSSOP PW 14 250 367.0 367.0 35.0 Pack Materials-Page 2 MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily performed. TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional restrictions. Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components in safety-critical applications. In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and requirements. Nonetheless, such components are subject to these terms. No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties have executed a special agreement specifically governing such use. Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of non-designated products, TI will not be responsible for any failure to meet ISO/TS16949. Products Applications Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energy and Lighting www.ti.com/energy Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video RFID www.ti-rfid.com OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com Wireless Connectivity www.ti.com/wirelessconnectivity Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2016, Texas Instruments Incorporated