MC10E112, MC100E112 5VECL Quad Driver Description The MC10E/100E112 is a quad driver with two pairs of OR/NOR outputs from each gate, and a common, buffered enable input. Using the data inputs the device can serve as an ECL memory address fan-out driver. Using just the enable input, the device serves as a clock driver, although the MC10E/100E111 is designed specifically for this purpose, and offers lower skew than the E112. For memory address driver applications where scan capabilities are required, please refer to the E212 device. The 100 Series contains temperature compensation. http://onsemi.com Features • 600 ps Max. Propagation Delay • Common Enable Input • PECL Mode Operating Range: VCC = 4.2 V to 5.7 V PLCC−28 FN SUFFIX CASE 776 with VEE = 0 V • NECL Mode Operating Range: VCC = 0 V • • • • • with VEE = −4.2 V to −5.7 V Internal Input 50 kW Pulldown Resistors ESD Protection: Human Body Model; > 2 kV, Machine Model; > 200 V Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test Moisture Sensitivity Level: Pb = 1 Pb−Free = 3 For Additional Information, see Application Note AND8003/D Flammability Rating: UL 94 V−0 @ 0.125 in, Oxygen Index: 28 to 34 Transistor Count = 125 devices • • Pb−Free Packages are Available* MARKING DIAGRAM* 1 MCxxxE112G AWLYYWW xxx A WL YY WW G = 10 or 100 = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2006 November, 2006 − Rev. 8 1 Publication Order Number: MC10E112/D MC10E112, MC100E112 Q3b Q3a Q3b 25 24 23 Q3a VCCO Q2b Q2a 22 21 20 VCCO 26 18 Q2b D3 27 17 Q2a D2 28 16 VCC 15 Q1b 14 Q1a VEE 1 D1 2 D0 3 13 Q1b EN 4 12 Q1a Pinout: 28-Lead PLCC (Top View) 5 6 7 8 9 10 Q0a Q0b D0 19 Q0a Q0b Q1a Q1b D1 Q1a Q1b Q2a D2 Q2b Q2a Q2b Q3a Q3b D3 11 Q3a NC VCCO Q0a Q0b Q0a Q0b VCCO *All VCC and VCCO pins are tied together on the die. Q3b EN Warning: All VCC, VCCO, and VEE pins must be externally connected to Power Supply to guarantee proper operation. Figure 1. Logic Diagram Figure 2. 28−Lead PLCC Pinout Table 1. PIN DESCRIPTION PIN FUNCTION D0 − D3 ECL Data Inputs EN ECL Enable Input Qna, Qnb ECL True Outputs Qna, Qnb ECL Inverting Outputs VCC, VCCO Positive Supply VEE Negative Supply NC No Connect Table 2. Truth Table EN D Q Q L H H L H H H L L L L H H L H L http://onsemi.com 2 MC10E112, MC100E112 Table 3. MAXIMUM RATINGS Symbol Rating Unit VCC PECL Mode Power Supply Parameter VEE = 0 V Condition 1 Condition 2 8 V VEE NECL Mode Power Supply VCC = 0 V −6 V VI PECL Mode Input Voltage NECL Mode Input Voltage VEE = 0 V VCC = 0 V 6 −6 V V Iout Output Current Continuous Surge 50 100 mA mA TA Operating Temperature Range 0 to +85 °C Tstg Storage Temperature Range −65 to +150 °C qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm 500 lfpm PLCC−28 PLCC−28 63.5 43.5 °C/W °C/W qJC Thermal Resistance (Junction−to−Case) Standard Board PLCC−28 22 to 26 °C/W Tsol Wave Solder 265 265 °C VI v VCC VI w VEE Pb Pb−Free Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Table 4. 10E SERIES PECL DC CHARACTERISTICS VCCx = 5.0 V; VEE = 0.0 V (Note 1) 0°C Symbol Characteristic Min Typ 25°C Max Min Typ 85°C Max Min Typ Max Unit IEE Power Supply Current 47 56 47 56 47 56 mA VOH Output HIGH Voltage (Note 2) 3980 4070 4160 4020 4105 4190 4090 4185 4280 mV VOL Output LOW Voltage (Note 2) 3050 3210 3370 3050 3210 3370 3050 3227 3405 mV VIH Input HIGH Voltage 3830 3995 4160 3870 4030 4190 3940 4110 4280 mV VIL Input LOW Voltage 3050 3285 3520 3050 3285 3520 3050 3302 3555 mV IIH Input HIGH Current 200 mA IIL Input LOW Current 200 0.5 0.3 200 0.5 0.25 0.3 0.2 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. Input and output parameters vary 1:1 with VCC. VEE can vary −0.46 V / +0.06 V. 2. Outputs are terminated through a 50 W resistor to VCC − 2.0 V. Table 5. 10E SERIES NECL DC CHARACTERISTICS VCCx = 0.0 V; VEE = −5.0 V (Note 3) 0°C Symbol Characteristic Min 25°C Typ Max 47 56 Min 85°C Typ Max 47 56 Typ Max Unit 47 56 mA −910 −815 −720 mV −1630 −1950 −1773 −1595 mV −810 −1060 −890 −720 mV −1480 −1950 −1698 −1445 mV 200 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 4) −1020 −930 −840 −980 −895 −810 VOL Output LOW Voltage (Note 4) −1950 −1790 −1630 −1950 −1790 VIH Input HIGH Voltage −1170 −1005 −840 −1130 −970 VIL Input LOW Voltage −1950 −1715 −1480 −1950 −1715 IIH Input HIGH Current IIL Input LOW Current 200 0.5 0.3 Min 200 0.5 0.065 0.3 0.2 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 3. Input and output parameters vary 1:1 with VCC. VEE can vary −0.46 V / +0.06 V. 4. Outputs are terminated through a 50 W resistor to VCC − 2.0 V. http://onsemi.com 3 MC10E112, MC100E112 Table 6. 100E SERIES PECL DC CHARACTERISTICS VCCx = 5.0 V; VEE = 0.0 V (Note 5) 0°C Symbol Characteristic Min Typ 25°C Max Min Typ 85°C Max Min Typ Max Unit IEE Power Supply Current 47 56 47 56 54 65 mA VOH Output HIGH Voltage (Note 6) 3975 4050 4120 3975 4050 4120 3975 4050 4120 mV VOL Output LOW Voltage (Note 6) 3190 3295 3380 3190 3255 3380 3190 3260 3380 mV VIH Input HIGH Voltage 3835 3975 4120 3835 3975 4120 3835 3975 4120 mV VIL Input LOW Voltage 3190 3355 3525 3190 3355 3525 3190 3355 3525 mV IIH Input HIGH Current 200 mA IIL Input LOW Current 200 0.5 0.3 200 0.5 0.25 0.5 0.2 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 5. Input and output parameters vary 1:1 with VCC. VEE can vary −0.46 V / +0.8 V. 6. Outputs are terminated through a 50 W resistor to VCC − 2.0 V. Table 7. 100E SERIES NECL DC CHARACTERISTICS VCCx = 0.0 V; VEE = −5.0 V (Note 7) 0°C Symbol Characteristic Min 25°C Typ Max 47 56 Min 85°C Typ Max 47 56 Typ Max Unit 54 65 mA −1025 −950 −880 mV −1620 −1810 −1740 −1620 mV −1025 −880 −1165 −1025 −880 mV −1645 −1475 −1810 −1645 −1475 mV 200 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 8) −1025 −950 −880 −1025 −950 −880 VOL Output LOW Voltage (Note 8) −1810 −1705 −1620 −1810 −1745 VIH Input HIGH Voltage −1165 −1025 −880 −1165 VIL Input LOW Voltage −1810 −1645 −1475 −1810 IIH Input HIGH Current IIL Input LOW Current 200 0.5 0.3 Min 200 0.5 0.25 0.5 0.2 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 7. Input and output parameters vary 1:1 with VCC. VEE can vary −0.46 V / +0.8 V. 8. Outputs are terminated through a 50 W resistor to VCC − 2.0 V. http://onsemi.com 4 MC10E112, MC100E112 Table 8. AC CHARACTERISTICS VCCx= 5.0 V; VEE= 0.0 V or VCCx= 0.0 V; VEE= −5.0 V (Note 9) 0°C Symbol Characteristic Min fMAX Maximum Toggle Frequency tPLH Propagation Delay to Output tPHL tSKEW Typ 25°C Max Min 700 85°C Typ Max Min 700 Typ Max 700 MHZ ps D, EN 350 550 750 350 550 750 350 550 750 Within-Device Skew ps Dn to Qn, Qn (Note 10) 80 80 80 Qna to Qnb (Note 11) 40 40 40 <1 <1 <1 tJITTER Random Clock Jitter (RMS) tr Rise/Fall Times tf (20 - 80%) Unit ps ps 275 425 700 275 425 700 275 425 700 NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 9. 10 Series: VEE can vary −0.46 V / +0.06 V. 100 Series: VEE can vary −0.46 V / +0.8 V. 10. Within-device skew is defined as identical transitions on similar paths through a device. 11. Skew defined between common OR or common NOR outputs of a single gate. Q Zo = 50 W D Receiver Device Driver Device Q D Zo = 50 W 50 W 50 W VTT VTT = VCC − 2.0 V Figure 3. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices.) http://onsemi.com 5 MC10E112, MC100E112 ORDERING INFORMATION Package Shipping † MC10E112FN PLCC−28 37 Units / Rail MC10E112FNG PLCC−28 (Pb−Free) 37 Units / Rail MC10E112FNR2 PLCC−28 500 / Tape & Reel MC10E112FNR2G PLCC−28 (Pb−Free) 500 / Tape & Reel MC100E112FN PLCC−28 37 Units / Rail MC100E112FNG PLCC−28 (Pb−Free) 37 Units / Rail MC100E112FNR2 PLCC−28 500 / Tape & Reel MC100E112FNR2G PLCC−28 (Pb−Free) 500 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D − ECL Clock Distribution Techniques AN1406/D − Designing with PECL (ECL at +5.0 V) AN1503/D − ECLinPSt I/O SPiCE Modeling Kit AN1504/D − Metastability and the ECLinPS Family AN1568/D − Interfacing Between LVDS and ECL AN1672/D − The ECL Translator Guide AND8001/D − Odd Number Counters Design AND8002/D − Marking and Date Codes AND8020/D − Termination of ECL Logic Devices AND8066/D − Interfacing with ECLinPS AND8090/D − AC Characteristics of ECL Devices http://onsemi.com 6 MC10E112, MC100E112 PACKAGE DIMENSIONS PLCC−28 FN SUFFIX PLASTIC PLCC PACKAGE CASE 776−02 ISSUE E −N− 0.007 (0.180) B Y BRK T L−M M 0.007 (0.180) U M N S T L−M S S N S D Z −M− −L− W 28 D X V 1 A 0.007 (0.180) R 0.007 (0.180) C M M T L−M T L−M S S N S N S 0.007 (0.180) H N S S G J 0.004 (0.100) −T− SEATING T L−M S N T L−M S N S K PLANE F VIEW S G1 M K1 E S T L−M S VIEW D−D Z 0.010 (0.250) 0.010 (0.250) G1 VIEW S S NOTES: 1. DATUMS −L−, −M−, AND −N− DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE. 2. DIMENSION G1, TRUE POSITION TO BE MEASURED AT DATUM −T−, SEATING PLANE. 3. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE. 4. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5. CONTROLLING DIMENSION: INCH. 6. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY. 7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635). DIM A B C E F G H J K R U V W X Y Z G1 K1 INCHES MIN MAX 0.485 0.495 0.485 0.495 0.165 0.180 0.090 0.110 0.013 0.019 0.050 BSC 0.026 0.032 0.020 −−− 0.025 −−− 0.450 0.456 0.450 0.456 0.042 0.048 0.042 0.048 0.042 0.056 −−− 0.020 2_ 10_ 0.410 0.430 0.040 −−− http://onsemi.com 7 MILLIMETERS MIN MAX 12.32 12.57 12.32 12.57 4.20 4.57 2.29 2.79 0.33 0.48 1.27 BSC 0.66 0.81 0.51 −−− 0.64 −−− 11.43 11.58 11.43 11.58 1.07 1.21 1.07 1.21 1.07 1.42 −−− 0.50 2_ 10_ 10.42 10.92 1.02 −−− 0.007 (0.180) M T L−M S N S MC10E112, MC100E112 ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. 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