LINER LTC3109 Piezoelectric energy harvesting power supply with 14v minimum vin Datasheet

LTC3588-2
Piezoelectric Energy
Harvesting Power Supply
with 14V Minimum VIN
Description
Features
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1500nA Input Quiescent Current (Output in
Regulation – No Load, VIN = 18V)
830nA Input Quiescent Current in UVLO, VIN = 12V
14V to 20V Input Operating Range
Integrated Low-Loss Full-Wave Bridge Rectifier
16V UVLO Improves Power Utilization from High
Voltage Current Limited Inputs
Up to 100mA of Output Current
High Efficiency Integrated Hysteretic Buck DC/DC
Selectable Output Voltages: 3.45V, 4.1V, 4.5V, 5.0V
Input Protective Shunt – Up to 25mA Pull-Down at
VIN ≥ 20V
Available in 10-Lead MSE and 3mm × 3mm DFN
Packages
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An ultralow quiescent current undervoltage lockout (UVLO)
mode with a 16V rising threshold enables efficient energy
extraction from piezoelectric transducers with high open
circuit voltages. This energy is transferred from the input
capacitor to the output via a high efficiency synchronous
buck regulator. The 16V UVLO threshold also allows for
input to output current multiplication through the buck
regulator. The buck features a sleep state that minimizes
both input and output quiescent currents while in regulation.
Four output voltages of 3.45V, 4.1V, 4.5V and 5.0V are
pin selectable with up to 100mA of continuous output
current, and suit Li-Ion and LiFePO4 batteries as well as
supercapacitors. An input protective shunt set at 20V
provides overvoltage protection.
Applications
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The LTC®3588-2 integrates a low-loss full-wave bridge
rectifier with a high efficiency buck converter to form a
complete energy harvesting solution optimized for high
output impedance energy sources such as piezoelectric
transducers.
Piezoelectric Energy Harvesting
Electro-Mechanical Energy Harvesting
Low Power Battery Charging
Wireless HVAC Sensors
Mobile Asset Tracking
Tire Pressure Sensors
Battery Replacement for Industrial Sensors
L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective
owners.
Typical Application
High Voltage Piezoelectric Energy Harvesting Power Supply
LTC3588-2 5.0V Regulator Start-Up Profile
20
CIN = 10µF, CSTORAGE = 47µF
18 NO LOAD, IVIN = 2µA
16
MIDE V25W
1µF
6V
10µF
25V
4.7µF
6V
VIN
PZ2
LTC3588-2
SW
VOUT
CSTORAGE
6V
VOUT
CAP
PGOOD
VIN2
D0, D1
GND
35882 TA01
14
22µH
2
OUTPUT
VOLTAGE
SELECT
VOLTAGE (V)
PZ1
VIN
12
10
8
VOUT
6
4
2
0
PGOOD = LOGIC 1
0
400
200
600
TIME (sec)
35882 TA01b
35882fa
1
LTC3588-2
Absolute Maximum Ratings
(Note 1)
VIN
Low Impedance Source........................ –0.3V to 18V*
Current Fed, ISW = 0A....................................... 25mA†
PZ1, PZ2............................................................0V to VIN
D0, D1...............–0.3V to [Lesser of (VIN2 + 0.3V) or 6V]
CAP....................... [Higher of –0.3V or (VIN – 6V)] to VIN
VIN2.................... –0.3V to [Lesser of (VIN + 0.3V) or 6V]
* VIN has an internal 20V clamp
† For t < 1ms and Duty Cycle < 1%,
Absolute Maximum Continuous Current = 5mA
VOUT................... –0.3V to [Lesser of (VIN + 0.3V) or 6V]
PGOOD.............–0.3V to [Lesser of (VOUT + 0.3V) or 6V]
IPZ1, IPZ2.............................................................. ±50mA
ISW....................................................................... 350mA
Operating Junction Temperature Range
(Notes 2, 3)................................................. –40 to 125°C
Storage Temperature Range....................... –65 to 125°C
Lead Temperature (Soldering, 10 sec)
MSE Only........................................................... 300°C
Pin Configuration
TOP VIEW
PZ1
1
PZ2
2
CAP
3
VIN
4
SW
5
TOP VIEW
10 PGOOD
11
GND
PZ1
PZ2
CAP
VIN
SW
9 D0
8 D1
7 VIN2
6 VOUT
1
2
3
4
5
11
GND
10
9
8
7
6
PGOOD
D0
D1
VIN2
VOUT
MSE PACKAGE
10-LEAD PLASTIC MSOP
DD PACKAGE
10-LEAD (3mm × 3mm) PLASTIC DFN
TJMAX = 125°C, θJA = 43°C/W, θJC = 7.5°C/W
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
TJMAX = 125°C, θJA = 45°C/W, θJC = 10°C/W
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
Order Information
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3588EDD-2#PBF
LTC3588EDD-2#TRPBF
LFYK
10-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LTC3588IDD-2#PBF
LTC3588IDD-2#TRPBF
LFYK
10-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LTC3588EMSE-2#PBF
LTC3588EMSE-2#TRPBF
LTFYM
10-Lead Plastic MSOP
–40°C to 125°C
LTC3588IMSE-2#PBF
LTC3588IMSE-2#TRPBF
LTFYM
10-Lead Plastic MSOP
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
35882fa
2
LTC3588-2
Electrical Characteristics
The l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are for TA = 25°C (Note 2). VIN = 18V unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
VIN
Input Voltage Range
Low Impedance Source on VIN
IQ
VIN Quiescent Current
UVLO
Buck Enabled, Sleeping
Buck Enabled, Not Sleeping
VIN = 12V, Not PGOOD
VIN = 18V
ISW = 0A (Note 4)
VUVLO
VIN Undervoltage Lockout Threshold
VIN Rising
l
VIN Falling
l
VSHUNT
VIN Shunt Regulator Voltage
IVIN = 1mA
ISHUNT
Maximum Protective Shunt Current
1ms Duration
25
Internal Bridge Rectifier Loss
(|VPZ1 – VPZ2| – VIN)
IBRIDGE = 10µA
350
Internal Bridge Rectifier Reverse
Leakage Current
VREVERSE = 18V
Internal Bridge Rectifier Reverse
Breakdown Voltage
IREVERSE = 1µA
Regulated Output Voltage
3.45V Output Selected
Sleep Threshold
Wake-Up Threshold
4.1V Output Selected
Sleep Threshold
Wake-Up Threshold
4.5V Output Selected
Sleep Threshold
Wake-Up Threshold
5.0V Output Selected
Sleep Threshold
Wake-Up Threshold
VOUT
MIN
MAX
UNITS
18.0
V
830
1500
150
1400
2500
250
nA
nA
µA
16.0
17.0
V
13.0
14.0
18.8
20.0
V
21.2
V
mA
400
450
mV
20
nA
VSHUNT
30
l
l
3.346
3.466
3.434
3.554
V
V
l
l
3.979
4.116
4.084
4.221
V
V
l
l
4.354
4.516
4.484
4.646
V
V
l
l
4.825
5.016
4.984
5.175
V
V
125
250
nA
260
350
mA
PGOOD Falling Threshold
As a Percentage of the Selected VOUT
IVOUT
Output Quiescent Current
VOUT = 5.0V
IPEAK
Buck Peak Switch Current
200
IBUCK
Available Buck Output Current
100
RP
Buck PMOS Switch On-Resistance
RN
TYP
l
83
V
92
%
mA
1.1
Buck NMOS Switch On-Resistance
Ω
1.3
Ω
Max Buck Duty Cycle
l
100
%
VIH(D0, D1)
D0/D1 Input High Voltage
l
1.2
V
VIL(D0, D1)
D0/D1 Input Low Voltage
l
IIH(D0, D1)
IIL(D0, D1)
0.4
V
D0/D1 Input High Current
10
nA
D0/D1 Input Low Current
10
nA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3588E-2 is tested under pulsed load conditions such
that TJ ≈ TA. The LTC3588E-2 is guaranteed to meet specifications
from 0°C to 85°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTC3588I-2 is guaranteed over the –40°C to 125°C operating junction
temperature range. Note that the maximum ambient temperature
consistent with these specifications is determined by specific operating
conditions in conjunction with board layout, the rated package thermal
impedance and other environmental factors.
Note 3: The junction temperature (TJ, in °C) is calculated from the ambient
temperature (TA, in °C) and power dissipation (PD, in Watts) according
to the formula: TJ = TA + (PD • θJA), where θJA (in °C/W) is the package
thermal impedance.
Note 4: Dynamic supply current is higher due to gate charge being
delivered at the switching frequency.
35882fa
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LTC3588-2
Typical Performance Characteristics
Input IQ in UVLO vs VIN
125°C
1600
125°C
16.2
2800
1200
85°C
1000
INPUT IQ (nA)
INPUT IQ (nA)
UVLO Rising vs Temperature
16.4
3200
1400
25°C
800
–40°C
600
400
200
0
Input IQ in Sleep vs VIN
3600
0
2
4
6
8
10
VIN (V)
12
14
UVLO RISING (V)
1800
2400
2000
85°C
1600
25°C
1200
–40°C
800
16
14
15
16
VIN (V)
35882 G01
UVLO Falling vs Temperature
15.8
15.6
–50
18
17
21.2
1800
21.0
1600
VBRIDGE (mV)
VSHUNT (V)
UVLO FALLING (V)
ISHUNT = 25mA
20.0
ISHUNT = 1mA
19.8
19.6
13.8
19.4
50
0
25
75
TEMPERATURE (°C)
100
18.8
–50
125
–25
35882 G04
0
25
75
50
TEMPERATURE (°C)
100
800
1.6
14
1.4
12
1.2
3.50
1.0
0.8
3.30
3.25
0.4
3.20
2
0.2
3.15
35882 G07
0
WAKE-UP THRESHOLD
3.35
4
170
SLEEP THRESHOLD
3.40
0.6
35
80
125
TEMPERATURE (°C)
10m
3.45
6
–10
100µ
1m
BRIDGE CURRENT (A)
3.45V Output vs Temperature
VOUT (V)
16
0
–55
10µ
3.55
4VP-P APPLIED TO PZ1/PZ2 INPUT
1.8 MEASURED IN UVLO
VIN = 18V, LEAKAGE AT PZ1 OR PZ2
8
1µ
35882 G06
Bridge Frequency Response
10
25°C
600
0
125
2.0
VIN (V)
BRIDGE LEAKAGE (nA)
18
85°C
35882 G05
Bridge Leakage vs Temperature
20
1000
200
19.0
–25
–40°C
1200
400
19.2
13.6
–50
125
|VPZ1 – VPZ2| – VIN
1400
20.4
20.2
100
Total Bridge Rectifier Drop
vs Bridge Current
20.6
14.0
50
0
25
75
TEMPERATURE (°C)
35882 G03
20.8
14.2
–25
35882 G02
VSHUNT vs Temperature
14.4
16.0
10
100
1k
10k 100k 1M
FREQUENCY (Hz)
10M 100M
35882 G08
3.10
–50
PGOOD FALLING
–25
0
25
75
50
TEMPERATURE (°C)
100
125
35882 G09
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LTC3588-2
Typical Performance Characteristics
4.1V Output vs Temperature
4.60
5.10
SLEEP THRESHOLD
SLEEP THRESHOLD
SLEEP THRESHOLD
4.10
5.00
4.50
WAKE-UP THRESHOLD
WAKE-UP THRESHOLD
WAKE-UP THRESHOLD
3.90
4.90
4.40
VOUT (V)
4.00
VOUT (V)
VOUT (V)
5.0V Output vs Temperature
4.5V Output vs Temperature
4.20
4.30
4.80
4.70
3.80
4.20
PGOOD FALLING
3.70
–50
–25
0
25
75
50
TEMPERATURE (°C)
100
4.10
–50
125
0
25
75
50
TEMPERATURE (°C)
–25
35882 G10
IVOUT (nA)
VOUT (V)
4.10
4.09
VOUT = 4.1V
14
15
35882 G13
300
16
VIN (V)
17
260
RDS(ON) (Ω)
IPEAK (mA)
1.6
250
240
220
NMOS
SWITCH
VOLTAGE
10V/DIV
1.4
PMOS
0V
INDUCTOR
CURRENT
200mA/DIV
1.0
210
–25
0
75
25
50
TEMPERATURE (°C)
100
125
35882 G16
0.8
–55 –35 –15
125
35882 G15
1.2
230
100
OUTPUT
VOLTAGE
50mV/DIV
AC-COUPLED
1.8
270
0
75
25
50
TEMPERATURE (°C)
Operating Waveforms
2.0
280
–25
35882 G14
290
200
–50
40
–50
18
RDS(ON) of PMOS/NMOS
vs Temperature
IPEAK vs Temperature
VOUT = 3.45V
60
4.06
4.05
100
80
4.07
100m
VOUT = 4.5V
120
4.11
4.08
4.05
125
VOUT = 5.0V
140
4.12
100µ
1m
10m
LOAD CURRENT (A)
100
IVOUT vs Temperature
4.13
10µ
50
0
25
75
TEMPERATURE (°C)
160
COUT = 100µF, ILOAD = 60mA,
4.14 D1 = 0, D0 = 1
VIN = 18V, COUT = 100µF, D1 = 0, D0 = 1
1µ
–25
35882 G12
VOUT Line Regulation
4.10
4.00
4.50
–50
125
4.15
4.15
VOUT (V)
100
35882 G11
VOUT Load Regulation
4.20
PGOOD FALLING
4.60
PGOOD FALLING
0mA
5 25 45 65 85 105 125
TEMPERATURE (°C)
35882 G17
2.5µs/DIV
VIN = 18V, VOUT = 5.0V
ILOAD = 1mA
L = 22µH, COUT = 47µF
35882 G18
35882fa
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LTC3588-2
Typical Performance Characteristics
100
94
VIN = 15V
90
80
EFFICIENCY (%)
EFFICIENCY (%)
70
60
50
40
30
10
0
1µ
10µ
100µ
1m
10m
LOAD CURRENT (A)
90
90
80
88
86
80
14
15
35881 G19
90
94
VIN = 15V
70
EFFICIENCY (%)
EFFICIENCY (%)
80
60
50
40
30
VOUT = 5.0V
VOUT = 4.5V
VOUT = 4.1V
VOUT = 3.45V
20
10
0
1µ
10µ
100µ
1m
10m
LOAD CURRENT (A)
100m
35882 G22
17
70
60
30
18
100
92
90
90
80
88
86
VOUT = 5.0V
VOUT = 4.5V
VOUT = 4.1V
VOUT = 3.45V
82
80
14
15
16
VIN (V)
14
15
35882 G20
Efficiency vs VIN for
ILOAD = 100mA, L = 100µH
84
ILOAD = 100mA
ILOAD = 100µA
ILOAD = 50µA
ILOAD = 30µA
ILOAD = 10µA
40
EFFICIENCY (%)
100
Efficiency vs ILOAD, L = 100µH
16
VIN (V)
Efficiency vs VIN for
VOUT = 4.1V, L = 22µH
50
VOUT = 5.0V
VOUT = 4.5V
VOUT = 4.1V
VOUT = 3.45V
82
100m
100
92
84
VOUT = 5.0V
VOUT = 4.5V
VOUT = 4.1V
VOUT = 3.45V
20
Efficiency vs VIN for
ILOAD = 100mA, L = 22µH
EFFICIENCY (%)
Efficiency vs ILOAD, L = 22µH
17
18
35882 G23
16
VIN (V)
17
18
35882 G21
Efficiency vs VIN for
VOUT = 4.1V, L = 100µH
70
60
ILOAD = 100mA
ILOAD = 100µA
ILOAD = 50µA
ILOAD = 30µA
ILOAD = 10µA
50
40
30
14
15
16
VIN (V)
17
18
35882 G24
35882fa
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LTC3588-2
Pin Functions
PZ1 (Pin 1): Input connection for piezoelectric element or
other AC source (used in conjunction with PZ2).
VIN2 (Pin 7): Internal low voltage rail to serve as gate drive
for buck NMOS switch. Also serves as a logic high rail for
output voltage select bits D0 and D1. A 4.7µF capacitor
should be connected from VIN2 to GND. This pin is not
intended for use as an external system rail.
PZ2 (Pin 2): Input connection for piezoelectric element or
other AC source (used in conjunction with PZ1).
CAP (Pin 3): Internal rail referenced to VIN to serve as gate
drive for buck PMOS switch. A 1µF capacitor should be
connected between CAP and VIN. This pin is not intended
for use as an external system rail.
D1 (Pin 8): Output Voltage Select Bit. D1 should be tied
high to VIN2 or low to GND to select desired VOUT (see
Table 1).
D0 (Pin 9): Output Voltage Select Bit. D0 should be tied
high to VIN2 or low to GND to select desired VOUT (see
Table 1).
VIN (Pin 4): Rectified Input Voltage. A capacitor on this
pin serves as an energy reservoir and input supply for the
buck regulator. The VIN voltage is internally clamped to a
maximum of 20V (typical).
PGOOD (Pin 10): Power good output is logic high when
VOUT is above 92% of the target value. The logic high is
referenced to the VOUT rail.
SW (Pin 5): Switch Pin for the Buck Switching Regulator.
A 22µH or larger inductor should be connected from SW
to VOUT.
GND (Exposed Pad Pin 11): Ground. The Exposed Pad
should be connected to a continuous ground plane on the
second layer of the printed circuit board by several vias
directly under the LTC3588-2.
VOUT (Pin 6): Sense pin used to monitor the output voltage and adjust it through internal feedback.
Block Diagram
VIN 4
20V
INTERNAL RAIL
GENERATION
PZ1 1
3
CAP
5
SW
7
VIN2
PZ2 2
BUCK
CONTROL
UVLO
11 GND
SLEEP
BANDGAP
REFERENCE
8, 9
D1, D0
6
VOUT
2
PGOOD
COMPARATOR
10 PGOOD
35882 BD
35882fa
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LTC3588-2
Operation
Internal Bridge Rectifier
The LTC3588-2 has an internal full-wave bridge rectifier
accessible via the differential PZ1 and PZ2 inputs that
rectifies AC inputs such as those from a piezoelectric
element. The rectified output is stored on a capacitor at
the VIN pin and can be used as an energy reservoir for the
buck converter. The low-loss bridge rectifier has a total
drop of about 400mV with typical piezo generated currents
(~10µA). The bridge is capable of carrying up to 50mA.
One side of the bridge can be operated as a single-ended
DC input. PZ1 and PZ2 should never be shorted together
when the bridge is in use.
Undervoltage Lockout (UVLO)
When the voltage on VIN rises above the UVLO rising
threshold the buck converter is enabled and charge is
transferred from the input capacitor to the output capacitor.
A wide (~2V) UVLO hysteresis window allows a portion of
the energy stored on the input capacitor to be transferred
to the output capacitor by the buck. When the input capacitor voltage is depleted below the UVLO falling threshold
the buck converter is disabled. Extremely low quiescent
current (830nA typical, VIN = 12V) in UVLO allows energy
to accumulate on the input capacitor in situations where
energy must be harvested from low power sources.
Internal Rail Generation
Two internal rails, CAP and VIN2, are generated from VIN and
are used to drive the high side PMOS and low side NMOS
of the buck converter, respectively. Additionally the VIN2
rail serves as logic high for output voltage select bits D0
and D1. The VIN2 rail is regulated at 4.8V above GND while
the CAP rail is regulated at 4.8V below VIN. These are not
intended to be used as external rails. Bypass capacitors
8
are connected to the CAP and VIN2 pins to serve as energy
reservoirs for driving the buck switches. When VIN is below
4.8V, VIN2 is equal to VIN and CAP is held at GND. Figure 1
shows the ideal VIN, VIN2 and CAP relationship.
18
16
14
VOLTAGE (V)
The LTC3588-2 is an ultralow quiescent current power
supply designed specifically for energy harvesting and/or
low current step-down applications. The part is designed to
interface directly to a piezoelectric or alternative A/C power
source, rectify a voltage waveform and store harvested
energy on an external capacitor, bleed off any excess power
via an internal shunt regulator, and maintain a regulated
output voltage by means of a nanopower high efficiency
synchronous buck regulator.
VIN
12
10
8
6
VIN2
4
CAP
2
0
0
5
10
VIN (V)
15
35882 F01
Figure 1. Ideal VIN, VIN2 and CAP Relationship
Buck Operation
The buck regulator uses a hysteretic voltage algorithm
to control the output through internal feedback from the
VOUT sense pin. The buck converter charges an output
capacitor through an inductor to a value slightly higher
than the regulation point. It does this by ramping the
inductor current up to 260mA through an internal PMOS
switch and then ramping it down to 0mA through an
internal NMOS switch. This efficiently delivers energy
to the output capacitor. The ramp rate is determined by
VIN, VOUT, and the inductor value. If the input voltage
falls below the UVLO falling threshold before the output
voltage reaches regulation, the buck converter will shut
off and will not be turned on until the input voltage again
rises above the UVLO rising threshold. During this time
the output voltage will be loaded by approximately 100nA.
When the buck brings the output voltage into regulation
the converter enters a low quiescent current sleep state
that monitors the output voltage with a sleep comparator.
During this operating mode load current is provided by
the buck output capacitor. When the output voltage falls
below the regulation point the buck regulator wakes up
and the cycle repeats. This hysteretic method of providing
a regulated output reduces losses associated with FET
switching and maintains an output at light loads. The buck
delivers a minimum of 100mA of average current to the
output when it is switching.
35882fa
LTC3588-2
operation
Though the quiescent current when the buck is switching
is much greater than the sleep quiescent current, it is still
a small percentage of the average inductor current which
results in high efficiency over most load conditions. The
buck operates only when sufficient energy has been accumulated in the input capacitor and the length of time the
converter needs to transfer energy to the output is much
less than the time it takes to accumulate energy. Thus, the
buck operating quiescent current is averaged over a long
period of time so that the total average quiescent current
is low. This feature accommodates sources that harvest
small amounts of ambient energy.
regulation voltage. Several sleep cycles may occur during
this time. Additionally, if PGOOD is high and VIN falls below
the UVLO falling threshold, PGOOD will remain high until
VOUT falls to 92% of the desired regulation point. This
allows output energy to be used even if the input is lost.
Figure 2 shows the behavior for VOUT = 5V and a 10µA
load. At t = 2s VIN becomes high impedance and is discharged by the quiescent current of the LTC3588-2 and
through servicing VOUT which is discharged by its own
leakage current. VIN crosses UVLO falling but PGOOD
remains high until VOUT decreases to 92% of the desired
regulation point. The PGOOD pin is designed to drive a
microprocessor or other chip I/O and is not intended to
drive higher current loads such as an LED.
The D0/D1 inputs can be switched while in regulation as
shown in Figure 3. If VOUT is programmed to a voltage with
a PGOOD falling threshold above the old VOUT, PGOOD will
20
18
12 C = 10µF,
IN
10 COUT = 47µF,
ILOAD = 10µA
8
6
2
0
VOUT
VOUT QUIESCENT CURRENT (IVOUT)
0
3.45V
86nA
0
1
4.1V
101nA
1
0
4.5V
111nA
1
1
5.0V
125nA
The internal feedback network draws a small amount of
current from VOUT as listed in Table 1.
Power Good Comparator
A power good comparator produces a logic high referenced
to VOUT on the PGOOD pin the first time the converter
reaches the sleep threshold of the programmed VOUT,
signaling that the output is in regulation. The PGOOD pin
will remain high until VOUT falls to 92% of the desired
PGOOD
0
2
4
6
8
TIME (sec)
12
10
35882 F02
Figure 2. PGOOD Operation During Transition to UVLO
6
COUT = 100µF, ILOAD = 100mA
D1=D0=1
D1=D0=0
5
VOUT VOLTAGE (V)
D0
VOUT
4
Table 1. Output Voltage Selection
0
VIN = UVLO FALLING
14
Four selectable voltages are available by tying the output
select bits, D0 and D1, to GND or VIN2. Table 1 shows the
four D0/D1 codes and their corresponding output voltages.
D1
VIN
16
VOLTAGE (V)
When the sleep comparator signals that the output has
reached the sleep threshold the buck converter may be
in the middle of a cycle with current still flowing through
the inductor. Normally both synchronous switches would
turn off and the current in the inductor would freewheel
to zero through the NMOS body diode. The LTC3588-2
keeps the NMOS switch on during this time to prevent the
conduction loss that would occur in the diode if the NMOS
were off. If the PMOS is on when the sleep comparator
trips the NMOS will turn on immediately in order to ramp
down the current. If the NMOS is on it will be kept on until
the current reaches zero.
4
D1=D0=0
VOUT
3
2
PGOOD = LOGIC 1
1
0
0
2
4
6
8 10 12 14 16 18 20
TIME (ms)
35882 F03
Figure 3. PGOOD Operation During D0/D1 Transition
35882fa
9
LTC3588-2
Operation
transition low until the new regulation point is reached.
When VOUT is programmed to a lower voltage, PGOOD
will remain high through the transition.
Energy Storage
Harvested energy can be stored on the input capacitor
or the output capacitor. The high UVLO threshold takes
advantage of the fact that energy storage on a capacitor is
proportional to the square of the capacitor voltage. After
the output voltage is brought into regulation any excess
energy is stored on the input capacitor and its voltage
increases. When a load exists at the output the buck can
efficiently transfer energy stored at a high voltage to the
regulated output. While energy storage at the input utilizes
the high voltage at the input, the load current is limited
to what the buck converter can supply. If larger loads
need to be serviced the output capacitor can be sized to
support a larger current for some duration. For example,
a current burst could begin when PGOOD goes high and
would continuously deplete the output capacitor until
PGOOD went low.
The output voltages available on the LTC3588-2 are particularly suited to Li-Ion and LiFePO4 batteries as well as
supercapacitors for applications where energy storage at
the output is desired.
Applications Information
Introduction
The LTC3588-2 harvests ambient vibrational energy
through a piezoelectric element in its primary application.
Common piezoelectric elements are PZT (lead zirconate
titanate) ceramics, PVDF (polyvinylidene fluoride) polymers, or other composites. Ceramic piezoelectric elements
exhibit a piezoelectric effect when the crystal structure
of the ceramic is compressed and internal dipole movement produces a voltage. Polymer elements comprised
of long-chain molecules produce a voltage when flexed
as molecules repel each other. Ceramics are often used
under direct pressure while a polymer can be flexed more
PIEZO VOLTAGE
INCREASING
VIBRATION ENERGY
readily. A wide range of piezoelectric elements are available and produce a variety of open-circuit voltages and
short-circuit currents. Typically the open-circuit voltage
and short-circuit currents increase with available vibrational energy as shown in Figure 4. Piezoelectric elements
can be placed in series or in parallel to achieve desired
open-circuit voltages.
The LTC3588-2 is well-suited to a piezoelectric energy
harvesting application. The 20V input protective shunt
can accommodate a variety of piezoelectric elements. The
low quiescent current of the LTC3588-2 enables efficient
energy accumulation from piezoelectric elements which
can have short-circuit currents on the order of tens of
microamps. Piezoelectric elements can be obtained from
manufacturers listed in Table 2.
Table 2. Piezoelectric Element Manufacturers
Advanced Cerametrics
0
0
PIEZO CURRENT
www.advancedcerametrics.com
Piezo Systems
www.piezo.com
Measurement Specialties
www.meas-spec.com
PI (Physik Instrumente)
www.pi-usa.us
MIDE Technology Corporation
www.mide.com
Morgan Technical Ceramics
www.morganelectroceramics.com
35882 F04
Figure 4. Typical Piezoelectric Load Lines
35882fa
10
LTC3588-2
applications information
10µF
25V
1µF
6V
PZ1
PZ2
VIN
PGOOD
CAP LTC3588-2
D1
D0
5V
MICROPROCESSOR
CORE
VOUT
VIN2
4.7µF
6V
SW
GND
TX
EN
22µH
OUTPUT
VOLTAGE
50mV/DIV
AC-COUPLED
GND
47µF
6V
LOAD
CURRENT
25mA/DIV
5mA
35882 F05a
250µs/DIV
VIN = 18V
L = 22µH, COUT = 47µF
LOAD STEP BETWEEN 5mA and 55mA
35882 F05b
Figure 5. 5V Piezoelectric Energy Harvester Powering a Microprocessor
with a Wireless Transmitter and 50mA Load Step Response
The LTC3588-2 will gather energy and convert it to a useable output voltage to power microprocessors, wireless
sensors, and wireless transmission components. Such a
wireless sensor application may require much more peak
power than a piezoelectric element can produce. However,
the LTC3588-2 accumulates energy over a long period of
time to enable efficient use for short power bursts. For
continuous operation, these bursts must occur with a low
duty cycle such that the total output energy during the burst
does not exceed the average source power integrated over
an energy accumulation cycle. For piezoelectric inputs the
time between cycles could be minutes, hours, or longer
depending on the selected capacitor values and the nature
of the vibration source.
PGOOD Signal
The PGOOD signal can be used to enable a sleeping
microprocessor or other circuitry when VOUT reaches
regulation, as shown in Figure 5. Typically VIN will be
somewhere between the UVLO thresholds at this time
and a load could only be supported by the output capacitor. Alternatively, waiting a period of time after PGOOD
goes high would let the input capacitor accumulate more
energy allowing load current to be maintained longer as
the buck efficiently transfers that energy to the output.
While active, a microprocessor may draw a small load
when operating sensors, and then draw a large load to
transmit data. Figure 5 shows the LTC3588-2 responding
smoothly to such a load step.
Input and Output Capacitor Selection
The input and output capacitors should be selected based
on the energy needs and load requirements of the application. In every case the VIN capacitor should be rated
to withstand the highest voltage ever present at VIN.
For 100mA or smaller loads, storing energy at the input
takes advantage of the high voltage input since the buck
can deliver 100mA average load current efficiently to the
output. The input capacitor should then be sized to store
enough energy to provide output power for the length of
time required. This may involve using a large capacitor,
letting VIN charge to a high voltage, or both. Enough energy
should be stored on the input so that the buck does not
reach the UVLO falling threshold which would halt energy
transfer to the output. In general:
(
1
PLOAD tLOAD = ηCIN VIN 2 − VUVLO(FALLING)2
2
VUVLO(FALLING) ≤ VIN ≤ VSHUNT
)
The above equation can be used to size the input capacitor to meet the power requirements of the output for an
application with continuous input energy. Here η is the
average efficiency of the buck converter over the input
range and VIN is the input voltage when the buck begins to
switch. This equation may overestimate the input capacitor necessary since load current can deplete the output
capacitor all the way to the lower PGOOD threshold. It also
assumes that the input source charging has a negligible
35882fa
11
LTC3588-2
Applications Information
effect during this time. For applications where the output
must reach regulation on a single UVLO cycle, the energy
required to charge the output capacitor must be taken into
account when sizing CIN.
The duration for which the regulator sleeps depends on
the load current and the size of the output capacitor. The
sleep time decreases as the load current increases and/or
as the output capacitor decreases. The DC sleep hysteresis
window is ±16mV around the programmed output voltage. Ideally this means that the sleep time is determined
by the following equation:
t SLEEP = COUT
32mV
ILOAD
This is true for output capacitors on the order of 100µF
or larger, but as the output capacitor decreases towards
10µF delays in the internal sleep comparator along with
the load current may result in the VOUT voltage slewing
past the ±16mV thresholds. This will lengthen the sleep
time and increase VOUT ripple. A capacitor less than 10µF
is not recommended as VOUT ripple could increase to an
undesirable level.
If transient load currents above 100mA are required then a
larger capacitor can be used at the output. This capacitor
will be continuously discharged during a load condition and
the capacitor can be sized for an acceptable drop in VOUT:
I
−I
COUT = ( VOUT+ − VOUT– ) LOAD BUCK
tLOAD
Here VOUT+ is the value of VOUT when PGOOD goes high
and VOUT– is the desired lower limit of VOUT. IBUCK is the
average current being delivered from the buck converter,
typically IPEAK /2.
A standard surface mount ceramic capacitor can be used
for COUT, though some applications may be better suited
to a low leakage aluminum electrolytic capacitor or a
supercapacitor. These capacitors can be obtained from
manufacturers such as Vishay, Illinois Capacitor, AVX,
or CAP-XX.
Inductor
The buck is optimized to work with a 22µH inductor. Inductor values greater than 22µH may yield benefits in some
applications. For example, a larger inductor will benefit
high voltage applications by increasing the on-time of the
PMOS switch and improving efficiency by reducing gate
charge loss. Choose an inductor with a DC current rating
greater than 350mA. The DCR of the inductor can have
an impact on efficiency as it is a source of loss. Trade-offs
between price, size, and DCR should be evaluated. Table 3
lists several inductors that work well with the LTC3588-2.
Table 3. Recommended Inductors for LTC3588-2
INDUCTOR
TYPE
A997AS-220M
L
(µH)
MAX
IDC
(mA)
MAX
DCR
(Ω)
22
390
0.440 4.0 × 4.0 × 1.8
SIZE in mm
(L × W × H)
MANUFACTURER
Toko
LPS5030-223MLC
22
700
0.190 4.9 × 4.9 × 3.0
Coilcraft
LPS4012-473MLC
47
350
1.400 4.0 × 4.0 × 1.2
Coilcraft
SLF7045T
100
500
0.250 7.0 × 7.0 × 4.8
TDK
VIN2 and CAP Capacitors
A 1μF capacitor should be connected between VIN and
CAP and a 4.7µF capacitor should be connected between
VIN2 and GND. These capacitors hold up the internal rails
during buck switching and compensate the internal rail
generation circuits.
Additional Applications with Piezo Inputs
The versatile LTC3588-2 can be used in a variety of configurations. Figure 6 shows a single piezo source powering
two LTC3588-2s simultaneously, providing capability for
multiple rail systems. As the piezo provides input power
both VIN rails will initially come up together, but when one
output starts drawing power, only its corresponding VIN
will fall as the bridges of each LTC3588-2 provide isolation. Input piezo energy will then be directed to this lower
voltage capacitor until both VIN rails are again equal. This
configuration is expandable to any number of LTC3588-2s
powered by a single piezo as long as the piezo can support the sum total of the quiescent currents from each
LTC3588-2.
35882fa
12
LTC3588-2
Applications Information
ADVANCED CERAMETRICS
PFCB-W14
PGOOD1
PZ1
PZ2
PZ1
PZ2
PGOOD
VIN
VIN
PGOOD
22µH
5.0V
SW
LTC3588-2
VOUT
10µF
6V
CAP
1µF
6V
10µF
25V
VIN2
D1
D0
GND
1µF
6V
4.7µF
6V
10µF
25V
LTC3588-2
CAP
22µH
3.45V
SW
VOUT
VIN2
4.7µF
6V
PGOOD2
10µF
6V
D1
D0
GND
35882 F06
Figure 6. Dual Rail Power Supply with Single Piezo
DANGER! HIGH VOLTAGE!
150k
120VAC
60Hz 150k
DANGEROUS AND LETHAL POTENTIALS ARE PRESENT IN OFFLINE CIRCUITS!
150k
BEFORE PROCEEDING ANY FURTHER, THE READER IS WARNED THAT
CAUTION MUST BE USED IN THE CONSTRUCTION, TESTING AND USE OF
150k
1µF
6V
10µF
25V
PZ1
PZ2
VIN
PGOOD
CAP
LTC3588-2
4.7µF
6V
D0
D1
AND MAKING CONNECTIONS TO THESE CIRCUITS. REPEAT: OFFLINE
PGOOD
CIRCUITS CONTAIN DANGEROUS, AC LINE-CONNECTED HIGH VOLTAGE
22µH
VOUT
4.1V
SW
VOUT
VIN2
OFFLINE CIRCUITS. EXTREME CAUTION MUST BE USED IN WORKING WITH
22µF
6V
GND
35882 F07
Li-Ion
POWER
STREAM
LiR2450
120mAh
POTENTIALS. USE CAUTION. ALL TESTING PERFORMED ON AN OFFLINE
CIRCUIT MUST BE DONE WITH AN ISOLATION TRANSFORMER CONNECTED
BETWEEN THE OFFLINE CIRCUIT’S INPUT AND THE AC LINE. USERS AND
CONSTRUCTORS OF OFFLINE CIRCUITS MUST OBSERVE THIS PRECAUTION
WHEN CONNECTING TEST EQUIPMENT TO THE CIRCUIT TO AVOID ELECTRIC
SHOCK. REPEAT: AN ISOLATION TRANSFORMER MUST BE CONNECTED
BETWEEN THE CIRCUIT INPUT AND THE AC LINE IF ANY TEST EQUIPMENT IS
TO BE CONNECTED.
Figure 7. AC Line Powered 4.1V Li-Ion Battery Charger
Alternate Power Sources
The LTC3588-2 is not limited to use with piezoelectric elements but can accommodate a wide variety of input sources
depending on the type of ambient energy available. Figure 7
shows the LTC3588-2 internal bridge rectifier connected
to the AC line in series with four 150k current limiting
resistors. This is a high voltage application and minimum
spacing between the line, neutral, and any high voltage
components should be maintained per the applicable UL
specification. For general off-line applications refer to UL
regulation 1012.
Figure 8 shows an application where copper panels are
placed near a standard fluorescent room light to capacitively
harvest energy from the electric field around the light.
COPPER PANEL
(12" × 24")
1µF
6V
10µF
25V
PANELS ARE PLACED 6"
FROM 2' × 4' FLUORESCENT
LIGHT FIXTURES
PZ1
PZ2
VIN
PGOOD
CAP
LTC3588-2
PGOOD
22µH
4.5V
SW
VOUT
VIN2
4.7µF
6V
COPPER PANEL
(12" × 24")
10µF
6V
D1
D0
GND
35882 F08
Figure 8. Electric Field Energy Harvester
35882fa
13
LTC3588-2
applications information
The frequency of the emission will be 120Hz for magnetic
ballasts but could be higher if the light uses electronic
ballast. The LTC3588-2 bridge rectifier can handle a wide
range of input frequencies.
Figure 9 shows the LTC3588-2 powered by a 48V communications line. In this example, 1mA is the maximum
current that is allowed to be drawn. The 28k current limiting
resistor sets this current as the LTC3588-2 will shunt VIN
at 20V. The advantage of this scheme is that the current at
the output is multiplied by the ratio of VIN to VOUT (less the
loss in the buck converter). This is useful in cases where
greater current is needed at the output than is available
at the input. The high UVLO of 16V prevents any start-up
issue as there is already a good multiplication factor at
that level. This same technique can be extended to AC
source that also have limited current available at the input.
48V
28k
PZ1
1mA
1µF
6V
47µF
25V
4.7µF
6V
PZ2
VIN
PGOOD
LTC3588-2
22µH
CAP
SW
VIN2
VOUT
D1
D0
GND
PGOOD
VOUT
3.45V
3.5mA
10µF
6V
+
LiFePO4
35882 F09
Figure 9. Current Fed 3.45V LiFePO4 Battery Charger
35882fa
14
LTC3588-2
Package Description
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699 Rev C)
0.70 ±0.05
3.55 ±0.05
1.65 ±0.05
2.15 ±0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 ± 0.05
0.50
BSC
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
3.00 ±0.10
(4 SIDES)
R = 0.125
TYP
6
0.40 ± 0.10
10
1.65 ± 0.10
(2 SIDES)
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
CHAMFER
PIN 1
TOP MARK
(SEE NOTE 6)
0.200 REF
0.75 ±0.05
0.00 – 0.05
5
1
(DD) DFN REV C 0310
0.25 ± 0.05
0.50 BSC
2.38 ±0.10
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
35882fa
15
LTC3588-2
Package Description
MSE Package
10-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1664 Rev G)
BOTTOM VIEW OF
EXPOSED PAD OPTION
1.88 ± 0.102
(.074 ± .004)
5.23
(.206)
MIN
1
0.889 ± 0.127
(.035 ± .005)
0.05 REF
10
0.305 ± 0.038
(.0120 ± .0015)
TYP
RECOMMENDED SOLDER PAD LAYOUT
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
DETAIL “B”
CORNER TAIL IS PART OF
DETAIL “B” THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
NO MEASUREMENT PURPOSE
10 9 8 7 6
DETAIL “A”
0° – 6° TYP
1 2 3 4 5
GAUGE PLANE
0.53 ± 0.152
(.021 ± .006)
DETAIL “A”
0.18
(.007)
0.497 ± 0.076
(.0196 ± .003)
REF
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
4.90 ± 0.152
(.193 ± .006)
0.254
(.010)
0.29
REF
1.68
(.066)
1.68 ± 0.102 3.20 – 3.45
(.066 ± .004) (.126 – .136)
0.50
(.0197)
BSC
1.88
(.074)
SEATING
PLANE
0.86
(.034)
REF
1.10
(.043)
MAX
0.17 – 0.27
(.007 – .011)
TYP
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD
SHALL NOT EXCEED 0.254mm (.010") PER SIDE.
0.1016 ± 0.0508
(.004 ± .002)
MSOP (MSE) 0910 REV G
35882fa
16
LTC3588-2
Revision History
REV
DATE
DESCRIPTION
PAGE NUMBER
A
5/11
Add brackets to Absolute Maximum Ratings for VOUT and PGOOD.
2
Replace MS package description to the correct MSE package description.
15
Add to Related Parts section and order parts by part number.
16
35882fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
17
LTC3588-2
Typical Application
Piezoelectric Shunt Charger for Small Li-Ion Cells or Thin Film Batteries
ADVANCED CERAMETRICS PFCB-W14
1µF
6.3V
22µF
25V
PZ1
PZ2
VIN
SW
22µH
8.87k
100µA CONTINUOUS
20mA PULSED
LTC3588-2 VOUT
CAP
COUT
47µF
6.3V
VIN2
4.7µF
6.3V
VOUT
5.0V
D1
D0
PGOOD
GND
VCC
NTCBIAS
10k
DMP2104LP
ADJ
NC7SVL04
LTC4070
NTC
T*
LBO
GND
* NTHS0805E3103LT
LOCATE NEAR BATTERY
4.7M
Li-ION
+
INFINITE POWER SOLUTIONS
MEC101-10SES
4.1V
1mAh
35882 TA02
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PART NUMBER DESCRIPTION
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35882fa
18 Linear Technology Corporation
LT 0511 REV A • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
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