Precision, Selectable Gain, Fully Differential Funnel Amplifier AD8475 Data Sheet 13 –VS 14 –VS 15 –VS 16 +IN 0.4x FUNCTIONAL BLOCK DIAGRAMS 1kΩ +IN 0.4x 1 1.25kΩ +IN 0.8x 2 11 –OUT AD8475 1.25kΩ –IN 0.8x 3 12 NC 1.25kΩ 10 +OUT 1.25kΩ 1kΩ –IN 0.4x 4 VOCM 09432-001 +VS 8 +VS 7 9 +VS 6 Precision attenuation: G = 0.4, G = 0.8 Fully differential or single-ended input/output Differential output designed to drive precision ADCs Drives switched capacitor and Σ-Δ ADCs Rail-to-rail output VOCM pin adjusts output common-mode voltage Robust overvoltage protection up to ±15 V (VS = +5 V) Single supply: 3 V to 10 V Dual supplies: ±1.5 V to ±5 V High performance Suited for driving 18-bit converters up to 4 MSPS 10 nV/√Hz output noise 3 ppm/°C gain drift 500 μV maximum output offset 50 V/μs slew rate Low power: 3.2 mA supply current –IN 0.4x 5 FEATURES NC = NO CONNECT NC 7 –OUT –VS 8 6 +IN 0.4x 9 10 1kΩ 1.25kΩ 1kΩ The AD8475 is a simple to use, fully integrated precision gain block, designed to process signal levels of up to ±10 V on a single supply. It provides a complete interface to make industrial level signals directly compatible with the differential input ranges of low voltage high performance 16-bit or 18-bit single-supply successive approximation (SAR) analog-to-digital converters (ADCs). The AD8475 comes with two standard pin-selectable gain options: 0.4 and 0.8. The gain of the part is set by driving the input pin corresponding to the appropriate gain. The AD8475 also provides overvoltage protection from large industrial input voltages up to ±15 V while operating on a single 5 V supply. The VOCM pin adjusts the output voltage common mode for precision level shifting, to match the ADC’s input range and maximize dynamic range. +OUT 5 AD8475 VOCM 4 1.25kΩ 1.25kΩ +VS 3 The AD8475 is a fully differential, attenuating amplifier with integrated precision gain resistors. It provides precision attenuation (by 0.4 or 0.8), common-mode level shifting, and single-ended-todifferential conversion along with input overvoltage protection. Power dissipation on a single 5 V supply is only 16 mW. –IN 0.4x 2 1.25kΩ –IN 0.8x 1 GENERAL DESCRIPTION NC = NO CONNECT 09432-002 ADC drivers Differential instrumentation amplifier building blocks Single-ended-to-differential converters +IN 0.8x Figure 1. 16-Lead LFCSP APPLICATIONS Figure 2. 10-Lead MSOP The AD8475 works extremely well with SAR, Σ-Δ, and pipeline converters. The high current output stage of the part allows it to drive the switched capacitor front-end circuits of many ADCs with minimal error. Unlike many differential drivers in the market, the AD8475 is a high precision amplifier. With 500 µV maximum output offset, 10 nV/√Hz output noise, and −112 dB THD + N, the AD8475 pairs well with high accuracy converters. Considering its low power consumption and high precision, the slew-enhanced AD8475 has excellent speed, settling to 18-bit precision for 4 MSPS acquisition. The AD8475 is available in a space-saving 16-lead 3 mm × 3 mm LFCSP package and a 10-lead MSOP package. It is fully specified over the −40°C to +85°C temperature range. Rev. D Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2010–2017 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com AD8475 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Circuit Information .................................................................... 17 Applications ....................................................................................... 1 DC Precision ............................................................................... 17 General Description ........................................................................... 1 Input Voltage Range ................................................................... 18 Functional Block Diagrams ............................................................. 1 Driving the AD8475................................................................... 18 Revision History ............................................................................... 2 Power Supplies ............................................................................ 18 Specifications..................................................................................... 3 Applications Information .............................................................. 19 Absolute Maximum Ratings ............................................................ 5 Typical Configuration ................................................................ 19 Thermal Resistance ...................................................................... 5 Single-Ended to Differential Conversion ................................ 19 ESD Caution .................................................................................. 5 Setting the Output Common-Mode Voltage .......................... 19 Pin Configurations and Function Descriptions ........................... 6 High Performance ADC Driving ............................................. 20 Typical Performance Characteristics ............................................. 8 AD8475 Evaluation Board ............................................................ 22 Terminology .................................................................................... 16 Outline Dimensions ....................................................................... 23 Theory of Operation ...................................................................... 17 Ordering Guide .......................................................................... 24 Overview...................................................................................... 17 REVISION HISTORY 3/2017—Rev. C to Rev. D Changes to Figure 3 .......................................................................... 6 Updated Outline Dimensions ....................................................... 23 Changes to Ordering Guide .......................................................... 24 1/2014—Rev. B to Rev. C Changed Minimum B Grade Output Balance Error from 90 dB to −90 dB............................................................................................ 3 Changes to Endnote 3; Table 1 ........................................................ 4 Changes to Terminology Section.................................................. 16 Changes to Input Voltage Range Section and Figure 51 ........... 18 Changes to Single-Ended to Differential Conversion Section and Setting the Output Common-Mode Voltage Section ......... 19 Changes to Figure 56 ...................................................................... 22 4/2011—Rev. A to Rev. B Added B Grade Columns to Specifications Section .....................3 Changes to Figure 16.........................................................................9 Changes to Figure 43...................................................................... 14 Changes to Ordering Guide .......................................................... 24 1/2011—Rev. 0 to Rev. A Added 16-Lead LFCSP ................................................. Throughout Changes to Table 1 and Note 3 ........................................................3 Change to Table 2 ..............................................................................5 Added Figure 3 and Table 4; Renumbered Sequentially ..............6 Changes to Typical Performance Characteristics Format ............8 Added AD8475 Evaluation Board Section and Figure 56......... 22 10/2010—Revision 0: Initial Version Rev. D | Page 2 of 24 Data Sheet AD8475 SPECIFICATIONS VS = 5 V, G = 0.4, VOCM connected to 2.5 V, RL = 1 kΩ differentially, TA = 25°C, referred to output (RTO), unless otherwise noted. Table 1. Parameter DYNAMIC PERFORMANCE −3 dB Small Signal Bandwidth −3 dB Large Signal Bandwidth Slew Rate Settling Time to 0.01% Settling Time to 0.001% NOISE/DISTORTION 1 THD + N HD2 HD3 IMD3 IMD3 Output Voltage Noise Spectral Noise Density GAIN Gain Error Gain Drift Gain Nonlinearity OFFSET AND CMRR Offset 2 vs. Temperature vs. Power Supply Common-Mode Rejection Ratio INPUT CHARACTERISTICS Input Voltage Range 3 Impedance 4 Single-Ended Input Differential Input Common Mode Input OUTPUT CHARACTERISTICS Output Swing Output Balance Error Output Impedance Capacitive Load Short-Circuit Current Limit VOCM CHARACTERISTICS VOCM Input Voltage Range VOCM Input Impedance VOCM Gain Error Test Conditions/Comments Min B Grade Typ Max Min A Grade Typ Max Unit 150 150 MHz 15 15 MHz 2 V step 2 V step on output 2 V step on output 50 45 50 50 45 50 V/µs ns ns f = 100 kHz, VOUT = 4 V p-p, 22 kHz band-pass filter f = 1 MHz, VOUT = 2 V p-p f = 1 MHz, VOUT = 2 V p-p f1 = 0.95 MHz, f2 = 1.05 MHz, VOUT = 2 V p-p f1 = 95 kHz, f2 = 105 kHz, VOUT = 2 V p-p f = 0.1 Hz to 10 Hz f = 1 kHz −112 −112 dB −110 −96 −90 −110 −96 −90 dB dB dBc −84 −84 dBc 2.5 10 0.4 2.5 10 0.4 µV p-p nV/√Hz V/V % ppm/°C ppm RL = ∞ −40°C ≤ TA ≤ +85°C VOUT = 4 V p-p RTO −40°C ≤ TA ≤ +85°C VS = ±2.5 V to ±5 V VINcm = ±5 V Differential input Single-ended input VINcm = VS/2 1 2.5 50 2.5 0.02 3 1 2.5 200 90 86 50 2.5 −6.25 −12.5 +6.25 +12.5 −VS + 0.05 –90 −6.25 −12.5 +VS − 0.05 −VS + 1 +6.25 +12.5 V V −VS + 0.05 −80 kΩ kΩ kΩ +VS − 0.05 dB Ω pF mA 0.1 30 110 +VS 100 −VS + 1 +VS 100 0.02 Rev. D | Page 3 of 24 µV µV/°C dB dB 2.92 5 1.75 0.1 30 110 Per output 500 90 76 2.92 5 1.75 ∆VOUT,cm/∆VOUT,dm 0.05 3 0.02 V kΩ % AD8475 Parameter POWER SUPPLY Specified Voltage Operating Voltage Range Supply Current Over Temperature TEMPERATURE RANGE Specified Performance Range Operating Range Data Sheet Test Conditions/Comments Min B Grade Typ Max Min 5 3 3 −40°C ≤ TA ≤ +85°C −40 −40 A Grade Typ Max 5 10 3.2 4 3 +85 +125 −40 −40 3 Includes amplifier voltage and current noise, as well as noise of internal resistors. Includes input bias and offset current errors. 3 The input voltage range is a function of the voltage supplies and ESD diodes. See the Input Voltage Range section for more information. 4 Internal resistors are trimmed to be ratio matched but have ±20% absolute accuracy. 1 2 Rev. D | Page 4 of 24 Unit 10 3.2 4 V V mA mA +85 +125 °C °C Data Sheet AD8475 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 2. Parameter Supply Voltage Maximum Voltage at Any Input Pin Minimum Voltage at Any Input Pin Storage Temperature Range Specified Temperature Range Operating Temperature Range Junction Temperature ESD (FICDM) ESD (HBM) Rating 11 V +VS + 10.5 V −VS − 16 V −65°C to +150°C −40°C to +85°C −40°C to +125°C 150°C 1500 V 2000 V θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 3. Thermal Resistance Package Type 16-Lead LFCSP (Exposed Pad) 10-Lead MSOP ESD CAUTION Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. D | Page 5 of 24 θJA 84.90 214.0 Unit °C/W °C/W AD8475 Data Sheet 13 –VS 14 –VS 15 –VS 16 +IN 0.4x PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS +IN 0.4x 1 12 NC +IN 0.8x 2 AD8475 11 –OUT –IN 0.8x 3 TOP VIEW (Not to Scale 10 +OUT –IN 0.4x 4 NOTES 1. NC = NO CONNECT. 2. SOLDER THE EXPOSED PADDLE ON THE BACK OF THE PACKAGE TO A GROUND PLANE. 09432-003 +VS 8 +VS 7 +VS 6 –IN 0.4x 5 9 VOCM Figure 3. 16-Lead LFCSP Pin Configuration Table 4. 16-Lead LFCSP Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Mnemonic +IN 0.4x +IN 0.8x −IN 0.8x −IN 0.4x −IN 0.4x +VS +VS +VS VOCM +OUT −OUT NC −VS −VS −VS +IN 0.4x EPAD Description Positive Input for 0.4 Attenuation. Positive Input for 0.8 Attenuation Negative Input for 0.8 Attenuation. Negative Input for 0.4 Attenuation. Negative Input for 0.4 Attenuation. Positive Supply. Positive Supply. Positive Supply. Output Common-Mode Adjust. Positive Output. Negative Output. No Connect. Negative Supply. Negative Supply. Negative Supply. Positive Input for 0.4 Attenuation. Solder the exposed paddle on the back of the package to a ground plane. Rev. D | Page 6 of 24 Data Sheet AD8475 –IN 0.4x 2 10 +IN 0.8x 9 +IN 0.4x 8 –VS VOCM 4 7 NC +OUT 5 6 –OUT +VS 3 AD8475 TOP VIEW (Not to Scale NC = NO CONNECT 09432-004 –IN 0.8x 1 Figure 4. 10-Lead MSOP Pin Configuration Table 5. 10-Lead MSOP Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 Mnemonic −IN 0.8x −IN 0.4x +VS VOCM +OUT −OUT NC −VS +IN 0.4x +IN 0.8x Description Negative Input for 0.8 Attenuation Negative Input for 0.4 Attenuation Positive Supply Output Common-Mode Adjust Noninverting Output Inverting Output No Connect Negative Supply Positive Input for 0.4 Attenuation Positive Input for 0.8 Attenuation Rev. D | Page 7 of 24 AD8475 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, VS = 5 V, gain = 0.4, RLOAD = 1 kΩ, RTO, unless otherwise specified. 10 1000 REPRESENTATIVE SAMPLES 800 VS = +5V, VOCM = +2.5V 8 COMMON-MODE VOLTAGE (V) –4.97V, +7.75V 600 G = 0.8 200 G = 0.4 0 –200 –400 –600 4 –2.97V, +3.25V 0V, +3.25V +2.95V, +3.25V 2 0 VS = +3V, VOCM = +1.5V –2 –4 –2.97V, –3.75V +2.95V, –3.75V 0V, –3.75V –6 –800 –20 0 20 40 60 80 100 120 TEMPERATURE (°C) 0V, –6.25V –4.97V, –6.25V –8 –5.5 –4.5 –3.5 –2.5 –1.5 –0.5 0.5 09432-006 –1000 –40 +4.95V, –6.25V 1.5 2.5 3.5 4.5 5.5 OUTPUT VOLTAGE (V) Figure 8. Input Common-Mode Voltage vs. Output Voltage, VS = +5 V and +3 V Figure 5. System Offset vs. Temperature 150 5 REPRESENTATIVE SAMPLES 4 VIN = ±5V REPRESENTATIVE SAMPLES 100 3 GAIN ERROR (µV/V) 2 CMRR (µV/V) +4.95V, +7.75V 09432-008 VOSO (µV) 400 0V, +7.75V 6 1 0 –1 –2 –3 50 0 –50 –100 –20 0 20 40 60 80 100 120 TEMPERATURE (°C) –150 –40 09432-005 –5 –40 –20 0 20 40 60 80 100 120 TEMPERATURE (°C) 09432-100 –4 Figure 9. Gain Error vs. Temperature, VS = ±5 V Figure 6. CMRR vs. Temperature (G = 0.8) 130 65 125 SHORT-CIRCUIT CURRENT (mA) 55 50 45 FALL 40 RISE 120 115 110 105 100 95 90 35 –20 0 20 40 60 80 TEMPERATURE (°C) 100 120 80 –40 –20 0 20 40 60 80 100 TEMPERATURE (°C) Figure 7. Slew Rate vs. Temperature Figure 10. Short-Circuit Current vs. Temperature Rev. D | Page 8 of 24 120 09432-016 85 30 –40 09432-015 SLEW RATE (V/µs) 60 AD8475 –40°C +25°C +85°C +105°C +125°C 10k 100k 1M RLOAD (Ω) Figure 11. Output Voltage Swing vs. RLOAD vs. Temperature, VS = ±5 V and +5 V 1.0 0.8 0.6 0.4 0.2 –VS 10µA 100µA 1mA 10mA 100mA OUTPUT CURRENT (A) Figure 14. Output Voltage Swing vs. Output Current vs. Temperature, VS = ±5 V and +5 V 10 MAXIMUM OUTPUT VOLTAGE ( V p-p) 0.8 × VIN 09432-051 2V/DIV VOUT 100µs/DIV 9 8 7 6 5 4 3 2 1 0 100 1k 10k 100k 1M 09432-012 1k –40°C +25°C +85°C +105°C +125°C 10M FREQUENCY (Hz) Figure 15. Maximum Output Voltage vs. Frequency 100 –30 90 G = 0.8 –40 80 G = 0.4 –50 70 CMRR (dB) –20 –60 –70 60 50 –80 40 –90 30 –100 100k 1M 10M FREQUENCY (Hz) 09432-011 PSRR (dB) Figure 12. Overdrive Recovery Figure 13. Power Supply Rejection Ratio (PSRR) vs. Frequency 20 1k 10k 100k 1M FREQUENCY (Hz) Figure 16. CMRR vs. Frequency Rev. D | Page 9 of 24 10M 100M 09432-216 1.0 0.8 0.6 0.4 0.2 –VS 100 +VS 0.2 0.4 0.6 0.8 1.0 09432-014 OUTPUT VOLTAGE SWING (V) REFERRED TO SUPPLY VOLTAGES +VS 0.2 0.4 0.6 0.8 1.0 09432-013 OUTPUT VOLTAGE SWING (V) REFERRED TO SUPPLY VOLTAGES Data Sheet AD8475 Data Sheet 0 –1.94 G = 0.8 0 –1.94 G = 0.4 –20 GAIN (dB) GAIN (dB) –7.96 –10 –30 G = 0.8 –7.96 –10 G = 0.4 –20 10k 100k 1M 10M 100M 1G FREQUENCY (Hz) –30 1k 09432-017 –50 1k 100k 1M 10M 100M FREQUENCY (Hz) Figure 20. Large Signal Frequency Response for All Gains, VS = ±5 V Figure 17. Small Signal Frequency Response for All Gains VS = ±5 V 0 10k 09432-019 –40 0 VS = ±5V VS = +3V VS = +5V –7.96 –10 VS = ±5V VS = +3V VS = +5V –7.96 GAIN (dB) GAIN (dB) –10 –20 –20 100k 1M 10M 100M FREQUENCY (Hz) –30 1k –10 –10 –20 –20 GAIN (dB) 0 –30 –40 10M 100M –30 –40 RL = 200Ω RL = 1kΩ RL = 10kΩ 10M 100M FREQUENCY (Hz) 09432-022 GAIN (dB) 1M Figure 21. Large Signal Frequency Response for Various Supplies 0 1M 100k FREQUENCY (Hz) Figure 18. Small Signal Frequency Response for Various Supplies –50 100k 10k Figure 19. Small Signal Frequency Response for Various Loads –50 100k RL = 200Ω RL = 1kΩ RL = 10kΩ 1M 10M 100M FREQUENCY (Hz) Figure 22. Large Signal Frequency Response for Various Loads Rev. D | Page 10 of 24 09432-024 10k 09432-018 –40 1k 09432-020 –30 Data Sheet 0 AD8475 0 CL = 0pF CL = 5pF CL = 10pF –7.96 –10 CL = 0pF CL = 5pF CL = 10pF –7.96 GAIN (dB) GAIN (dB) –10 –20 –20 10k 100k 1M 10M 100M FREQUENCY (Hz) Figure 23. Small Signal Frequency Response for Various Capacitive Loads 0 –30 1k 09432-025 –40 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) 09432-027 –30 Figure 26. Large Signal Frequency Response for Various Capacitive Loads 0 VOCM = 1V VOCM = 2.5V VOCM = 4V VOCM = 1.5V VOCM = 2.5V VOCM = 3.5V –10 GAIN (dB) GAIN (dB) –10 –20 –20 100k 1M 10M 100M FREQUENCY (Hz) Figure 24. Small Signal Frequency Response for Various VOCM Levels 100k 1M 10M 100M FREQUENCY (Hz) Figure 27. Large Signal Frequency Response for Various VOCM Levels 10 VOUT = 100mV p-p VOCM = 2.5V VOUT = 2V p-p VOCM = 2.5V 0 VOCM GAIN (dB) 0 –5 –10 –10 –20 –30 –15 –2 1k 10k 100k 1M 10M FREQUENCY (Hz) 09432-056 VOCM GAIN (dB) 10k –40 1k 10k 100k 1M 10M FREQUENCY (Hz) Figure 28. VOCM Large Signal Frequency Response Figure 25. VOCM Small Signal Frequency Response Rev. D | Page 11 of 24 09432-055 5 –30 1k 09432-026 –40 10k 09432-028 –30 AD8475 Data Sheet VOUT = 2V p-p 20ns/DIV Figure 29. Small Signal Pulse Response, VS = ±2.5 V 09432-033 10ns/DIV 09432-029 20mV/DIV 500mV/DIV VOUT = 100mV p-p Figure 32. Large Signal Pulse Response, VS = ±2.5 V CL = 0pF CL = 5pF CL = 10pF 20ns/DIV Figure 30. Small Signal Step Response for Various Capacitive Loads, VS = ±2.5 V 09432-035 10ns/DIV 09432-031 20mV/DIV 500mV/DIV CL = 0pF CL = 5pF CL = 10pF Figure 33. Large Signal Step Response for Various Capacitive Loads RL = 200Ω RL = 1kΩ RL = 10kΩ 20ns/DIV Figure 31. Small Signal Step Response for Various Resistive Loads 09432-034 10ns/DIV 09432-030 20mV/DIV 500mV/DIV RL = 200Ω RL = 1kΩ RL = 10kΩ Figure 34. Large Signal Step Response for Various Resistive Loads Rev. D | Page 12 of 24 AD8475 500ns/DIV Figure 35. VOCM Small Signal Step Response, VS = ±2.5 V –20 = 0.4 = 0.4 = 0.8 = 0.8 –60 –80 –100 –120 10 –80 –100 –140 0.1 09432-043 1 FREQUENCY (MHz) 1 10 FREQUENCY (MHz) Figure 36. Harmonic Distortion vs. Frequency at Various Gains Figure 39. Harmonic Distortion vs. Frequency at Various Supplies –20 –20 VOUT = 2V p-p HD2, RL = 1kΩ HD3, RL = 1kΩ –40 HD2, RL = 200Ω HD3, RL = 200Ω HARMONIC DISTORTION (dBc) –40 –60 –80 –100 –120 HD2, HD3, HD2, HD3, VOUT = 2V p-p VOUT = 2V p-p VOUT = 4V p-p VOUT = 4V p-p –60 –80 –100 –120 1 10 FREQUENCY (MHz) 09432-040 HARMONIC DISTORTION (dBc) –60 –120 –140 0.1 –140 0.1 VOUT = 2V p-p HD2, VS = +5V HD3, VS = +5V –40 HD2, VS = ±5V HD3, VS = ±5V 09432-042 G G G G Figure 37. Harmonic Distortion vs. Frequency at Various Loads –140 0.1 1 10 FREQUENCY (MHz) Figure 40. Harmonic Distortion vs. Frequency at Various VOUT,dm Rev. D | Page 13 of 24 09432-046 HARMONIC DISTORTION (dBc) –40 HD2, HD3, HD2, HD3, Figure 38. VOCM Large Signal Step Response HARMONIC DISTORTION (dBc) –20 09432-036 50ns/DIV 09432-032 20mV/DIV 500mV/DIV Data Sheet AD8475 Data Sheet –20 SPURIOUS-FREE DYANMIC RANGE (dBc) HARMONIC DISTORTION (dBc) f = 100kHz HD2, +5V SUPPLY HD3, +5V SUPPLY –40 HD2, ±5V SUPPLY HD3, ±5V SUPPLY –60 –80 –100 –140 0 1 4 3 2 6 5 7 8 9 VOUT (V p-p) –60 –80 –100 –120 –140 0.1 09432-047 –120 VOUT = 2V p-p RL = 1kΩ RL = 200Ω –40 1 10 FREQUENCY (MHz) 09432-049 –20 Figure 44. Spurious-Free Dynamic Range vs. Frequency at Various Loads Figure 41. Harmonic Distortion vs. VOUT at Various Supplies 100 10 0 NORMALIZED SPECTRUM (dBc) –10 OUTPUT IMPEDANCE (Ω) –20 –30 –40 –50 –60 –70 –80 10 1 0.1 –90 80 85 90 95 100 105 110 115 120 125 FREQUENCY (kHz) 0.01 10k 100k 1M 10M 100M FREQUENCY (Hz) Figure 45. Output Impedance vs. Frequency Figure 42. 100 kHz Intermodulation Distortion 100 90 70 500nV/DIV 60 50 40 30 20 0 1 10 100 1k 10k FREQUENCY (Hz) 100k 1s/DIV Figure 43. Voltage Noise Density vs. Frequency Figure 46. 0.1 Hz to 10 Hz Voltage Noise Rev. D | Page 14 of 24 09432-039 10 09432-243 VOLTAGE NOISE (nV/ Hz) 80 09432-052 –110 75 09432-054 –100 Data Sheet AD8475 –30 –50 –60 –70 –80 –90 –100 1M 10M FREQUENCY (Hz) 100M 09432-050 OUTPUT BALANCE ERROR (dB) –40 Figure 47. Output Balance Error vs. Frequency Rev. D | Page 15 of 24 AD8475 Data Sheet TERMINOLOGY Common-Mode Voltage Common-mode voltage refers to the average of two node voltages with respect to the local ground reference. The output commonmode voltage is defined as 1kΩ 1.25kΩ VOCM –IN –OUT RL, dm VOUT, dm AD8475 1.25kΩ VOUT, cm = (V+OUT + V−OUT)/2 +OUT 1kΩ The input common-mode voltage is defined as 09432-162 +IN VIN, cm = (V+IN + V−IN)/2 Figure 48. Signal and Circuit Definitions Differential Voltage Differential voltage refers to the difference between two node voltages. For example, the output differential voltage (or equivalently, output differential mode voltage) is defined as VOUT, dm = (V+OUT − V−OUT) where V+OUT and V−OUT refer to the voltages at the +OUT and −OUT terminals with respect to a common ground reference. Similarly, the differential input voltage is defined as Balance Output balance is a measure of how close the output differential signals are to being equal in amplitude and opposite in phase. Output balance is most easily determined by placing a wellmatched resistor divider between the differential voltage nodes and comparing the magnitude of the signal at the divider midpoint with the magnitude of the differential signal. By this definition, output balance is the magnitude of the output common-mode voltage divided by the magnitude of the output differential mode voltage. VIN, dm = (V+IN − (V−IN)) Output Balance Error = Rev. D | Page 16 of 24 ∆VOUT , cm ∆VOUT , dm Data Sheet AD8475 THEORY OF OPERATION OVERVIEW DC PRECISION The AD8475 is a fully differential amplifier, with integrated lasertrimmed resistors, that provides precision attenuating gains of 0.4 and 0.8. The internal differential amplifier of the AD8475 differs from conventional operational amplifiers in that it has two outputs whose voltages are equal in magnitude, but move in opposite directions (180° out of phase). An additional input, VOCM, sets the output common-mode voltage. Like an operational amplifier, it relies on high open-loop gain and negative feedback to force the output nodes to the desired voltages. The AD8475 is designed to greatly simplify single-ended-todifferential conversion, common-mode level shifting and precision attenuation of large signals so that they are compatible with low voltage, differential input ADCs. The dc precision of the AD8475 is highly dependent on the accuracy of its internal resistors. Using superposition to analyze the circuit shown in Figure 50, the following equation shows the relationship between the input and output voltages of the amplifier: 1.25kΩ –VS NC RP = 1kΩ 1 VIN ,cm = (VP + VN ) 2 1.25kΩ –IN 0.8x –IN 0.4x +VS The differential closed loop gain of the amplifier is 1kΩ VOCM VOUT ,dm +OUT VIN ,dm 09432-062 1.25kΩ RFP RFN , RN = RGP RGN VIN ,dm = VP − VN –OUT AD8475 1.25kΩ where, = 2RP RN + RP + RN 2 + RP + RN and the common rejection of the amplifier is Figure 49. Block Diagram VOUT ,dm CIRCUIT INFORMATION VIN ,cm The AD8475 amplifier uses a voltage feedback topology; therefore, the amplifier exhibits a nominally constant gain bandwidth product. Like a voltage feedback operational amplifier, the AD8475 also has high input impedance at its internal input terminals (the summing nodes of the internal amplifier) and low output impedance. = 2(RP − RN ) 2 + RP + RN VP RGP RFP VON VOCM VOP VN The AD8475 employs two feedback loops, one each to control the differential and common-mode output voltages. The differential feedback loop, which is fixed with precision laser trimmed on-chip resistors, controls the differential output voltage. Output Common-Mode Voltage (VOCM) The internal common-mode feedback controls the commonmode output voltage. This architecture makes it easy to set the output common-mode level to any arbitrary value independent of the input voltage. The output common-mode voltage is forced by the internal common-mode feedback loop to be equal to the voltage applied to the VOCM input. The VOCM pin can be left unconnected, and the output common-mode voltage self-biases to midsupply by the internal feedback control. Due to the internal common-mode feedback loop and the fully differential topology of the amplifier, the AD8475 outputs are precisely balanced over a wide frequency range. This means that the amplifier’s differential outputs are very close to the ideal of being identical in amplitude and exactly 180° out of phase. RGN RFN 09432-163 +IN 0.8x +IN 0.4x 1 (2RP RN + RP + RN ) 2 1 = VOUT ,cm (RP − RN ) + VOUT ,dm (2 + RP + RN ) 2 VIN ,cm (RP − RN ) + VIN ,dm Figure 50. Functional Circuit Diagram of the AD8475 at a Given Gain The preceding equations show that the gain accuracy and the common-mode rejection (CMRR) of the AD8475 are determined primarily by the matching of the feedback networks (resistor ratios). If the two networks are perfectly matched, that is, if RP and RN equal RF/RG, then the resistor network does not generate any CMRR errors and the differential closed loop gain of the amplifier reduces to v OUT ,dm v IN ,dm = RF RG The AD8475’s integrated resistors are precision wafer-lasertrimmed to guarantee a minimum CMRR of 86dB (50μV/V), and gain error of less that 0.05%. To achieve equivalent precision and performance using a discrete solution, resistors must be matched to 0.01% or better. Rev. D | Page 17 of 24 AD8475 Data Sheet INPUT VOLTAGE RANGE DRIVING THE AD8475 The AD8475 can measure input voltages that are larger than the supply rails. The internal gain and feedback resistors form a divider, which reduces the input voltage seen by the internal input nodes of the amplifier. The largest voltage that can be measured is constrained by the capability of the amplifier’s internal summing nodes. This voltage is defined by the input voltage and the ratio between the feedback and the gain resistors. Figure 51 shows the voltage at the internal summing nodes of the amplifier, defined by the input voltage and internal resistor network. Written in terms of the input and output commonmode voltages, this equation simplifies to Care should be taken to drive the AD8475 with a low impedance source: for example, another amplifier. Source resistance can unbalance the resistor ratios and, therefore, significantly degrade the gain accuracy and common-mode rejection of the AD8475. For the best performance, source impedance to the AD8475 input terminals should be kept below 0.1 Ω. Refer to the DC Precision section for details on the critical role of resistor ratios in the precision of the AD8475. VPLUS VMINUS POWER SUPPLIES The AD8475 operates over a wide range of supply voltages. It can be powered on a single supply as low as 3 V and as high as 10 V. The AD8475 can also operate on dual supplies from ±1.5 V up to ±5 V RG VOUT ,cm RF VIN ,cm RF RG RF RG For the AD8475, RF is 1 kΩ, and RG is either 2.5 kΩ for G = 0.4 or 1.25 kΩ when G = 0.8 is used. A stable dc voltage should be used to power the AD8475. Note that noise on the supply pins can adversely affect performance. For more information, see the PSRR performance curve in Figure 13. The internal amplifier of the AD8475 has rail-to-rail inputs. To obtain accurate measurements with minimal distortion, the voltage at the internal inputs of the amplifier must stay below +VS − 1 V and above −VS. Place a bypass capacitor of 0.1 μF between each supply pin and ground, as close as possible to each supply pin. Use a tantalum capacitor of 10 μF between each supply and ground. It can be farther away from the supply pins and, typically, it can be shared by other precision integrated circuits. For example, with VS = 5 V in a G = 0.4 configuration, the AD8475 can measure a single-ended input as high as ±12.5 V and maintain its excellent distortion performance. The AD8475 provides overvoltage protection for excessive input voltages beyond the supply rails. Integrated ESD protection diodes at the inputs prevent damage to the AD8475 up to +VS + 10.5 V and −VS − 16 V. VP RF + RG VVOCM + 1 RF 2 RG VP − VN + RF RF + RG RF VON VN VOCM VOP VN RG RF Figure 51. Voltages at the Internal Op Amp Inputs of the AD8475 Rev. D | Page 18 of 24 09432-164 RG RG Data Sheet AD8475 APPLICATIONS INFORMATION TYPICAL CONFIGURATION SETTING THE OUTPUT COMMON-MODE VOLTAGE The AD8475 is designed to facilitate single-ended-to-differential conversion, common-mode level shifting, and precision attenuation of large signals so that they are compatible with low voltage ADCs. The VOCM pin of the AD8475 is internally biased with a precision voltage divider comprising two 200 kΩ resistors between the supplies. This divider level shifts the output to midsupply. Relying on the internal bias results in an output common-mode voltage that is within 0.01% of the expected value. Figure 53 shows a typical connection diagram of the AD8475 in a gain of 0.4. To use the AD8475 in a gain of 0.8, drive the ±IN 0.8x inputs with a low impedance source. In cases where control of the output common-mode level is desired, an external source with output resistance less than 100 Ω can be used to drive the VOCM pin. If an external voltage divider consisting of equal resistor values is used to set VOCM to midsupply, higher values can be used because the external resistors are placed in parallel with the internal resistors. The output common-mode gain error listed in the Specifications section assumes that the VOCM input is driven by a low impedance voltage source. SINGLE-ENDED TO DIFFERENTIAL CONVERSION Many industrial systems use single-ended voltages in the signal path; however, the signals are frequently processed by high performance differential input ADCs for higher precision. The AD8475 performs the critical function of precisely converting single-ended signals to the differential inputs of precision ADCs, and it does so with no need for external components. To convert a single-ended signal to a differential signal, connect one input to the signal source and the other input to ground (see Figure 55). Note that either input can be driven by the source with the only effect being that the outputs have reversed polarity. The AD8475 also accepts truly differential input signals in precision systems with differential signal paths. Because of the internal divider, the VOCM pin sources and sinks current, depending on the externally applied voltage and its associated source resistance. It is also possible to connect the VOCM input to the voltage reference of an ADC via a resistor divider as shown in Figure 55. Connecting the VOCM input in this manner reduces power supply noise and optimizes the output common mode voltage of the AD8475 to utilize the entire differential input voltage range of the ADC. If AD8475 is used with a single supply that is the same voltage as the voltage reference, two 10 kΩ resistors connected to the VOCM pin is sufficient to override the internal resistors. Otherwise, a voltage follower should be used to drive VOCM. –VS + 10µF 0.1µF LOW IMPEDANCE INPUT SOURCE 1.25kΩ –VS NC –OUT 1kΩ 1.25kΩ VOUT = (V+OUT – V–OUT) AD8475 1.25kΩ –IN 0.8x –IN 0.4x 10µF + 1.25kΩ +VS 1kΩ VOCM +OUT REF 0.1µF 0.1µF +VS Figure 52. Typical Configuration—10-Lead MSOP Rev. D | Page 19 of 24 09432-200 +IN 0.8x +IN 0.4x AD8475 Data Sheet –VS + 10µF LOW IMPEDANCE INPUT SOURCE VIN 12 NC +IN 0.4x 1 +IN 0.8x 2 1.25kΩ 1kΩ 1.25kΩ 1.25kΩ –IN 0.8x 3 –IN 0.4x 4 13 –VS 14 –VS 15 –VS 16 +IN 0.4x 0.1µF 11 –OUT AD8475 10 +OUT VOUT = (V+OUT – V–OUT) 1kΩ 1.25kΩ 9 VOCM REF + +VS 8 0.1µF 09432-165 10µF +VS 7 –IN 0.4x 5 +VS 6 0.1µF +VS Figure 53. Typical Configuration—16-Lead LFCSP HIGH PERFORMANCE ADC DRIVING The AD8475 is ideally suited for broadband dc-coupled and industrial applications. The circuit in Figure 55 shows an industrial front-end connection for an AD8475 driving an AD7982, a 18-bit, 1 MSPS ADC, with dc coupling on the AD8475 input and output. (The AD7982 achieves its optimum performance when driven differentially.) The AD8475 performs the attenuation of a 20 V p-p input signal, level shifts it, and converts it to a differential signal without the need for any external components. The AD8475 eliminates the need for dual supplies at the front end to accept large bipolar signals. It also eliminates the need for a precision resistor network for attenuation, and a transformer to drive the ADC and perform the singleended-to-differential conversion. The ac and dc performance of the AD8475 are compatible with the 18-bit, 1 MSPS AD7982 PulSAR® ADC and other 16-bit and 18-bit members of the family, which have sampling rates up to 4 MSPS. Some suitable high performance differential ADCs are listed in Table 6. Table 6. High Performance SAR ADCs Part Resolution AD7984 18 Bits Sample Rate 1.33 MSPS AD7982 18 Bits 1 MSPS AD7690 18 Bits 400 kSPS AD7641 18 Bits 2 MSPS Description True differential input, 14 mW, 2.5 V ADC True differential Input, 7.0 mW, 2.5 V ADC True differential input, 4.5 mW, 5 V ADC True differential input, 75 mW, 2.5 V ADC In this example, the AD8475 is powered with a single 5 V supply and used in a gain of 0.4, with a single-ended input converted to a differential output. The input is a 20 V p-p symmetric, ground-referenced bipolar signal. With an output common-mode voltage of 2.5 V, each AD8475 output swings between 0.5 V and 4.5 V, opposite in phase, providing an 8 V p-p differential signal to the ADC input. Rev. D | Page 20 of 24 Data Sheet AD8475 The differential RC network between the AD8475 output and the ADC provides a single-pole filter that reduces undesirable aliasing effects and high frequency noise. The common-mode bandwidth of the filter is 29.5 MHz (20 Ω, 270 pF), and the differential bandwidth is 3.1 MHz (40 Ω, 1.3 nF). 09432-168 The VOCM input is bypassed for noise reduction, and set externally with 1% resistors to maximize output dynamic range on a single 5 V supply. Figure 54. FFT Results of the AD8475 Driving the AD7982 +4.5V +5V +2.5V 4V +10V +2.5V VDD +IN 0.4x 20V NC –OUT +IN 0.8x 20Ω NC –IN 0.8x –IN 0.4x +OUT 20Ω SDO 270pF IN+ VOCM CNV REF –VS SCK AD7982 1.3nF +4.5V +7V TO +18V GND +5V 2.5V 4V ADR435 SDI 270pF AD8475 –10V VIO IN– 10kΩ +5V +0.5V 0.1µF 10kΩ Figure 55. Attenuation and Level Shifting of Industrial Voltages to Drive Single-Supply Precision ADC Rev. D | Page 21 of 24 09432-167 0V +1.8V TO +5V +0.5V +VS AD8475 Data Sheet AD8475 EVALUATION BOARD The AD8475-EVALZ board is designed so that a user can easily evaluate system performance when the AD8475 is mated with any Analog Devices, Inc., SAR ADC. The board can be installed with SMB connectors that mate directly to the Pulsar® Analogto-Digital Converter Evaluation Kit. An evaluation board for the AD8475 is available to facilitate standalone testing of the AD8475 performance and functionality for customer evaluation and system design. The board provides the user flexibility to configure the AD8475 in the desired gain (0.4 or 0.8) and to install the suitable input and load impedances. See the AD8475 product page for more information on the AD8475-EVALZ. –VS (GRN) C4 10µF J1 +IN 0.4x 1 R1 0Ω +IN 0.8x 2 R3 0Ω –IN 0.8x 3 1.25kΩ 1.25kΩ AD8475 1.25kΩ IN– R6 R4 0Ω –IN 0.4x 4 13 –VS 14 –VS 12 NC 1kΩ 11 –OUT R7 10 +OUT R8 R9 1kΩ 1.25kΩ OUT– R12 JP1 OUT+ J4 R10 9 VOCM VOCM J2 J5 +VS 8 +VS 7 +VS 6 C5 0.1µF R11 J3 C1 0.1µF + –IN 0.4x 5 VOCM C3 10µF +VS (RED) Figure 56. AD8475-EVALZ Schematic Rev. D | Page 22 of 24 09432-065 R5 R2 0Ω 15 –VS 16 +IN 0.4x + IN+ C2 0.1µF Data Sheet AD8475 OUTLINE DIMENSIONS 3.10 3.00 SQ 2.90 PIN 1 INDICATOR DETAIL A (JEDEC 95) 0.30 0.23 0.18 0.50 BSC 13 PIN 1 INDICATOR AREA OPTIONS 16 (SEE DETAIL A) 12 1 1.75 1.60 SQ 1.45 EXPOSED PAD 9 TOP VIEW 5 0.20 MIN BOTTOM VIEW 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.20 REF SEATING PLANE PKG-005138 8 FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. 02-23-2017-E TOP VIEW 0.80 0.75 0.70 4 0.50 0.40 0.30 COMPLIANT TO JEDEC STANDARDS MO-220-WEED-6. Figure 57. 16-Lead Lead Frame Chip Scale Package [LFCSP] 3 mm × 3 mm Body and 0.75 mm Package Height (CP-16-22) Dimensions shown in millimeters 3.10 3.00 2.90 10 3.10 3.00 2.90 1 5.15 4.90 4.65 6 5 PIN 1 IDENTIFIER 0.50 BSC 0.95 0.85 0.75 15° MAX 1.10 MAX 0.30 0.15 6° 0° 0.23 0.13 COMPLIANT TO JEDEC STANDARDS MO-187-BA Figure 58. 10-Lead Mini Small Outline Package [MSOP] (RM-10) Dimensions shown in millimeters Rev. D | Page 23 of 24 0.70 0.55 0.40 091709-A 0.15 0.05 COPLANARITY 0.10 AD8475 Data Sheet ORDERING GUIDE Model 1 AD8475ACPZ-R7 AD8475ACPZ-RL AD8475ACPZ-WP AD8475BRMZ AD8475BRMZ-R7 AD8475BRMZ-RL AD8475ARMZ AD8475ARMZ-R7 AD8475ARMZ-RL AD8475-EVALZ 1 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C Package Description 16-Lead Lead Frame Chip Scale Package [LFCSP] 16-Lead Lead Frame Chip Scale Package [LFCSP] 16-Lead Lead Frame Chip Scale Package [LFCSP] 10-Lead Lead Frame Chip Scale Package [MSOP] 10-Lead Lead Frame Chip Scale Package [MSOP] 10-Lead Lead Frame Chip Scale Package [MSOP] 10-Lead Lead Frame Chip Scale Package [MSOP] 10-Lead Lead Frame Chip Scale Package [MSOP] 10-Lead Lead Frame Chip Scale Package [MSOP] Evaluation Board Z = RoHS Compliant Part. ©2010–2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09432-0-3/17(D) Rev. D | Page 24 of 24 Package Option CP-16-22 CP-16-22 CP-16-22 RM-10 RM-10 RM-10 RM-10 RM-10 RM-10 Branding Y3H Y3H Y3H Y41 Y41 Y41 Y31 Y31 Y31