NCV8664 Very Low Iq Low Dropout Linear Regulator The NCV8664 is a precision 3.3 V and 5.0 V fixed output, low dropout integrated voltage regulator with an output current capability of 150 mA. Careful management of light load current consumption, combined with a low leakage process, achieve a typical quiescent current of 22 A. NCV8664 is pin and functionally compatible with NCV4264 and NCV4264−2, and it could replace these parts when very low quiescent current is required. The output voltage is accurate within 2.0%, and maximum dropout voltage is 600 mV at full rated load current. It is internally protected against input supply reversal, output overcurrent faults, and excess die temperature. No external components are required to enable these features. http://onsemi.com MARKING DIAGRAMS TAB 1 2 3 1 Features • • • • • • • • • • 4 3.3 V, 5.0 V Fixed Output 2.0% Output Accuracy, Over Full Temperature Range 30 A Maximum Quiescent Current at IOUT = 100 A 600 mV Maximum Dropout Voltage at 150 mA Load Current Wide Input Voltage Operating Range of 4.5 V to 45 V Internal Fault Protection ♦ −42 V Reverse Voltage ♦ Short Circuit/Overcurrent ♦ Thermal Overload NCV Prefix for Automotive and Other Applications Requiring Site and Control Changes AEC−Q100 Qualified EMC Compliant These are Pb−Free Devices 1 2 AYW V664xG G SOT−223 ST SUFFIX CASE 318E DPAK DT SUFFIX CASE 369C 3 V664xxG ALYWW 1 8 8 1 SOIC−8 Fused CASE 751 1 V664x ALYWX G xx = Voltage Rating DPAK (50 = 5.0 V Version) (33 = 3.3 V Version) x = Voltage Rating SOT223 (5 = 5.0 V Version) (3 = 3.3 V Version) A = Assembly Location L = Wafer Lot Y = Year W, WW = Work Week G or G = Pb−Free Package (Note: Microdot may be in either location) PIN CONNECTIONS (SOT−223/DPAK) PIN FUNCTION 1 VIN 2,TAB GND 3 VOUT (SOIC−8 Fused) PIN FUNCTION 1 NC 2, VIN 3 GND 4. VOUT 5−8. NC ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 11 of this data sheet. © Semiconductor Components Industries, LLC, 2010 September, 2010 − Rev. 18 1 Publication Order Number: NCV8664/D NCV8664 IN OUT Bias Current Generators 1.3 V Reference + Error Amp - Thermal Shutdown GND Figure 1. Block Diagram PIN FUNCTION DESCRIPTION Pin No. DPAK/SOT−223 SOIC−8 Symbol 1 2 VIN 2 3 GND Ground; substrate. Function Unregulated input voltage; 4.5 V to 45 V. 3 4 VOUT Regulated output voltage; collector of the internal PNP pass transistor. TAB − GND Ground; substrate and best thermal connection to the die. − 1, 5−8 NC No Connection. OPERATING RANGE Pin Symbol, Parameter Symbol Min Max Unit VIN, DC Input Operating Voltage VIN 4.5 +45 V Junction Temperature Operating Range TJ −40 +150 °C Symbol Min Max Unit VIN −42 +45 V VOUT −0.3 +18 V MAXIMUM RATINGS Rating VIN, DC Voltage VOUT, DC Voltage Storage Temperature Tstg −55 +150 °C ESD Capability, Human Body Model (Note 1) VESDHB 4000 − V ESD Capability, Machine Model (Note 1) VESDMIM 200 − V Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. This device series incorporates ESD protection and is tested by the following methods: ESD HBM tested per AEC−Q100−002 (EIA/JESD22−A 114C) ESD MM tested per AEC−Q100−003 (EIA/JESD22−A 115C) THERMAL RESISTANCE Min Max Unit Junction−to−Ambient Parameter DPAK SOT−223 SOIC−8 Fused Symbol RJA Condition − − − 101 (Note 2) 99 (Note 2) 145 °C/W Junction−to−Case DPAK SOT−223 SOIC−8 Fused RJC − − − 9.0 17 − °C/W 2. 1 oz., 100 mm2 copper area. http://onsemi.com 2 NCV8664 LEAD SOLDERING TEMPERATURE AND MSL Rating Symbol Lead Temperature Soldering Reflow (SMD Styles Only), Lead Free (Note 3) Min Max − 265 pk 3 2 1 − − − Unit Tsld Moisture Sensitivity Level SOT223 DPAK SOIC−8 Fused MSL °C − 3. Lead Free, 60 sec – 150 sec above 217°C, 40 sec max at peak. ELECTRICAL CHARACTERISTICS (VIN = 13.5 V, Tj = −40°C to +150°C, unless otherwise noted.) Characteristic Symbol Test Conditions Min Typ Max Unit Output Voltage 5.0 V Version VOUT 0.1 mA IOUT 150 mA (Note 4) 6.0 V VIN 28 V 4.900 5.000 5.100 V Output Voltage 5.0 V Version VOUT 0 mA IOUT 150 mA 5.5 V VIN 28 V −40°C TJ 125°C 4.900 5.000 5.100 V Output Voltage 3.3 V Version VOUT 0.1 mA IOUT 150 mA (Note 4) 4.5 V VIN 28 V 3.234 3.300 3.366 V Line Regulation 5.0 V Version VOUT vs. VIN IOUT = 5.0 mA 6.0 V VIN 28 V −25 5.0 +25 mV Line Regulation 3.3 V Version VOUT vs. VIN IOUT = 5.0 mA 4.5 V VIN 28 V −25 5.0 +25 mV Load Regulation VOUT vs. IOUT 1.0 mA IOUT 150 mA (Note 4) −35 5.0 +35 mV Dropout Voltage 5.0 V Version VIN−VOUT IQ = 100 mA (Notes 4 & 5) IQ = 150 mA (Notes 4 & 5) − − 265 315 500 600 mV Dropout Voltage 3.3 V Version VIN−VOUT IQ = 100 mA (Notes 4 & 7) IQ = 150 mA (Notes 4 & 7) − − − − 1.266 1.266 V Iq IOUT = 100 A TJ = 25°C TJ = −40°C to +85°C − − 21 22 29 30 Active Ground Current IG(ON) IOUT = 50 mA (Note 4) IOUT = 150 mA (Note 4) − − 1.3 8.0 3 15 mA Power Supply Rejection PSRR VRIPPLE = 0.5 VP−P, F = 100 Hz − 67 − dB Output Capacitor for Stability 5.0 V Version COUT ESR IOUT = 0.1 mA to 150 mA (Note 4) 10 − − − − 9.0 F Output Capacitor for Stability 3.3 V Version COUT ESR IOUT = 0.1 mA to 150 mA (Note 4) 22 − − − − 18 F Current Limit IOUT(LIM) VOUT = 4.5 V (5.0 V Version) (Note 4) VOUT = 3.0 V (3.3 V Version) (Note 4) 150 150 − − 500 500 mA Short Circuit Current Limit IOUT(SC) VOUT = 0 V (Note 4) 100 − 500 mA TTSD (Note 6) 150 − 200 °C Quiescent Current A PROTECTION Thermal Shutdown Threshold 4. 5. 6. 7. Use pulse loading to limit power dissipation. Dropout voltage = (VIN – VOUT), measured when the output voltage has dropped 100 mV relative to the nominal value obtained with VIN = 13.5 V. Not tested in production. Limits are guaranteed by design. VDO = VIN − VOUT. For output voltage set to < 4.5 V, VDO will be constrained by the minimum input voltage. http://onsemi.com 3 NCV8664 4.5−45 V Input II CIN 1.0 F Vin 1 100 nF 8664 3 IQ Vout Output COUT 10 F, 5.0 V Version 22 F, 3.3 V Version 2 GND Figure 2. Measurement Circuit 4.5−45 V Input Vin CIN 100 nF 1 8664 3 Vout 2 Output COUT 10 F, 5.0 V Version 22 F, 3.3 V Version GND Figure 3. Applications Circuit http://onsemi.com 4 RL NCV8664 Typical Curves 1000 5.0 OUTPUT VOLTAGE (V) 100 ESR () 6.0 Maximum ESR Cout = 10, 22 F 10 1.0 0.1 0 20 40 Vin = 13.5 V 60 80 100 120 140 0 180 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 INPUT VOLTAGE (V) Figure 4. ESR Characterization, 5.0 V Version Figure 5. Output Voltage vs. Input Voltage, 5.0 V Version 8.0 0.40 125°C Vin = 13.5 V QUIESCENT CURRENT (mA) QUIESCENT CURRENT (mA) 160 25°C 7.0 −40°C 6.0 5.0 4.0 3.0 2.0 1.0 0 50 100 150 0.35 8.0 125°C Vin = 13.5 V 25°C 0.30 −40°C 0.25 0.20 0.15 0.10 0.05 0 200 0 5.0 10 15 OUTPUT CURRENT (mA) OUTPUT CURRENT (mA) Figure 6. Current Consumption vs. Output Load, 5.0 V Version Figure 7. Current Consumption vs. Output Load (Low Load), 5.0 V Version 45 20 12 Vin = 13.5 V Iout = 100 A 40 Vin = 13.5 V QUIESCENT CURRENT (mA) QUIESCENT CURRENT (A) 2.0 LOAD CURRENT (mA) 9.0 0 3.0 1.0 Stable Region 0.01 4.0 35 30 25 20 15 10 5.0 0 −50 0 50 100 150 10 Iout = 150 mA 8.0 6.0 Iout = 100 mA 4.0 2.0 0 −50 0 50 100 150 TEMPERATURE (°C) TEMPERATURE (°C) Figure 8. Quiescent Current vs. Temperature, 5.0 V Version Figure 9. Quiescent Current vs. Temperature, 5.0 V Version http://onsemi.com 5 NCV8664 Typical Curves 18 0.45 CURRENT CONSUMPTION (mA) 125°C 0.40 DROPOUT (V) 0.35 0.30 25°C 0.25 −40°C 0.20 0.15 0.10 0.05 0 50 100 150 14 12 10 8.0 6.0 10 20 30 40 Figure 10. Dropout Voltage vs. Output Load, 5.0 V Version Figure 11. Current Consumption vs. Input Voltage, 5.0 V Version 140 5.08 OUTPUT VOLTAGE (V) 5.10 120 100 TA = 25°C 80 TA = 125°C 60 40 20 0 0 INPUT VOLTAGE (V) 160 0 RL = 100 2.0 0 200 RL = 50 4.0 OUTPUT LOAD (mA) 10 20 30 40 5.04 5.02 5.00 4.98 4.96 4.94 4.92 4.90 −50 50 0 50 100 TEMPERATURE (°C) Figure 12. Output Current vs. Input Voltage, 5.0 V Version Figure 13. Output Voltage vs. Temperature, 5.0 V Version 400 350 300 250 200 150 100 Vin = 13.5 V 50 0 −50 0 50 100 TEMPERATURE (°C) Figure 14. Current Limit vs. Temperature, 5.0 V Version http://onsemi.com 6 50 Vin = 13.5 V Load = 10 mA 5.06 INPUT VOLTAGE (V) OUTPUT CURRENT (mA) OUTPUT CURRENT (mA) 0 16 150 150 NCV8664 Typical Curves 100 3.5 90 3.0 OUTPUT VOLTAGE (V) 80 ESR () 70 60 50 40 30 20 Vin = 13.5 V Cout > 22 F 0 25 50 75 100 0 10 20 30 40 Figure 16. Output Voltage vs. Input Voltage, 3.3 V Version 7.0 0.50 6.0 5.0 4.0 3.0 2.0 1.0 Vin = 13.5 V 50 100 150 200 0.45 125°C 0.40 25°C −40°C 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 Vin = 13.5 V 5 0 10 15 20 OUTPUT LOAD (mA) OUTPUT LOAD (mA) Figure 17. Current Consumption vs. Output Load, 3.3 V Version Figure 18. Current Consumption vs. Output Load (Low Load), 3.3 V Version 45 10 40 9 35 30 25 20 15 10 Vin = 13.5 V Iout = 100 A 5 0 −40 Iout = 5 mA Figure 15. ESR Stability, 3.3 V Version QUIESCENT CURRENT (A) QUIESCENT CURRENT (mA) 0 150 125°C 25°C −40°C 0 1.0 INPUT VOLTAGE (V) 8.0 0 1.5 OUTPUT LOAD (mA) 9.0 QUIESCENT CURRENT (A) 125 2.0 0.5 QUIESCENT CURRENT (mA) 10 0 2.5 10 60 110 Iout = 150 mA 8 7 6 5 Iout = 100 mA 4 3 2 1 0 −40 150 25 Vin = 13.5 V 10 60 110 150 TEMPERATURE (°C) TEMPERATURE (°C) Figure 19. Quiescent Current vs. Temperature, 3.3 V Version Figure 20. Quiescent Current vs. Temperature, 3.3 V Version http://onsemi.com 7 NCV8664 Typical Curves 7 DROPOUT VOLTAGE (V) 0.40 CURRENT CONSUMPTION (mA) 0.45 125°C 0.35 0.30 25°C −40°C 0.25 0.20 0.15 0.10 0.05 0 0 50 100 150 6 5 4 3 2 RL = 50 1 RL = 100 0 200 0 10 20 30 40 OUTPUT LOAD (mA) INPUT VOLTAGE (V) Figure 21. Dropout Voltage, 3.3 V Version Figure 22. Current Consumption vs. Input Voltage, 3.3 V Version 3.50 50 250 3.40 CURRENT LIMIT (mA) OUTPUT VOLTAGE (V) 3.45 3.35 3.30 3.25 3.20 3.15 3.10 3.05 3.00 −40 −20 Vin = 14 V Iout = 5 mA 0 20 40 60 80 200 150 100 50 Vin = 13.5 V 0 −40 100 120 125 10 60 110 TEMPERATURE (°C) TEMPERATURE (°C) Figure 23. Output Voltage vs. Temperature, 3.3 V Version Figure 24. Short Circuit Current Limit vs. Temperature, 3.3 V Version http://onsemi.com 8 150 NCV8664 Circuit Description Calculating Power Dissipation in a Single Output Linear Regulator The NCV8664 is a precision trimmed 3.3 V and 5.0 V fixed output regulator. Careful management of light load consumption combined with a low leakage process results in a typical quiescent current of 22 A. The device has current capability of 150 mA, with 600 mV of dropout voltage at full rated load current. The regulation is provided by a PNP pass transistor controlled by an error amplifier with a bandgap reference. The regulator is protected by both current limit and short circuit protection. Thermal shutdown occurs above 150°C to protect the IC during overloads and extreme ambient temperatures. The maximum power dissipation for a single output regulator (Figure 3) is: PD(max) [VIN(max) VOUT(min)] IQ(max) VI(max) Iq (eq. 1) Where: VIN(max) is the maximum input voltage, VOUT(min) is the minimum output voltage, IQ(max) is the maximum output current for the application, and Iq is the quiescent current the regulator consumes at IQ(max). Once the value of PD(Max) is known, the maximum permissible value of RJA can be calculated: Regulator The error amplifier compares the reference voltage to a sample of the output voltage (Vout) and drives the base of a PNP series pass transistor by a buffer. The reference is a bandgap design to give it a temperature−stable output. Saturation control of the PNP is a function of the load current and input voltage. Over saturation of the output power device is prevented, and quiescent current in the ground pin is minimized. The NCV8664 is equipped with foldback current protection. This protection is designed to reduce the current limit during an overcurrent situation. PJA 150 oC TA PD (eq. 2) The value of RJA can then be compared with those in the package section of the data sheet. Those packages with RJA’s less than the calculated value in Equation 2 will keep the die temperature below 150°C. In some cases, none of the packages will be sufficient to dissipate the heat generated by the IC, and an external heat sink will be required. The current flow and voltages are shown in the Measurement Circuit Diagram. Regulator Stability Considerations The input capacitor CIN in Figure 2 is necessary for compensating input line reactance. Possible oscillations caused by input inductance and input capacitance can be damped by using a resistor of approximately 1 in series with CIN. The output or compensation capacitor, COUT helps determine three main characteristics of a linear regulator: startup delay, load transient response and loop stability. The capacitor value and type should be based on cost, availability, size and temperature constraints. Tantalum, aluminum electrolytic, film, or ceramic capacitors are all acceptable solutions, however, attention must be paid to ESR constraints. The aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures (−25°C to −40°C), both the value and ESR of the capacitor will vary considerably. The capacitor manufacturer’s data sheet usually provides this information. The value for the output capacitor COUT shown in Figure 2 should work for most applications; however, it is not necessarily the optimized solution. Stability is guaranteed at values COUT ≥ 10 F and ESR ≤ 9 for 5.0 V version, and COUT ≥ 22 F and ESR ≤ 18 for 3.3 V version, within the operating temperature range. Actual limits are shown in a graph in the Typical Performance Characteristics section. Heat Sinks For proper heat sinking of the SOIC−8 Lead device, connect pins 5 − 8 to the heat sink. A heat sink effectively increases the surface area of the package to improve the flow of heat away from the IC and into the surrounding air. Each material in the heat flow path between the IC and the outside environment will have a thermal resistance. Like series electrical resistances, these resistances are summed to determine the value of RJA: RJA RJC RCS RSA (eq. 3) Where: RJC = the junction−to−case thermal resistance, RCS = the case−to−heat sink thermal resistance, and RSA = the heat sink−to−ambient thermal resistance. RJA appears in the package section of the data sheet. Like RJA, it too is a function of package type. RCS and RSA are functions of the package type, heat sink and the interface between them. These values appear in data sheets of heat sink manufacturers. Thermal, mounting, and heat sinking are discussed in the ON Semiconductor application note AN1040/D, available on the ON Semiconductor Website. http://onsemi.com 9 NCV8664 EMC−Characteristics: Conducted Susceptibility Direct Power Injection: 33 dBm forward power CW Acceptance Criteria: Amplitude Dev. max 2% of Output Voltage All EMC−Characteristics are based on limited samples and not part of production testing, according to 47A/658/CD IEC62132−4 (Direct Power Injection) Test Conditions Supply Voltage Temperature Load VIN = 12 V TA = 23°C ±5°C RL = 35 U1 X1 VIN_HF 1 F3 FERRITE VIN VOUT GND C1 C2 + 10 F X2 VIN_MON NCV8664 2 47 nF X3 VOUT_HF 3 C3 10 nF C4 10 F + F1 FERRITE X4 VOUT_MON F2 FERRITE X5 GND_HF X6 GND_MON Figure 25. Test Circuit 40 40 VIN−pin pass 33 dBm VOUT−pin pass 33 dBm 30 VOUT (dBm) VIN (dBm) 30 20 10 0 20 10 1 10 100 1000 0 1 10 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 26. Typical VIN−pin Susceptibility Figure 27. Typical VOUT−pin Susceptibility http://onsemi.com 10 NCV8664 160 140 JA (°C/W) 120 SOIC−8 Fused 100 SOT223 80 60 DPAK 40 20 0 0 100 200 300 400 COPPER AREA 500 600 700 (mm2) Figure 28. qJA vs. Copper Spreader Area 1000 SOT223 100 SOIC−8 Fused R(t) (°C/W) 10 DPAK 1 0.1 0.01 0.001 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 PULSE TIME (sec) Figure 29. Single−Pulse Heating Curves ORDERING INFORMATION Marking Package Shipping† NCV8664D50R2G V6645 SOIC−8 Fused (Pb−Free) 2500 / Tape & Reel NCV8664D50G V6645 SOIC−8 Fused (Pb−Free) 98 Units / Rail NCV8664DT50RKG V66450G DPAK (Pb−Free) 2500 / Tape & Reel NCV8664DT33RKG V66433G DPAK (Pb−Free) 2500 / Tape & Reel NCV8664ST50T3G V6645 SOT−223 (Pb−Free) 4000 / Tape & Reel NCV8664ST33T3G V6643 SOT−223 (Pb−Free) 4000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. http://onsemi.com 11 NCV8664 PACKAGE DIMENSIONS SOT−223 (TO−261) CASE 318E−04 ISSUE M D b1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 4 HE E 1 2 3 b e1 e C q A 0.08 (0003) DIM A A1 b b1 c D E e e1 L1 HE A1 q MIN 1.50 0.02 0.60 2.90 0.24 6.30 3.30 2.20 0.85 1.50 6.70 0° MILLIMETERS NOM MAX 1.63 1.75 0.06 0.10 0.75 0.89 3.06 3.20 0.29 0.35 6.50 6.70 3.50 3.70 2.30 2.40 0.94 1.05 1.75 2.00 7.00 7.30 10° − L1 SOLDERING FOOTPRINT 3.8 0.15 2.0 0.079 2.3 0.091 2.3 0.091 6.3 0.248 2.0 0.079 1.5 0.059 SCALE 6:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 12 MIN 0.060 0.001 0.024 0.115 0.009 0.249 0.130 0.087 0.033 0.060 0.264 0° INCHES NOM 0.064 0.002 0.030 0.121 0.012 0.256 0.138 0.091 0.037 0.069 0.276 − MAX 0.068 0.004 0.035 0.126 0.014 0.263 0.145 0.094 0.041 0.078 0.287 10° NCV8664 PACKAGE DIMENSIONS DPAK (SINGLE GAUGE) DT SUFFIX CASE 369C−01 ISSUE D A E b3 c2 B Z D 1 L4 A 4 L3 b2 e 2 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. C H DETAIL A 3 DIM A A1 b b2 b3 c c2 D E e H L L1 L2 L3 L4 Z c b 0.005 (0.13) M H C L2 GAUGE PLANE C L SEATING PLANE A1 L1 DETAIL A ROTATED 905 CW INCHES MIN MAX 0.086 0.094 0.000 0.005 0.025 0.035 0.030 0.045 0.180 0.215 0.018 0.024 0.018 0.024 0.235 0.245 0.250 0.265 0.090 BSC 0.370 0.410 0.055 0.070 0.108 REF 0.020 BSC 0.035 0.050 −−− 0.040 0.155 −−− SOLDERING FOOTPRINT* 6.20 0.244 2.58 0.102 5.80 0.228 3.00 0.118 1.60 0.063 6.17 0.243 SCALE 3:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 13 MILLIMETERS MIN MAX 2.18 2.38 0.00 0.13 0.63 0.89 0.76 1.14 4.57 5.46 0.46 0.61 0.46 0.61 5.97 6.22 6.35 6.73 2.29 BSC 9.40 10.41 1.40 1.78 2.74 REF 0.51 BSC 0.89 1.27 −−− 1.01 3.93 −−− NCV8664 PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AJ −X− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. A 8 5 S B 0.25 (0.010) M Y M 1 4 −Y− K G C N DIM A B C D G H J K M N S X 45 _ SEATING PLANE −Z− 0.10 (0.004) H D 0.25 (0.010) M Z Y S X S M J MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0 _ 8 _ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244 SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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