IRF IRF6662PBF Application specific mosfet Datasheet

PD - 97243A
IRF6662PbF
IRF6662TRPbF
DirectFET™ Power MOSFET
Typical values (unless otherwise specified)
RoHs Compliant
Lead-Free (Qualified up to 260°C Reflow)
Application Specific MOSFETs
Ideal for High Performance Isolated Converter
Primary Switch Socket
Optimized for Synchronous Rectification
Low Conduction Losses
High Cdv/dt Immunity
Low Profile (<0.7mm)
Dual Sided Cooling Compatible
Compatible with existing Surface Mount Techniques
VDSS
RDS(on)
VGS
17.5mΩ@ 10V
100V max ±20V max
Qg
Qgd
Qgs2
Qrr
Qoss
Vgs(th)
6.8nC
1.2nC
50nC
11nC
3.9V
tot
22nC
S
D
G
S
D
DirectFET™ ISOMETRIC
MZ
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SQ
SX
ST
MQ
MX
MT
MZ
Description
The IRF6662PbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve
the lowest on-state resistance in a package that has the footprint of a SO-8 and only 0.7 mm profile. The DirectFET package is compatible
with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering
techniques. Application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual
sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
The IRF6662PbF is optimized for primary side bridge topologies in isolated DC-DC applications, for wide range universal input Telecom
applications (36V - 75V), and for secondary side synchronous rectification in regulated DC-DC topologies. The reduced total losses in the device
coupled with the high level of thermal performance enables high efficiency and low temperatures, which are key for system reliability
improvements, and makes this device ideal for high performance isolated DC-DC converters.
Absolute Maximum Ratings
Parameter
VDS
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
VGS
ID @ TA = 25°C
ID @ TA = 70°C
ID @ TC = 25°C
IDM
EAS
IAR
Typical RDS(on) (mΩ)
100
ID = 4.9A
80
60
T J = 125°C
40
20
T J = 25°C
0
4
6
8
10
12
14
16
VGS, Gate -to -Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
Notes:
Click on this section to link to the appropriate technical paper.
Click on this section to link to the DirectFET Website.
Surface mounted on 1 in. square Cu board, steady state.
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VGS, Gate-to-Source Voltage (V)
Pulsed Drain Current
Single Pulse Avalanche Energy
Avalanche Current
Max.
Units
100
±20
8.3
6.6
47
66
39
4.9
V
A
mJ
A
12.0
ID= 4.9A
10.0
8.0
VDS= 80V
VDS= 50V
VDS= 20V
6.0
4.0
2.0
0.0
0
5
10
15
20
25
QG Total Gate Charge (nC)
Fig 2. Typical Total Gate Charge vs.
Gate-to-Source Voltage
TC measured with thermocouple mounted to top (Drain) of part.
Repetitive rating; pulse width limited by max. junction temperature.
Starting TJ = 25°C, L = 3.2mH, RG = 25Ω, IAS = 4.9A.
1
08/25/06
IRF6662PbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min.
Typ.
Max.
Conditions
Units
VGS = 0V, ID = 250µA
BVDSS
Drain-to-Source Breakdown Voltage
100
–––
–––
V
∆ΒVDSS/∆TJ
RDS(on)
Breakdown Voltage Temp. Coefficient
–––
0.10
–––
V/°C
Reference to 25°C, ID = 1mA
Static Drain-to-Source On-Resistance
–––
17.5
22
VGS = 10V, ID = 8.2A
VGS(th)
Gate Threshold Voltage
3.0
3.9
4.9
mΩ
V
∆VGS(th)/∆TJ
IDSS
Gate Threshold Voltage Coefficient
–––
-9.7
–––
mV/°C
IGSS
gfs
Qg
Qgs1
Drain-to-Source Leakage Current
VDS = VGS, ID = 100µA
–––
–––
20
µA
VDS = 100V, VGS = 0V
–––
–––
250
VDS = 80V, VGS = 0V, TJ = 125°C
nA
VGS = 20V
Gate-to-Source Forward Leakage
–––
–––
100
Gate-to-Source Reverse Leakage
–––
–––
-100
Forward Transconductance
11
–––
–––
Total Gate Charge
–––
22
31
Pre-Vth Gate-to-Source Charge
–––
4.9
–––
VDS = 50V
VGS = 10V
VGS = -20V
S
VDS = 10V, ID = 4.9A
Qgs2
Post-Vth Gate-to-Source Charge
–––
1.2
–––
Qgd
Gate-to-Drain Charge
–––
6.8
10
ID = 4.9A
Qgodr
–––
9.1
–––
See Fig. 15
Qsw
Gate Charge Overdrive
Switch Charge (Qgs2 + Qgd)
–––
8.0
–––
Qoss
Output Charge
–––
11
–––
nC
RG
Gate Resistance
–––
1.2
–––
Ω
td(on)
Turn-On Delay Time
–––
11
–––
VDD = 50V, VGS = 10V
tr
Rise Time
–––
7.5
–––
ID = 4.9A
td(off)
Turn-Off Delay Time
–––
24
–––
tf
Fall Time
–––
5.9
–––
Ciss
Input Capacitance
–––
1360
–––
Coss
Output Capacitance
–––
270
–––
Crss
Reverse Transfer Capacitance
–––
61
–––
Coss
Output Capacitance
–––
1340
–––
ƒ = 1.0MHz
VGS = 0V, VDS = 1.0V, f=1.0MHz
Coss
Output Capacitance
–––
160
–––
VGS = 0V, VDS = 80V, f=1.0MHz
Min.
Typ.
Max.
–––
–––
2.5
nC
ns
VDS = 16V, VGS = 0V
RG=6.2Ω
See Fig. 17
VGS = 0V
pF
VDS = 25V
Diode Characteristics
Parameter
IS
Continuous Source Current
(Body Diode)
ISM
Pulsed Source Current
Units
A
–––
–––
Conditions
MOSFET symbol
D
showing the
G
66
integral reverse
p-n junction diode.
TJ = 25°C, IS = 4.9A, VGS = 0V
S
(Body Diode)
VSD
Diode Forward Voltage
–––
–––
1.3
V
trr
Reverse Recovery Time
–––
34
51
ns
TJ = 25°C, IF = 4.9A, VDD = 50V
Qrr
Reverse Recovery Charge
–––
50
75
nC
di/dt = 100A/µs
See Fig. 18
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
2
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IRF6662PbF
Absolute Maximum Ratings
Max.
Units
2.8
1.8
89
270
-40 to + 150
W
Parameter
Power Dissipation
Power Dissipation
Power Dissipation
Peak Soldering Temperature
Operating Junction and
Storage Temperature Range
PD @TA = 25°C
PD @TA = 70°C
PD @TC = 25°C
TP
TJ
TSTG
°C
Thermal Resistance
Parameter
RθJA
RθJA
RθJA
RθJC
RθJ-PCB
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Case
Junction-to-PCB Mounted
Typ.
Max.
Units
–––
12.5
20
–––
1.0
45
–––
–––
1.4
–––
°C/W
100
Thermal Response ( Z thJA )
D = 0.50
10
0.20
0.10
0.05
1
0.02
0.01
τJ
0.1
0.01
SINGLE PULSE
( THERMAL RESPONSE )
R1
R1
τJ
τ1
R2
R2
R3
R3
Ri (°C/W)
R4
R4
τA
τ2
τ1
τ2
τ3
τ3
τ4
1.2801
τA
τ4
Ci= τi/Ri
Ci τi/Ri
τi (sec)
0.000322
8.7256
0.164798
21.7500
2.2576
13.2511
69
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
100
t1 , Rectangular Pulse Duration (sec)
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
Notes:
Used double sided cooling , mounting pad.
Mounted on minimum footprint full size board with metalized
back and with small clip heatsink.
Surface mounted on 1 in. square Cu
(still air).
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Rθ is measured at TJ of approximately 90°C.
Mounted to a PCB with
small clip heatsink (still air)
Mounted on minimum
footprint full size board with
metalized back and with small
clip heatsink (still air)
3
IRF6662PbF
100
100
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
8.0V
7.0V
6.0V
10
6.0V
BOTTOM
6.0V
10
≤60µs PULSE WIDTH
≤60µs PULSE WIDTH
Tj = 150°C
Tj = 25°C
1
0.1
1
1
10
0.1
100
100
2.0
VDS = 10V
≤60µs PULSE WIDTH
10
VGS = 10V
ID = 8.2A
Typical RDS(on) (Normalized)
ID, Drain-to-Source Current (Α)
10
Fig 5. Typical Output Characteristics
100
T J = 150°C
T J = 25°C
T J = -40°C
1
0.1
1.5
1.0
0.5
3
4
5
6
7
8
-60 -40 -20 0
Fig 6. Typical Transfer Characteristics
100000
Fig 7. Normalized On-Resistance vs. Temperature
45
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
T J = 25°C
40
Typical RDS(on) ( mΩ)
C oss = C ds + C gd
10000
Ciss
1000
Coss
100
20 40 60 80 100 120 140 160
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
C, Capacitance(pF)
1
V DS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 4. Typical Output Characteristics
Crss
Vgs = 7.0V
Vgs = 8.0V
Vgs = 10V
Vgs = 15V
35
30
25
20
15
10
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
4
VGS
15V
10V
8.0V
7.0V
6.0V
0
10
20
30
40
50
60
ID, Drain Current (A)
Fig 9. Typical On-Resistance vs. Drain Current
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IRF6662PbF
1000
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
VGS = 0V
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
100
T J = 150°C
T J = 25°C
10
T J = -40°C
1
100µsec
10
1msec
T A = 25°C
Tj = 150°C
Single Pulse
0.1
0
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1
1
10
100
1000
VDS, Drain-to-Source Voltage (V)
VSD, Source-to-Drain Voltage (V)
Fig11. Maximum Safe Operating Area
Fig 10. Typical Source-Drain Diode Forward Voltage
10
Typical VGS(th) Gate threshold Voltage (V)
7.0
8
ID, Drain Current (A)
10msec
1
6
4
2
0
25
50
75
100
125
ID = 100µA
ID = 250µA
6.0
ID = 1.0mA
ID = 1.0A
5.0
4.0
3.0
2.0
-75 -50 -25
150
0
25
50
75 100 125 150
T J , Temperature ( °C )
T A , Ambient Temperature (°C)
Fig 13. Typical Threshold Voltage vs.
Junction Temperature
Fig 12. Maximum Drain Current vs. Ambient Temperature
EAS , Single Pulse Avalanche Energy (mJ)
160
ID
1.6A
1.9A
BOTTOM 4.9A
140
TOP
120
100
80
60
40
20
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 14. Maximum Avalanche Energy vs. Drain Current
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5
IRF6662PbF
Current Regulator
Same Type as D.U.T.
Id
Vds
50KΩ
Vgs
.2µF
12V
.3µF
D.U.T.
+
V
- DS
Vgs(th)
VGS
3mA
IG
ID
Qgs1 Qgs2
Current Sampling Resistors
Fig 15a. Gate Charge Test Circuit
Qgd
Qgodr
Fig 15b. Gate Charge Waveform
V(BR)DSS
15V
DRIVER
L
VDS
tp
D.U.T
RG
+
V
- DD
IAS
VGS
20V
A
I AS
0.01Ω
tp
Fig 16b. Unclamped Inductive Waveforms
Fig 16a. Unclamped Inductive Test Circuit
RD
VDS
VDS
90%
VGS
D.U.T.
RG
+
- VDD
10V
Pulse Width ≤ 1 µs
10%
VGS
td(on)
tr
td(off)
tf
Duty Factor ≤ 0.1 %
Fig 17a. Switching Time Test Circuit
6
Fig 17b. Switching Time Waveforms
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IRF6662PbF
D.U.T
Driver Gate Drive
+
-
-
-
RG
•
•
•
•
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
di/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
VDD
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
D=
Period
P.W.
+
-
Re-Applied
Voltage
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Body Diode
VDD
Forward Drop
Inductor
Current
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 18. Diode Reverse Recovery Test Circuit for N-Channel
HEXFET® Power MOSFETs
DirectFET™ Substrate and PCB Layout, MZ Outline
(Medium Size Can, Z-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
This includes all recommendations for stencil and substrate designs.
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7
IRF6662PbF
DirectFET™ Outline Dimension, MZ Outline
(Medium Size Can, Z-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
This includes all recommendations for stencil and substrate designs.
DIMENSIONS
METRIC
CODE MIN
MAX
A
6.25
6.35
B
4.80 5.05
C
3.95
3.85
D
0.35
0.45
E
0.72
0.68
F
0.68
0.72
G
0.97
0.93
H
0.63
0.67
J
0.32
0.28
K
1.26
1.13
L
2.66
2.53
M
0.616 0.676
R
0.020 0.080
P
0.17
0.08
IMPERIAL
MAX
MAX
0.246 0.250
0.189 0.201
0.152 0.156
0.014 0.018
0.027 0.028
0.027 0.028
0.037 0.038
0.025 0.026
0.011 0.013
0.044 0.050
0.100 0.105
0.0235 0.0274
0.0008 0.0031
0.003 0.007
DirectFET™ Part Marking
8
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IRF6662PbF
DirectFET™ Tape & Reel Dimension (Showing component orientation).
NOTE: Controlling dimensions in mm
Std reel quantity is 4800 parts. (ordered as IRF6662TRPBF). For 1000 parts on 7"
reel, order IRF6662TR1PBF
STANDARD OPTION
METRIC
CODE
MIN
MAX
A
330.0
N.C
B
20.2
N.C
C
12.8
13.2
D
1.5
N.C
E
100.0
N.C
F
N.C
18.4
G
12.4
14.4
H
11.9
15.4
REEL DIMENSIONS
(QTY 4800)
TR1 OPTION
IMPERIAL
METRIC
MIN
MAX
MIN
MAX
12.992
N.C
177.77 N.C
0.795
19.06
N.C
N.C
0.504
13.5
0.520
12.8
0.059
1.5
N.C
N.C
3.937
58.72
N.C
N.C
N.C
N.C
0.724
13.50
0.488
11.9
0.567
12.01
0.469
11.9
0.606
12.01
(QTY 1000)
IMPERIAL
MAX
MIN
6.9
N.C
0.75
N.C
0.53
0.50
0.059
N.C
2.31
N.C
N.C
0.53
0.47
N.C
0.47
N.C
LOADED TAPE FEED DIRECTION
CODE
A
B
C
D
E
F
G
H
DIMENSIONS
IMPERIAL
METRIC
MIN
MAX
MIN
MAX
0.311
0.319
7.90
8.10
0.154
0.161
3.90
4.10
0.469
0.484
11.90
12.30
0.215
0.219
5.45
5.55
0.201
0.209
5.10
5.30
0.256
0.264
6.50
6.70
0.059
N.C
1.50
N.C
0.059
0.063
1.50
1.60
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.08/06
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9
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
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