AD OP297GS Dual low bias current precision operational amplifier Datasheet

8/21/97 4:00 PM
a
Dual Low Bias Current
Precision Operational Amplifier
OP297
GENERAL DESCRIPTION
The OP297 is the first dual op amp to pack precision performance into the space-saving, industry standard 8-pin SO package. Its combination of precision with low power and extremely
low input bias current makes the dual OP297 useful in a wide
variety of applications.
Precision performance of the OP297 includes very low offset,
under 50 µV, and low drift, below 0.6 µV/°C. Open-loop gain
exceeds 2000 V/mV insuring high linearity in every application.
Plastic Epoxy-DIP (P Suffix)
8-Pin Cerdip (Z Suffix)
8-Pin Narrow Body SOIC (S Suffix)
OUT A 1
8
V+
7
OUT B
+IN A 3
6
–IN B
V– 4
5
+IN B
The OP297 utilizes a super-beta input stage with bias current
cancellation to maintain picoamp bias currents at all temperatures. This is in contrast to FET input op amps whose bias
currents start in the picoamp range at 25°C, but double for
every 10°C rise in temperature, to reach the nanoamp range
above 85°C. Input bias current of the OP 297 is under 100 pA
at 25°C and is under 450 pA over the military temperature
range.
Combining precision, low power and low bias current, the
OP297 is ideal for a number of applications including instrumentation amplifiers, log amplifiers, photodiode preamplifiers
and long-term integrators. For a single device, see the OP97;
for a quad, see the OP497.
400
I B–
40
VS = ±15V
VCM = 0V
IB+
1200 UNITS
NUMBER OF UNITS
INPUT CURRENT (pA)
B
Errors due to common-mode signals are eliminated by the
OP297’s common-mode rejection of over 120 dB. The
OP297’s power supply rejection of over 120 dB minimizes
offset voltage changes experienced in battery powered systems.
Supply current of the OP297 is under 625 µA per amplifier and
it can operate with supply voltages as low as ± 2 V.
60
20
0
20
A
–
+
–IN A 2
–
APPLICATIONS
Strain Gauge and Bridge Amplifiers
High Stability Thermocouple Amplifiers
Instrumentation Amplifiers
Photo-Current Monitors
High-Gain Linearity Amplifiers
Long-Term Integrators/Filters
Sample-and-Hold Amplifiers
Peak Detectors
Logarithmic Amplifiers
Battery-Powered Systems
PIN CONNECTIONS
+
FEATURES
Precision Performance in Standard SO-8 Pinout
Low Offset Voltage: 50 ␮V max
Low Offset Voltage Drift: 0.6 ␮V/ⴗC max
Very Low Bias Current:
␣ ␣ +25ⴗC (100 pA max)
␣ ␣ –55ⴗC to +125ⴗC (450 pA max)
Very High Open-Loop Gain (2000 V/mV min)
Low Supply Current (Per Amplifier): 625 ␮A max
Operates From 62 V to 620 V Supplies
High Common-Mode Rejection: 120 dB min
Pin Compatible to LT1013, AD706, AD708, OP221,
␣ ␣ LM158, and MC1458/1558 with Improved Performance
IOS
300
TA = +25°C
VS = ±15V
VCM = 0V
200
100
–40
–60
–75 –50 –25
0
25 50 75
TEMPERATURE (°C)
100 125
Figure 1. Low Bias Current Over Temperature
0
–100 –80 –60 –40 –20 0 20 40 60 80 100
INPUT OFFSET VOLTAGE (µV)
Figure 2. Very Low Offset
REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
World Wide Web Site: http://www.analog.com
Fax: 617/326-8703
© Analog Devices, Inc., 1997
8/21/97 4:00 PM
OP297–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (@ V = ⴞ15 V, T = +25ⴗC, unless otherwise noted.)
S
Parameter
Symbol Conditions
Input Offset Voltage
Long-Term Input
␣ ␣ Voltage Stability
Input Offset Current
Input Bias Current
Input Noise Voltage
Input Noise
␣ ␣ Voltage Density
Input Noise Current Density
Input Resistance
␣ ␣ Differential Mode
Input Resistance
␣ ␣ Common-Mode
Large-Signal
␣ ␣ Voltage Gain
Input Voltage Range
Common-Mode Rejection
Power Supply Rejection
Output Voltage Swing
VOS
IOS
IB
en p-p
en
en
in
A
␣ ␣ ␣ ␣ OP297A/E
Min Typ Max
25
RIN
RINCM
Supply Current Per Amplifier
Supply Voltage
Slew Rate
Gain Bandwidth Product
Channel Separation
AVO
IVR
CMR
PSR
VO
VO
ISY
VS
SR
GBWP
CS
Input Capacitance
CIN
VO = ± 10 V
RL = 2 kΩ
(Note 1)
VCM = ± 13 V
VS = ± 2 V to ± 20 V
RL = 10 kΩ
RL = 2 kΩ
No Load
Operating Range
AV = +1
VO = 20 V p–p
fO = 10 Hz
50
0.1
20
20
0.5
20
17
20
VCM = 0 V
VCM = 0 V
0.1 Hz to 10 Hz
fO = 10 Hz
fO = 1000 Hz
fO = 10 Hz
2000
± 13
120
120
± 13
± 13
±2
0.05
␣ ␣ ␣ ␣ OP297F
Min Typ
50
␣ ␣ ␣ ␣ ␣ OP297G
Min Typ Max
100
0.1
35
35
0.5
20
17
20
100
± 100
Max
80
0.1
50
50
0.5
20
17
20
150
± 150
200
200
± 200
Units
µV
µV/mo
pA
pA
µV p-p
nV/√Hz
nV/√Hz
fA√Hz
30
30
30
MΩ
500
500
500
GΩ
3200
± 14
135
125
± 14
± 13.7
525 625
± 20
0.15
500
150
V/mV
V
dB
dB
V
V
µA
V
V/µs
kHz
dB
3
pF
4000
± 14
140
130
± 14
± 13.7
525 625
± 20
0.15
500
150
1500
± 13
114
114
± 13
± 13
±2
0.05
3
3200
± 14
135
125
± 14
± 13.7
525 625
± 20
0.15
500
150
1200
± 13
114
114
± 13
± 13
±2
0.05
3
NOTES
1
Guaranteed by CMR test.
Specifications subject to change without notice.
ELECTRICAL CHARACTERISTICS (@ V = ⴞ15 V, –55ⴗC ≤ T ≤ +125ⴗC for OP297A, unless otherwise noted.)
S
Parameter
Symbol
Input Offset Voltage
Average Input Offset Voltage Drift
Input Offset Current
Input Bias Current
Large-Signal Voltage Gain
Input Voltage Range
Common-Mode Rejection
Power Supply Rejection
Output Voltage Swing
Supply Current Per Amplifier
Supply Voltage
VOS
TCVOS
IOS
IB
AVO
IVR
CMR
PSR
VO
ISY
VS
A
Conditions
VCM = 0 V
VCM = 0 V
VO = ± 10 V, RL = 2 kΩ
(Note 1)
VCM = ± 13
VS = ± 2.5 V to ± 20 V
RL = 10 kΩ
No Load
Operating Range
␣␣␣␣␣
Min
1200
± 13
114
114
± 13
± 2.5
OP297A
Typ
45
0.2
60
60
2700
± 13.5
130
125
± 13.4
575
Max
Units
100
0.6
450
± 450
µV
µV/°C
pA
pA
V/mV
V
dB
dB
V
µA
V
750
± 20
NOTES
1
Guaranteed by CMR test.
Specifications subject to change without notice.
–2–
REV. D
8/21/97 4:00 PM
OP297
ELECTRICAL CHARACTERISTICS (@ V = ⴞ15 V, –40ⴗC ≤ T ≤ +85ⴗC for OP297E/F/G, unless otherwise noted.)
S
Parameter
Symbol
Input Offset Voltage
Average Input Offset
Voltage Drift
Input Offset Current
Input Bias Current
Large-Signal Voltage Gain
VOS
Input Voltage Range
Common-Mode Rejection
Power Supply Rejection
IVR
CMR
PSR
TCVOS
IOS
IB
AVO
Output Voltage Swing
VO
Supply Current Per Amplifier ISY
Supply Voltage
VS
A
␣ ␣ ␣ ␣ OP297E
Min Typ Max
Conditions
VCM = 0 V
VCM = 0 V
VO = ±10 V,
RL = 2 kΩ
(Note 1)
VCM = ± 13
VS = ± 2.5 V
to ±20 V
RL = 10 kΩ
No Load
Operating Range
␣ ␣ ␣ ␣ OP297F
Min Typ Max
␣ ␣ ␣ ␣ ␣ OP297G
Min Typ Max
Units
35
100
80
300
110
400
µV
0.2
50
50
0.6
450
± 450
0.5
80
80
2.0
750
± 750
0.6
80
80
2.0
750
± 750
µV/°C
pA
pA
1200
± 13
114
3200
± 13.5
130
1000 2500
± 13 ± 13.5
108 130
700
± 13
108
2500
± 13.5
130
V/mV
V
dB
114
± 13
0.15
± 13.4
550
750
± 20
108
± 13
108
± 13
0.3
± 13.4
550
750
± 20
dB
V
µA
V
± 2.5
± 2.5
0.15
± 13.4
550
750
± 20
± 2.5
NOTES
1
Guaranteed by CMR test.
Specifications subject to change without notice.
Wafer Test Limits (@ V = ⴞ15 V, T = +25ⴗC, unless otherwise noted.)
S
A
Parameter
Symbol
Conditions
Limit
Units
Input Offset Voltage
Input Offset Current
VOS
IOS
VCM = 0 V
200
200
µV max
pA max
Input Bias Current
Large-Signal Voltage Gain
Input Voltage Range
Common-Mode Rejection
Power Supply
Output Voltage Swing
Supply Current Per Amplifier
IB
AVO
IVR
CMR
PSR
VO
ISY
VCM = 0 V
VO = ± 10 V, RL = 2 kΩ
(Note 1)
VCM = ± 13 V
VS = ± 2 V to ± l 8 V
RL = 2 kΩ
No Load
± 200
1200
± 13
114
114
± 13
625
pA max
V/mV min
V min
dB min
dB min
V min
µA max
NOTES
1. Guaranteed by CMR test.
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
DICE CHARACTERISTICS
Dimension shown in inches and (mm).
Contact factory for latest dimensions
+VS
OUTPUT A
0.118 (3.00)
–INPUT A
OUTPUT B
+INPUT A
–INPUT B
–VS
+INPUT B
0.074 (1.88)
REV. D
–3–
8/21/97 4:00 PM
OP297
ABSOLUTE MAXIMUM RATINGS 1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 V
Input Voltage2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 V
Differential Input Voltage2 . . . . . . . . . . . . . . . . . . . . . . . . 40 V
Output Short-Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range
Z Package . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +175°C
P, S Package . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range
OP297A (Z) . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
OP297E, F (Z) . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
OP297F, G (P, S) . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Junction Temperature
Z Package . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +175°C
P, S Package . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . +300°C
Package Type
␪JA3
␪JC
Units
8-Pin Cerdip (Z)
8-Pin Plastic DIP (P)
8-Pin SO (S)
134
96
150
12
37
41
°C/W
°C/W
°C/W
NOTES
1
Absolute maximum ratings apply to both DICE and packaged parts, unless
otherwise noted.
2
For supply voltages less than ± 20 V, the absolute maximum input voltage is equal
to the supply voltage.
3
θJA is specified for worst case mounting conditions, i.e., θJA is specified for device in
socket for cerdip and P-DIP, packages; θJA is specified for device soldered to printed
circuit board for SO package.
ORDERING GUIDE1
Model
Temperature
Range
Package
Description
Package
Option1
OP297AZ
OP297EZ
OP297EP
OP297FP
OP297FS
OP297FS-REEL
OP297FS-REEL7
OP297GP
OP297GS
OP297GS-REEL
OP297GS-REEL72
–55°C to +125°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
8-Pin Cerdip
8-Pin Cerdip
8-Pin Plastic DIP
8-Pin Plastic DIP
8-Pin SO
8-Pin SO
8-Pin SO
8-Pin Plastic DIP
8-Pin SO
8-Pin SO
8-Pin SO
Q-8
Q-8
N-8
N-8
SO-8
SO-8
SO-8
N-8
SO-8
SO-8
SO-8
NOTES
1
Burn-in is available on extended industrial temperature range parts in cerdip, and plastic DIP
packages. For outline information see Package Information section.
2
For availability and burn-in information on SO packages, contact your local sales office.
–
1/2
OP-297
V1 20Vp-p @ 10Hz
+
2kΩ
50kΩ
50Ω
–
1/2
OP-297
V2
+
CHANNEL SEPARATION = 20 log
)
)
V1
V2/10000
Figure 3. Channel Separation Test Circuit
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the OP297 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
–4–
WARNING!
ESD SENSITIVE DEVICE
REV. D
8/21/97 4:00 PM
Typical Performance Characteristics– OP297
400
250
100
Figure 4. Typical Distribution of Input
Offset Voltage
150
100
0
–100 –80 –60 –40 –20
0
20 40
200
100
0
–100 –80 –60 –40 –20 0
20 40 60 80 100
INPUT OFFSET CURRENT (pA)
60 80 100
Figure 5. Typical Distribution of Input
Bias Current
Figure 6. Typical Distribution of Input Offset Current
±3
IB+
20
0
IOS
20
40
INPUT CURRENT (pA)
40
VS = ±15V
VCM = 0V
TA = +25°C
VS = ±15V
DEVIATION FROM FINAL VALUE (µV)
60
IB–
IB–
IB+
20
0
IOS
–20
–40
–40
–60
100 125
10000
BALANCED OR UNBALANCED
VS = ±15V
VCM = 0V
1000
100
–55°C ≤ TA ≤ 125°C
TA = +25°C
10
100
1k
10k
100k 1M
SOURCE RESISTANCE (Ω)
10M
Figure 10. Effective Offset Voltage
vs. Source Resistance
REV. D
±2
±1
–10
–5
0
5
10
15
COMMON-MODE VOLTAGE (VOLTS)
Figure 8. Input Bias, Offset Current
vs. Common-Mode Voltage
BALANCED OR UNBALANCED
VS = ±15V
VCM = 0V
10
1
100
1k
10k 100k
1M
10M
SOURCE RESISTANCE (Ω)
100M
Figure 11. Effective TCVOS vs. Source
Resistance
–5–
0
1
2
3
4
5
TIME AFTER POWER APPLIED (MINUTES)
Figure 9. Input Offset Voltage WarmUp Drift
100
0.1
TA = +25°C
VS = ±15V
VCM = 0V
0
–15
SHORT-CIRCUIT CURRENT (mA)
Figure 7. Input Bias, Offset Current
vs. Temperature
EFFECTIVE OFFSET VOLTAGE DRIFT (µV/°C)
–60
–75 –50 –25
0
25 50 75
TEMPERATURE (°C)
TA = +25°C
VS = ±15V
VCM = 0V
300
INPUT BIAS CURRENT (pA)
60
INPUT CURRENT (pA)
1200 UNITS
50
0
–100 –80 –60 –40 –20 0 20 40 60 80 100
INPUT OFFSET VOLTAGE (µV)
EFFECTIVE OFFSET VOLTAGE (µV)
TA = +25°C
VS = ±15V
VCM = 0V
200
200
10
400
1200
UNITS
NUMBER OF UNITS
NUMBER OF UNITS
300
TA = +25°C
VS = ±15V
VCM = 0V
NUMBER OF UNITS
1200 UNITS
35
30
25
20
15
10
5
0
–5
–10
–15
–20
–25
–30
–35
TA = –55°C
TA = +25°C
TA = +125°C
VS = ±15V
OUTPUT SHORTED
TO GROUND
TA = +125°C
TA = +25°C
TA = –55°C
0
1
2
3
4
TIME FROM OUTPUT SHORT (MINUTES)
Figure 12. Short Circuit Current vs.
Time, Temperature
8/21/97 4:00 PM
OP297–Typical Performance Characteristics
1300
TA = +25°C
1000
TA = –55°C
900
0
±5
±10
±15
SUPPLY VOLTAGE (VOLTS)
100
10
1
10
100
1
1000
40
20
DIFFERENTIAL INPUT VOLTAGE (10µV/DIV)
80
+PSR
40
100
1k
10k
FREQUENCY (Hz)
10Hz
1kHz
0.1
15
Figure 19. Power Supply Rejection
vs. Frequency
100k 1M
TA = +125°C
1000
VS = ±15V
VO = ±10V
1kHz
100
102
103
104
105
106
SOURCE RESISTANCE (Ω)
1
107
3
2
5
10
20
LOAD RESISTANCE (kΩ)
Figure 17. Total Noise Density vs.
Source Resistance
Figure 18. Maximum Output Swing
vs. Load Resistance
35
TA = +25°C
VS = ±15V
AVCL = +1
1%THD
fo = 1kHz
25
TA = +25°C
VS = ±15V
AVCL = +1
1%THD
RL = 10kΩ
30
20
15
10
0
10
–10
–5
0
5
OUTPUT VOLTAGE (VOLTS)
10k
TA = –55°C
5
–15
1k
TA = +25°C
OUTPUT SWING (Vp-p)
TA = –55°C
100
Figure 15. Open Loop Gain Linearity
10Hz
OUTPUT SWING (Vp-p)
TA = +25°C
10
FREQUENCY (Hz)
1
0.01
1
10000
30
TA = +125°C
0.1
100k 1M
35
RL = 10kΩ
VS = ±15V
VCM = 0V
–PSR
60
TA = +25°C
VS = ±2V TO ±20V
FREQUENCY (Hz)
Figure 16. Common-Mode Rejection
vs. Frequency
100
20
10
Hz)
Hz)
VOLTAGE
NOISE
60
10
CURRENT NOISE DENSITY (fA/
Hz)
VOLTAGE NOISE DENSITY (nV/
100
CURRENT
NOISE
80
Figure 14. Noise Density vs.
Frequency
1000
0
100
1
Figure 13. Total Supply Current vs.
Supply Voltage
TA = +25°C
VS = ±2V TO ±15V
120
TA = +25°C
VS = ±15V
∆VS = 10Vp-p
120
0
±20
100
140
OPEN-LOOP GAIN (V/mV)
800
TA = +25°C
VS = ±15V
POWER SUPPLY REJECTION (dB)
COMMON-MODE REJECTION (dB)
1100
TOTAL NOISE DENSITY (µV/
TOTAL SUPPLY CURRENT (µA)
TA = +125°C
1200
10
140
160
NO LOAD
25
20
15
10
5
10
100
1k
10k
LOAD RESISTANCE (Ω)
Figure 20. Open Loop Gain vs. Load
Resistance
–6–
0
100
1k
10k
100k
FREQUENCY (Hz)
Figure 21. Maximum Output Swing
vs. Frequency
REV. D
8/21/97 4:00 PM
OP297
100
40
TA = –55°C
90
20
135
0
180
–20
225
50
TA = +25°C
VS = ±15V
–EDGE
OUTPUT IMPEDANCE (Ω)
60
PHASE
TA = +25°C
VS = ±15V
AVCL = +1
VOUT = 100mVp-p
60
OVERSHOOT (%)
GAIN
PHASE SHIFT (DEG)
OPEN-LOOP GAIN (dB)
80
1000
70
VS = ±15V
CL = 30pF
RL = 1MΩ
+EDGE
40
30
20
100
10
1
0.1
0.01
10
TA = +125°C
–40
100
1k
10k
100
1M
FREQUENCY (Hz)
0
10M
10
1000
100
LOAD CAPACITANCE (pF)
0.001
10000
100
1k
10k
100k
FREQUENCY (Hz)
1M
Figure 24. Open Loop Output
Impedance vs Frequency
Figure 23. Small Signal Overshoot
vs. Capacitance Load
Figure 22. Open Loop Gain,
Phase vs. Frequency
10
APPLICATIONS INFORMATION
Extremely low bias current over the full military temperature
range makes the OP297 attractive for use in sample-and-hold
amplifiers, peak detectors, and log amplifiers that must operate
over a wide temperature range. Balancing input resistances is
not necessary with the OP297 Offset voltage and TCVOS are
degraded only minimally by high source resistance, even when
unbalanced.
100
90
The input pins of the OP297 are protected against large differential voltage by back-to-back diodes and current-limiting resistors. Common-mode voltages at the inputs are not restricted,
and may vary over the full range of the supply voltages used.
10
0%
20mV
The OP297 requires very little operating headroom about the
supply rails, and is specified for operation with supplies as low
as +2 V. Typically, the common-mode range extends to within
one volt of either rail. The output typically swings to within one
volt of the rails when using a 10 kΩ load.
5µs
Figure 26. Small-Signal Transient Response
(CLOAD = 1000 pF, AVCL = +1)
AC PERFORMANCE
100
90
The OP297’S AC characteristics are highly stable over its full
operating temperature range. Unity-gain small-signal response is
shown in Figure 25. Extremely tolerant of capacitive loading on
the output, the OP297 displays excellent response even with
1000 pF loads (Figure 26).
10
0%
20mV
5µs
100
90
Figure 27. Large-Signal Transient Response
(AVCL = +1)
GUARDING AND SHIELDING
To maintain the extremely high input impedances of the
OP297, care must be taken in circuit board layout and manufacturing. Board surfaces must be kept scrupulously clean and
free of moisture. Conformal coating is recommended to provide
10
0%
20mV
5µs
Figure 25. Small-Signal Transient Response
(CLOAD = 100 pF, AVCL = +1)
REV. D
–7–
8/21/97 4:00 PM
OP297
UNITY-GAIN FOLLOWER
NONINVERTING AMPLIFIER
–
–
1/2
OP-297
1/2
OP-297
+
+
INVERTING AMPLIFIER
MINI-DIP
BOTTOM VIEW
8
1
–
1/2
OP-297
A
+
B
Figure 28. Guard Ring Layout and Connections
APPLICATIONS
a humidity barrier. Even a clean PC board can have 100 pA of
leakage currents between adjacent traces, so guard rings should
be used around the inputs. Guard traces are operated at a voltage close to that on the inputs, as shown in Figure 28, so that
leakage currents become minimal. In noninverting applications,
the guard ring should be connected to the common-mode voltage at the inverting input. In inverting applications, both inputs
remain at ground, so the guard trace should be grounded. Guard
traces should be on both sides of the circuit board.
PRECISION ABSOLUTE VALUE AMPLIFIER
The circuit of Figure 30 is a precision absolute value amplifier
with an input impedance of 30 MΩ. The high gain and low
TCVOS of the OP297 insure accurate operation with microvolt
input signals. In this circuit, the input always appears as a
common-mode signal to the op amps. The CMR of the OP297
exceeds 120 dB, yielding an error of less than 2 ppm.
+15V
C2
OPEN-LOOP GAIN LINEARITY
The OP297 has both an extremely high gain of 2000 V/mV
minimum and constant gain linearity. This enhances the precision of the OP297 and provides for very high accuracy in high
closed loop gain applications. Figure 29 illustrates the typical
open-loop gain linearity of the OP297 over the military temperature range.
0.1µF
2
DIFFERENTIAL INPUT VOLTAGE (10µV/DIV)
VIN
RL = 10kΩ
VS = ±15V
VCM = 0V
3
–
1/2
OP-297
+
C1
30pF
8
4
R1
R3
1kΩ
1kΩ
D1
1N4148
6
D2
1
C3
5
–
1/2
OP-297
+
7
0V < VOUT < 10V
1N4148
R2
2kΩ
0.1µF
TA = +125°C
–15V
TA = +25°C
Figure 30. Precision Absolute Value Amplifier
TA = –55°C
–15
10
–10
–5
0
5
OUTPUT VOLTAGE (VOLTS)
PRECISION CURRENT PUMP
Maximum output current of the precision current pump shown
in Figure 31 is ± 10 mA. Voltage compliance is ± 10 V with
± 15 V supplies. Output impedance of the current transmitter
exceeds 3 MΩ with linearity better than 16 bits.
15
Figure 29. Open-Loop Linearity of the OP297
–8–
REV. D
8/21/97 4:00 PM
OP297
PRECISION POSITIVE PEAK DETECTOR
SIMPLE BRIDGE CONDITIONING AMPLIFIER
In Figure 32, the CH must be of polystyrene, Teflon®*, or polyethylene to minimize dielectric absorption and leakage. The
droop rate is determined by the size of CH and the bias current
of the OP297.
Figure 33 shows a simple bridge conditioning amplifier using
the OP297. The transfer function is:
 ∆R  RF
V OUT =V REF 

 R + ∆R R
R3
The REF43 provides an accurate and stable reference voltage
for the bridge. To maintain the highest circuit accuracy, RF
should be 0.1% or better with a low temperature coefficient.
10kΩ
R1
–
10kΩ
R2
VIN
+
10kΩ
2
3
–
1/2
OP-297
R5
1
IOUT
±10mA
100Ω
+
1kΩ
+15V
+15V
1N4148
8
R4
+
1/2
OP-297
7
10kΩ
–
5
VIN
1kΩ
2
–
3
+
1/2
OP-297
0.1µF
1
6
2N930
1kΩ
6
8
1/2
OP-297
5
+
4
–
7
0.1µF
CH
4
–15V
RESET
V
V
IOUT = IN = IN = 10mA/V
R5 100Ω
1kΩ
–15V
Figure 32. Precision Positive Peak Detector
Figure 31. Precision Current Pump
+5V
2
6
VREF
2.5V
RF
REF-43
R
R
4
2
R + ∆R
R
3
–
1/2
OP-297
1
VOUT
+
+5V
6
5
VOUT = VREF
–
8
1/2
OP-297
+
(
∆R
R + ∆R
(
7
4
–5V
Figure 33. A Simple Bridge Conditioning Amplifier Using the OP297
*Teflon is a registered trademark of the Dupont Company
REV. D
–9–
RF
R
VOUT
8/21/97 4:00 PM
OP297
Exponentiating both sides of the equation leads to:
NONLINEAR CIRCUITS
Due to its low input bias currents, the OP297 is an ideal log
amplifier in nonlinear circuits such as the square and squareroot circuits shown in Figures 34 and 35. Using the squaring
circuit of Figure 34 as an example, the analysis begins by writing
a voltage loop equation across transistors Q1, Q2, Q3 and Q4.
I 
I 
I 
I

V T1 ln  IN  +V T2 ln  IN  =V T 3 ln  O  +V T 4 ln  REF 
 I S1 
 I S2 
 I S3 
 I S4 
IO =
Op amp A2 forms a current-to-voltage converter which gives
VOUT = R2 × 10. Substituting (VIN/R1) for IIN and the above
equation for IO yields:
 R2  V IN 
V OUT = 


 I REF   R1 
All the transistors of the MAT04 are precisely matched and at
the same temperature, so the IS and VT terms cancel, giving:
2 ln IIN = ln IO + ln IREF = ln (IO × IREF)
(I IN )2
I REF
2
A similar analysis made for the square-root circuit of Figure 35
leads to its transfer function:
V OUT = R2
(V IN )(I REF )
R1
C2
100pF
R2
33kΩ
6
IO
–
1/2
OP-297
A2
5
7
VOUT
+
1
2
Q1
3
6
7
Q2
5
MAT-04E
C1
100pF
8
Q3
V+
IREF
9
R1
33kΩ
IIN
2
–
8
1/2
OP-297
3 A1
+ 4
13
12
10
VIN
14
Q4
R3
1
50kΩ
R4
50kΩ
–15V
V–
Figure 34. Squaring Amplifier
–10–
REV. D
8/21/97 4:00 PM
OP297
R2
33kΩ
C2
100pF
6
IO
IIN
2
5
–
1/2
OP-297
7
VOUT
+
MAT-04E
Q1 1
IREF
3
C1
13
100pF
V+
6
R1
VIN
2
33kΩ
3
–
5
8
1/2
OP-297
+
7
Q2
8
Q3
9
10
R5
R3
2kΩ
50kΩ
1
14
Q4
12
R4
50kΩ
4
–15V
V–
Figure 35. Square-Root Amplifier
In these circuits, IREF is a function of the negative power supply.
To maintain accuracy, the negative supply should be well regulated. For applications where very high accuracy is required, a
voltage reference may be used to set IREF. An important consideration for the squaring circuit is that a sufficiently large input
voltage can force the output beyond the operating range of the
output op amp. Resistor R4 can be changed to scale IREF, or R1,
and R2 can be varied to keep the output voltage within the
usable range.
Unadjusted accuracy of the square-root circuit is better than
0.1% over an input voltage range of 100 mV to 10 V. For a
similar input voltage range, the accuracy of the squaring circuit
is better than 0.5%.
REV. D
OP297 SPICE MACRO-MODEL
Figures 36 and 37 show the node end net list for a SPICE
macro model of the OP297. The model is a simplified version of
the actual device and simulates important dc parameters such as
VOS, IOS, IB, AVO, CMR, VO and ISY. AC parameters such as
slew rate, gain and phase response and CMR change with frequency are also simulated by the model.
The model uses typical parameters for the OP297. The poles
and zeros in the model were determined from the actual open
and closed-loop gain and phase response of the OP297. In this
way, the model presents an accurate ac representation of the
actual device. The model assumes an ambient temperature
of 25°C.
–11–
8/21/97 4:00 PM
OP297
R3
+
99
R4
– V2
13
C2
C4
D3
5
6
R8
12
15
RIN2
8
Q1
Q2
R7
G1
+
2
–IN
16
C3
R9
– E1
R1
RIN1
+IN
–+
7
11
R5
4
R6
98
– EREF
D4
14
9
EOS
+
R2
10
– V3
I1
50
G2
R10
C5
C7
R11
R13
– E2
+
17
C6
+
1
D2
D1
3
+
IOS
CIN
R12
– E3
22
R14
G3
R15
C8
98
99
D7
R16
ISY
D8
D5
G6
R18
V4
26
+–
22
25
23
D6
L1
V5
27
–+
28
29
R19
R17
D9
G4
G5
D 10
G7
50
Figure 36. OP297 Macro-Model
–12–
REV. D
8/21/97 4:00 PM
OP297
Table I. SPICE Net-List
OP297 SPICE MACRO-MODEL
•
• NODE ASSIGNMENTS
•NONINVERTING INPUT
INVERTING INPUT
OUTPUT
POSITIVE SUPPLY
NEGATIVE SUPPLY
• SUBCKT OP297 1 2 30 99 50
•
INPUT STAGE & POLE AT 6 MHz
•
RIN1 1
7
2500
RIN2 2
8
2500
R1
8
3
5E11
R2
7
3
5E11
R3
5
99 612
R4
6
99 612
CIN 7
8
3E-12
C2
5
6
21.67E-12
I1
4
50 0.1E-3
IOS
7
8
20E-12
EOS 9
7
POLY(1) 19 23 25E-6 1
Q1
5
8
10 QX
Q2
6
9
11 QX
R5
10 4
96
R6
11 4
96
D1
8
9
DX
D2
9
8
DX
•
EREF 98 0
23 0 1
•
GAIN STAGE & DOMINANT POLE AT 0.13 HZ
•
R7
12 98 2.45E9
C3
12 98 500E-12
G1
98 12 5 6 1.634E-3
V2
99 13 1.5
V3
14 50 1.5
D3
12 13 DX
D4
14 12 DX
•
• NEGATIVE ZERO AT -1 8 MHz
•
R8
15 16 1E6
C4
15 16 –88.4E-15
R9
16 98 1
E1
15 98 12 23 1E6
•
REV. D
• POLE AT 1.8 MHz
•
R10
17 98 1E6
C5
17 98 88 4E-15
G2
98 17 16 23 1 E-6
•
• COMMON-MODE GAIN NETWORK WITH ZERO AT 50 HZ
•
R11
18 19 1E6
C6
18 19 3.183E-9
R12
19 98 1
E2
18 98 3 23 100E-3
•
• POLE AT 6 MHz
•
R15
22 98 1E6
C8
22 98 26.53E-15
G3
98 22 17 23 1 E-6
•
• OUTPUT STAGE
•
R16
23 99 160K
R17
23 50 160K
ISY
99 50 331 E-6
R18
25 99 200
R19
25 50 200
L1
25 30 1 E-7
G4
28 50 22 25 5E-3
G5
29 50 25 22 5E-3
G6
25 99 99 22 5E-3
G7
50 25 22 50 5E-3
V4
26 25 1.8
V5
25 27 1.3
D5
22 26 DX
D6
27 22 DX
D7
99 28 DX
D8
99 29 DX
D9
50 28 DY
D10
50 29 DY
•
• MODELS USED
•
• MODEL QX NPN BF=2.5E6)
• MODEL DX D IS = 1 E-15)
• MODEL DY D IS = 1 E-15 BV = 50)
• ENDS OP297
–13–
8/21/97 4:00 PM
OP297
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Plastic DIP
(N-8)
0.430 (10.92)
0.348 (8.84)
8
5
0.280 (7.11)
0.240 (6.10)
1
4
0.060 (1.52)
0.015 (0.38)
PIN 1
0.210 (5.33)
MAX
0.325 (8.25)
0.300 (7.62)
0.195 (4.95)
0.115 (2.93)
0.130
(3.30)
MIN
0.160 (4.06)
0.115 (2.93)
0.022 (0.558) 0.100 0.070 (1.77)
0.014 (0.356) (2.54) 0.045 (1.15)
BSC
0.015 (0.381)
0.008 (0.204)
SEATING
PLANE
8-Lead Cerdip
(Q-8)
0.005 (0.13)
MIN
0.055 (1.4)
MAX
8
5
0.310 (7.87)
0.220 (5.59)
1
4
PIN 1
0.405 (10.29)
MAX
0.200 (5.08)
MAX
0.320 (8.13)
0.290 (7.37)
0.060 (1.52)
0.015 (0.38)
0.200 (5.08)
0.125 (3.18)
0.023 (0.58) 0.100 0.070 (1.78)
0.014 (0.36) (2.54) 0.030 (0.76)
BSC
0.150
(3.81)
MIN
SEATING
PLANE
0.015 (0.38)
0.008 (0.20)
15°
0°
8-Lead Narrow Body (SOIC)
(SO-8)
0.1968 (5.00)
0.1890 (4.80)
0.1574 (4.00)
0.1497 (3.80)
PIN 1
0.0098 (0.25)
0.0040 (0.10)
SEATING
PLANE
8
5
1
4
0.2440 (6.20)
0.2284 (5.80)
0.0688 (1.75)
0.0532 (1.35)
0.0500 0.0192 (0.49)
(1.27) 0.0138 (0.35)
BSC
0.0196 (0.50)
x 45°
0.0099 (0.25)
0.0098 (0.25)
0.0075 (0.19)
–14–
8°
0°
0.0500 (1.27)
0.0160 (0.41)
REV. D
–15–
8/21/97 4:00 PM
PRINTED IN U.S.A.
000000000
OP297
–16–
REV. D