CEP07N65/CEB07N65 CEF07N65 N-Channel Enhancement Mode Field Effect Transistor PRELIMINARY FEATURES Type VDSS RDS(ON) ID @VGS CEP07N65 650V 1.3Ω 7A 10V CEB07N65 650V 1.3Ω 7A 10V CEF07N65 650V 1.3Ω 7A d 10V D Super high dense cell design for extremely low RDS(ON). High power and current handing capability. Lead free product is acquired. G D G D S G S CEB SERIES TO-263(DD-PAK) G CEP SERIES TO-220 ABSOLUTE MAXIMUM RATINGS Parameter D S Tc = 25 C unless otherwise noted Limit Symbol TO-220/263 Drain-Source Voltage VDS Gate-Source Voltage VGS Drain Current-Continuous Drain Current-Pulsed S CEF SERIES TO-220F ID IDM a Maximum Power Dissipation @ TC = 25 C e PD - Derate above 25 C Operating and Store Temperature Range TJ,Tstg TO-220F 650 Units V ±30 V 7 7 d A A 28 28 166 50 W 1.3 0.4 W/ C -55 to 150 d C Thermal Characteristics Parameter Symbol Limit Units Thermal Resistance, Junction-to-Case RθJC 0.75 2.5 C/W Thermal Resistance, Junction-to-Ambient RθJA 62.5 65 C/W This is preliminary information on a new product in development now . Details are subject to change without notice . 1 Rev 2. 2008.Feb. http://www.cetsemi.com Electrical Characteristics Parameter CEP07N65/CEB07N65 CEF07N65 Tc = 25 C unless otherwise noted Symbol Test Condition Min Drain-Source Breakdown Voltage BVDSS VGS = 0V, ID = 250µA 650 Zero Gate Voltage Drain Current IDSS Gate Body Leakage Current, Forward Gate Body Leakage Current, Reverse Typ Max Units VDS =650V, VGS = 0V 25 µA IGSSF VGS = 30V, VDS = 0V 100 nA IGSSR VGS = -30V, VDS = 0V -100 nA 4 V 1.3 Ω Off Characteristics V On Characteristics b Gate Threshold Voltage Static Drain-Source On-Resistance VGS(th) VGS = VDS, ID = 250µA 2 RDS(on) VGS = 10V, ID = 5A 1.1 gFS VDS = 25V, ID = 5A 10 S 940 pF 140 pF 17 pF Dynamic Characteristics c Forward Transconductance Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss VDS = 25V, VGS = 0V, f = 1.0 MHz Switching Characteristics c Turn-On Delay Time td(on) Turn-On Rise Time tr Turn-Off Delay Time td(off) VDD = 300V, ID =7A, VGS = 10V, RGEN = 25Ω 27 54 ns 47 94 ns 97 194 ns Turn-Off Fall Time tf 26 52 ns Total Gate Charge Qg 32.9 43.7 nC Gate-Source Charge Qgs Gate-Drain Charge Qgd VDS = 480V,ID = 7A, VGS = 10V 6 nC 12 nC Drain-Source Diode Characteristics and Maximun Ratings Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage ISf b VSDg VGS = 0V, IS = 5A Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature . b.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2% . c.Guaranteed by design, not subject to production testing. d.Limited only by maximum temperature allowed . e.Pulse width limited by safe operating area . f.Full package IS(max) = 3.6A . g.Full package VSD test condition IS = 3.6A . 2 7 A 1.4 V CEP07N65/CEB07N65 CEF07N65 10 8 VGS=6V 6 4 VGS=5V 2 0 0 5 10 15 20 25 2 4 6 8 10 VGS, Gate-to-Source Voltage (V) Figure 1. Output Characteristics Figure 2. Transfer Characteristics RDS(ON), Normalized RDS(ON), On-Resistance(Ohms) Ciss 600 400 Coss 200 Crss 0 5 10 15 20 25 2.6 2.2 ID=5A VGS=10V 1.8 1.4 1.0 0.6 0.2 -100 -50 0 50 100 150 200 VDS, Drain-to-Source Voltage (V) TJ, Junction Temperature( C) Figure 3. Capacitance Figure 4. On-Resistance Variation with Temperature VDS=VGS ID=250µA 1.1 1.0 0.9 0.8 0.7 0.6 -50 0 VDS, Drain-to-Source Voltage (V) IS, Source-drain current (A) C, Capacitance (pF) VTH, Normalized Gate-Source Threshold Voltage TJ=125 C 2.5 30 800 1.2 5 -55 C 1000 1.3 7.5 0 1200 0 25 C VGS=10,9,8,7V 10 ID, Drain Current (A) ID, Drain Current (A) 12 -25 0 25 50 75 100 125 150 10 1 10 0 10 -1 VGS=0V 0.4 0.6 0.8 1.0 1.2 1.4 1.6 TJ, Junction Temperature( C) VSD, Body Diode Forward Voltage (V) Figure 5. Gate Threshold Variation with Temperature Figure 6. Body Diode Forward Voltage Variation with Source Current 3 10 VDS=300V ID=7A 10 8 ID, Drain Current (A) VGS, Gate to Source Voltage (V) CEP07N65/CEB07N65 CEF07N65 6 4 2 0 0 10 20 30 10 RDS(ON)Limit 100ms 1 1ms 10ms 10 10 40 2 DC 0 TC=25 C TJ=175 C Single Pulse -1 10 0 10 1 10 2 10 Qg, Total Gate Charge (nC) VDS, Drain-Source Voltage (V) Figure 7. Gate Charge Figure 8. Maximum Safe Operating Area VDD t on RL V IN D VGS RGEN toff tr td(on) td(off) tf 90% 90% VOUT VOUT 10% INVERTED 10% G 90% S VIN 50% 50% 10% PULSE WIDTH Figure 10. Switching Waveforms r(t),Normalized Effective Transient Thermal Impedance Figure 9. Switching Test Circuit 10 0 D=0.5 0.2 10 10 PDM 0.1 -1 0.05 0.02 0.01 Single Pulse t1 1. RθJC (t)=r (t) * RθJC 2. RθJC=See Datasheet 3. TJM-TC = P* RθJC (t) 4. Duty Cycle, D=t1/t2 -2 10 -2 t2 10 -1 10 0 10 1 10 2 Square Wave Pulse Duration (msec) Figure 11. Normalized Thermal Transient Impedance Curve 4 10 3 10 4 3