TI LM25011AQ1MY 42v 2a constant on-time switching regulator with adjustable current limit Datasheet

LM25011, LM25011-Q1
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SNVS617G – APRIL 2009 – REVISED FEBRUARY 2013
LM25011, LM25011Q, LM25011A, LM25011AQ
42V 2A Constant On-Time Switching Regulator With Adjustable Current Limit
Check for Samples: LM25011, LM25011-Q1
FEATURES
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LM25011Q is an Automotive Grade Product
that is AEC-Q100 Grade 1 Qualified (-40°C to
+125°C Operating Junction Temperature)
LM25011A Allows Low Dropout Operation at
High Switching Frequency
Input Operating Voltage Range: 6V to 42V
Absolute Maximum Input Rating: 45V
Integrated 2A N-Channel Buck Switch
Adjustable Current Limit Allows for Smaller
Inductor
Adjustable Output Voltage from 2.51V
Minimum Ripple Voltage at VOUT
Power Good Output
Switching Frequency Adjustable to 2 MHz
COT Topology Features:
– Switching Frequency Remains Nearly
Constant with Load Current and Input
Voltage Variations
– Ultra-Fast Transient Response
– No Loop Compensation Required
– Stable Operation with Ceramic Output
Capacitors
– Allows for Smaller Output Capacitor and
Current Sense Resistor
Adjustable Soft-Start Timing
•
•
•
Thermal Shutdown
Precision 2% Feedback Reference
Package: 10-Pin, VSSOP
DESCRIPTION
The LM25011 Constant On-time Step-Down
Switching Regulator features all the functions needed
to implement a low cost, efficient, buck bias regulator
capable of supplying up to 2A of load current. This
high voltage regulator contains an N-Channel Buck
switch, a startup regulator, current limit detection, and
internal ripple control. The constant on-time
regulation principle requires no loop compensation,
results in fast load transient response, and simplifies
circuit implementation. The operating frequency
remains constant with line and load. The adjustable
valley current limit detection results in a smooth
transition from constant voltage to constant current
mode when current limit is reached, without the use
of current limit foldback. The PGD output indicates
the output voltage has increased to within 5% of the
expected regulation value. Additional features
include: Low output ripple, VIN under-voltage lockout, adjustable soft-start timing, thermal shutdown,
gate drive pre-charge, gate drive under-voltage lockout, and maximum duty cycle limit.
The LM25011A has a shorter minimum off-time than
the LM25011, which allows for higher frequency
operation at low input voltages.
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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LM25011, LM25011-Q1
SNVS617G – APRIL 2009 – REVISED FEBRUARY 2013
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TYPICAL APPLICATION
6V to 42V
Input
VIN
BST
CBST
LM25011
CIN
RT
L1
SW
D1
RT
VOUT
CS
RPGD
VPGD
Power
Good
RS
PGD
COUT
RFB2
CSG
SS
CSS
SGND
FB
RFB1
CONNECTION DIAGRAM
Exposed Pad on Bottom
Connect to Ground
VIN
1
10
BST
RT
2
9
SW
PGD
3
8
CS
SS
4
7
CSG
SGND
5
6
FB
Figure 1. Top View
10-Lead VSSOP
2
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PIN DESCRIPTIONS
Pin No.
Name
Description
Application Information
1
VIN
Input supply voltage
2
RT
On-time Control
An external resistor from VIN to this pin sets the buck switch on-time, and the
switching frequency.
3
PGD
Power Good
Logic output indicates when the voltage at the FB pin has increased to above
95% of the internal reference voltage. Hysteresis is provided. An external
pull-up resistor to a voltage less than 7V is required.
4
SS
Soft-Start
5
SGND
Signal Ground
6
FB
Feedback
Internally connected to the regulation comparator. The regulation level is
2.51V.
7
CSG
Current Sense Ground
Ground connection for the current limit sensing circuit. Connect to ground
and to the current sense resistor.
8
CS
Current sense
Connect to the current sense resistor and the anode of the free-wheeling
diode.
9
SW
Switching Node
10
BST
Bootstrap capacitor connection of the
buck switch gate driver.
Operating input range is 6V to 42V. Transient capability is 45V. A low ESR
capacitor must be placed as close as possible to the VIN and SGND pins.
An internal current source charges an external capacitor to provide the softstart function.
Ground for all internal circuitry other than the current limit sense circuit.
Internally connected to the buck switch source. Connect to the external
inductor, cathode of the free-wheeling diode, and bootstrap capacitor.
Connect a 0.1 µF capacitor from SW to this pin. The capacitor is charged
during the buck switch off-time via an internal diode.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS (1)
VIN to SGND (TJ = 25°C)
45V
BST to SGND
52V
SW to SGND (Steady State)
-1.5V to 45V
BST to SW
-0.3V to 7V
CS to CSG
-0.3V to 0.3V
CSG to SGND
-0.3V to 0.3V
PGD to SGND
-0.3V to 7V
SS to SGND
-0.3V to 3V
RT to SGND
-0.3V to 1V
FB to SGND
ESD Rating, Human Body Model
-0.3V to 7V
(2)
2kV
Storage Temperature Range
-65°C to +150°C
For soldering specs, see www.ti.com/packaging.
Junction Temperature
(1)
(2)
150°C
Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which
operation of the device is intended to be functional. For guaranteed specifications and test conditions, see the Electrical Characteristics.
The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin.
OPERATING RATINGS (1)
VIN Voltage
6.0V to 42V
Junction Temperature
(1)
–40°C to +125°C
Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which
operation of the device is intended to be functional. For guaranteed specifications and test conditions, see the Electrical Characteristics.
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ELECTRICAL CHARACTERISTICS
Specifications with standard type are for TJ = 25°C only; limits in boldface type apply over the full Operating Junction
Temperature (TJ) range. Minimum and Maximum limits are guaranteed through test, design, or statistical correlation. Typical
values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless
otherwise stated the following conditions apply: VIN = 12V, RT = 50 kΩ.
Symbol
Parameter
Conditions
Min
Input operating current
Non-switching, FB = 3V
VIN under-voltage lock-out threshold
VIN Increasing
Typ
Max
Unit
1200
1600
µA
5.3
5.9
V
Input (VIN Pin)
IIN
UVLOVIN
4.6
VIN under-voltage lock-out threshold
hysteresis
200
mV
Switch Characteristics
RDS(ON)
Buck Switch RDS(ON)
ITEST = 200 mA
UVLOGD
Gate Drive UVLO
BST-SW
2.4
UVLOGD Hysteresis
0.3
0.6
3.4
4.4
Ω
V
350
mV
1.4
V
Pre-charge switch on-time
120
ns
VSS
Pull-up voltage
2.51
V
ISS
Internal current source
Pre-charge switch voltage
ITEST = 10 mA into SW pin
Soft-Start Pin
VSS-SH
Shutdown Threshold
10
µA
70
140
mV
-146
-130
Current Limit
VILIM
Threshold voltage at CS
-115
mV
CS bias current
FB = 3V
-120
µA
CSG bias current
FB = 3V
-35
µA
tON - 1
On-time
VIN = 12V, RT = 50 kΩ
tON - 2
On-time
VIN = 32V, RT = 50 kΩ
75
ns
tON - 3
On-time (current limit) LM25011
VIN = 12V, RT = 50 kΩ
100
ns
tON - 3
On-time (current limit) LM25011A
VIN = 12V, RT = 50 kΩ
200
ns
tON - 4
On-time
VIN = 12V, RT = 301 kΩ
1020
tON - 5
On-time
VIN = 9V, RT = 30.9 kΩ
130
171
215
ns
tON - 6
On-time
VIN = 12V, RT = 30.9 kΩ
105
137
170
ns
tON - 7
On-time
VIN = 16V, RT = 30.9 kΩ
79
109
142
ns
Minimum Off-time (LM25011)
90
150
208
ns
Minimum Off-time (LM25011A)
52
75
93
2.46
2.51
2.56
On Timer, RT Pin
150
200
250
ns
ns
Off Timer
tOFF
Regulation Comparator (FB Pin)
VREF
FB regulation threshold
SS pin = steady state
FB bias current
FB = 3V
V
100
nA
95
%
Power Good (PGD pin)
Threshold at FB, with respect to VREF
FB increasing
91
Threshold hysteresis
4
3.3
PGDVOL
Low state voltage
IPGD = 1mA, FB = 0V
125
PGDLKG
Off state leakage
VPGD = 7V, FB = 3V
0.1
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%
180
mV
µA
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ELECTRICAL CHARACTERISTICS (continued)
Specifications with standard type are for TJ = 25°C only; limits in boldface type apply over the full Operating Junction
Temperature (TJ) range. Minimum and Maximum limits are guaranteed through test, design, or statistical correlation. Typical
values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless
otherwise stated the following conditions apply: VIN = 12V, RT = 50 kΩ.
Symbol
Parameter
Conditions
Min
Thermal shutdown
Junction temperature increasing
Typ
Max
Unit
Thermal Shutdown
TSD
155
°C
Thermal shutdown hysteresis
20
°C
θJA
Junction to Ambient, 0 LFPM Air Flow (1)
48
°C/W
θJC
Junction to Case (1)
10
°C/W
Thermal Resistance
(1)
JEDEC test board description can be found in JESD 51-5 and JESD 51-7.
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TYPICAL PERFORMANCE CHARACTERISTICS
6
Efficiency (Circuit of Figure 21)
Efficiency at 2 MHz
Figure 2.
Figure 3.
On-Time vs VIN and RT
Voltage at the RT Pin
Figure 4.
Figure 5.
Shutdown Current into VIN
Operating Current into VIN
Figure 6.
Figure 7.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
PGD Low Voltage vs. Sink Current
Reference Voltage vs. Temperature
Figure 8.
Figure 9.
Current Limit Threshold vs. Temperature
Operating Current vs. Temperature
Figure 10.
Figure 11.
VIN UVLO vs. Temperature
SS Pin ShutdownThreshold vs. Temperature
Figure 12.
Figure 13.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
On-Time vs. Temperature
Minimum Off-Time vs. Temperature
190
MINIMUM OFF-TIME (ns)
170
LM25011
150
130
110
90
LM25011A
70
50
-40 -20 0 20 40 60 80 100 120
JUNCTION TEMPERATURE (°C)
Figure 14.
Figure 15.
BLOCK DIAGRAM
6V to 42V
LM25011(A)
VIN
5V REGULATOR
Input
CIN
CBYP
UVLO
CL
RT
THERMAL
SHUTDOWN
OFF TIMER
ON TIMER
RT
FINISH
START
START
FINISH
BST
2.5V
Gate Drive
10
PA
SD
UVLO
VIN
CBST
SS
LOGIC
CSS
LEVEL
SHIFT
L1
+
FB
CL
REGULATION
COMPARATOR
VOUT
SW
FCIC
CONTROL
CURRENT
LIMIT COMPARATOR
D1
+
COUT
Pre - Chg
-
RFB2
CS
RPGD
Power
Good
0.8V
PGD
SGND
+
CURRENT LIMIT
THRESHOLD
+
125 mV
RS
CSG
2.375V
RFB2
Figure 16. Block Diagram
8
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UVLO
VIN
SW Pin
Inductor
Current
SS Pin
VOUT
PGD
t1
Figure 17. Startup Sequence
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FUNCTIONAL DESCRIPTION
The LM25011 Constant On-time Step-down Switching Regulator features all the functions needed to implement a
low cost, efficient buck bias power converter capable of supplying up to 2.0A to the load. This high voltage
regulator contains an N-Channel buck switch, is easy to implement, and is available in a 10-pin VSSOP,
PowerPAD power enhanced package. The regulator’s operation is based on a constant on-time control principle
with the on-time inversely proportional to the input voltage. This feature results in the operating frequency
remaining relatively constant with load and input voltage variations. The constant on-time feedback control
principle requires no loop compensation resulting in very fast load transient response. The adjustable valley
current limit detection results in a smooth transition from constant voltage to constant current when current limit is
reached. To aid in controlling excessive switch current due to a possible saturating inductor the on-time is
reduced by approximately 40% when current limit is detected. The Power Good output (PGD pin) indicates when
the output voltage is within 5% of the expected regulation voltage.
The LM25011 can be implemented to efficiently step-down higher voltages in non-isolated applications.
Additional features include: Low output ripple, VIN under-voltage lock-out, adjustable soft-start timing, thermal
shutdown, gate drive pre-charge, gate drive under-voltage lock-out, and maximum duty cycle limit.
CONTROL CIRCUIT OVERVIEW
The LM25011 buck regulator employs a control principle based on a comparator and a one-shot on-timer, with
the output voltage feedback (FB) compared to an internal reference (2.51V). If the FB voltage is below the
reference the internal buck switch is switched on for the one-shot timer period, which is a function of the input
voltage and the programming resistor (RT). Following the on-time the switch remains off until the FB voltage falls
below the reference, but never less than the minimum off-time forced by the off-time one-shot timer. When the
FB pin voltage falls below the reference and the off-time one-shot period expires, the buck switch is then turned
on for another on-time one-shot period.
When in regulation, the LM25011 operates in continuous conduction mode at heavy load currents and
discontinuous conduction mode at light load currents. In continuous conduction mode the inductor’s current is
always greater than zero, and the operating frequency remains relatively constant with load and line variations.
The minimum load current for continuous conduction mode is one-half the inductor’s ripple current amplitude.
The approximate operating frequency is calculated as follows:
VOUT
FS =
-11
(4.1 x 10 x (RT + 0.5k)) + (VIN x 15 ns)
(1)
The buck switch duty cycle is approximately equal to:
DC =
tON
VOUT
= tON x FS =
tON + tOFF
VIN
(2)
When the load current is less than one half the inductor’s ripple current amplitude the circuit operates in
discontinuous conduction mode. The off-time is longer than in continuous conduction mode while the inductor
current is zero, causing the switching frequency to reduce as the load current is reduced. Conversion efficiency is
maintained at light loads since the switching losses are reduced with the reduction in load and frequency. The
approximate discontinuous operating frequency can be calculated as follows:
FS =
VOUT2 x L1 x 1.19 x 1021
2
RL x R T
(3)
where RL = the load resistance, and L1 is the circuit’s inductor.
The output voltage is set by the two feedback resistors (RFB1, RFB2 in the Block Diagram). The regulated output
voltage is calculated as follows:
VOUT = 2.51V x (RFB1 + RFB2) / RFB1
10
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Ripple voltage, which is required at the input of the regulation comparator for proper output regulation, is
generated internally in the LM25011, and externally when the LM25011A is used. In the LM25011 the ERM
(Emulated Ripple Mode) control circuit generates the required internal ripple voltage from the ripple waveform at
the CS pin. The LM25011A, which is designed for higher frequency operation, requires additional ripple voltage,
which must be generated externally and provided to the FB pin. This is described in the Applications Information
section.
ON-TIME TIMER
The on-time for the LM25011/LM25011A is determined by the RT resistor and the input voltage (VIN), calculated
from:
tON =
4.1 x 10
-11
x (RT + 500:)
(VIN)
+ 15 ns
(5)
The inverse relationship with VIN results in a nearly constant frequency as VIN is varied. To set a specific
continuous conduction mode switching frequency (FS), the RT resistor is determined from the following:
VOUT - (VIN x FS x 15 ns)
- 500:
RT =
-11
FS x 4.1 x 10
(6)
The on-time must be chosen greater than 90 ns for proper operation. Equation 1, Equation 5, and Equation 6 are
valid only during normal operation; that is, the circuit is not in current limit. When the LM25011 operates in
current limit, the on-time is reduced by approximately 40% (this feature is not present in LM25011A). This feature
reduces the peak inductor current which may be excessively high if the load current and the input voltage are
simultaneously high. This feature operates on a cycle-by-cycle basis until the load current is reduced and the
output voltage resumes its normal regulated value. The maximum continuous current into the RT pin must be
less than 2 mA. For high frequency applications, the maximum switching frequency is limited at the maximum
input voltage by the minimum on-time one-shot period (90 ns). At minimum input voltage the maximum switching
frequency is limited by the minimum off-time one-shot period, which, if reached, prevents achievement of the
proper duty cycle.
CURRENT LIMIT
Current limit detection occurs during the off-time by monitoring the voltage across the external current sense
resistor RS. Referring to the Block Diagram, during the off-time the recirculating current flows through the
inductor, through the load, through the sense resistor, and through D1 to the inductor. If the voltage across the
sense resistor exceeds the threshold (VILIM) the current limit comparator output switches to delay the start of the
next on-time period. The next on-time starts when the recirculating current decreases such that the voltage
across RS reduces to the threshold and the voltage at FB is below 2.51V. The operating frequency is typically
lower due to longer-than-normal off-times. When current limit is detected, the on-time is reduced by
approximately 40% (only in LM25011) if the voltage at the FB pin is below its threshold when the voltage across
RS reduces to its threshold (VOUT is low due to current limiting).
Figure 18 illustrates the inductor current waveform during normal operation and in current limit. During the first
“Normal Operation” the load current is I01, the average of the inductor current waveform. As the load resistance is
reduced, the inductor current increases until the lower peak of the inductor ripple current exceeds the threshold.
During the “Current Limited” portion of Figure 18, each on-time is reduced by approximately 40%, resulting in
lower ripple amplitude for the inductor’s current. During this time the LM25011 is in a constant current mode with
an average load current equal to the current limit threshold plus half the ripple amplitude (IOCL), and the output
voltage is below the normal regulated value. Normal operation resumes when the load current is reduced (to IO2),
allowing VOUT and the on-time to return to their normal values. Note that in the second period of “Normal
Operation”, even though the inductor’s peak current exceeds the current limit threshold during part of each cycle,
the circuit is not in current limit since the inductor current falls below the current limit threshold during each off
time. The peak current allowed through the buck switch is 3.5A, and the maximum allowed average current is
2.0A.
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IPK
IOCL
Current
Limit Threshold
IO2
'I
Inductor
Current
IO1
0V
Voltage at the CS Pin
Voltage at the FB Pin
2.51V
Load
Current
Increases
Normal
Operation
Current
Limited
Load Current
Decreases
Normal
Operation
Figure 18. Normal and Current Limit Operation
RIPPLE REQUIREMENTS
The LM25011 requires about 25mVp-p of ripple voltage at the CS pin. Higher switching frequency may require
more ripple. That ripple voltage is generated by the decreasing recirculating current (the inductor’s ripple current)
through RS during the off-time. See Figure 19.
Inductor
Current
'I
0V
Voltage
at CS
VRIPPLE
tOFF
tON
Figure 19. CS Pin Waveform
The ripple voltage is equal to:
VRIPPLE = ΔI x RS
(7)
where ΔI is the inductor current ripple amplitude, and RS is the current sense resistor at the CS pin.
More ripple can be achieved by decreasing the inductor value.
The LM25011A, with its shorter minimum off-time, typically will require more ripple than the LM25011. An
external circuit to increase the effective ripple voltage may be needed. Different methods of generating this ripple
are explained in the “Application Information” section.
12
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N-CHANNEL BUCK SWITCH AND DRIVER
The LM25011 integrates an N-Channel buck switch and associated floating high voltage gate driver. The gate
driver circuit works in conjunction with an external bootstrap capacitor (CBST) and an internal high voltage diode.
A 0.1 µF capacitor connected between BST and SW provides the supply voltage for the driver during the ontime. During each off-time, the SW pin is at approximately -1V, and CBST is recharged from the internal 5V
regulator for the next on-time. The minimum off-time ensures a sufficient time each cycle to recharge the
bootstrap capacitor.
SOFT-START
The soft-start feature allows the converter to gradually reach a steady state operating point, thereby reducing
startup stresses and current surges. Upon turn-on, when VIN reaches its under-voltage lock-out threshold an
internal 10 µA current source charges the external capacitor at the SS pin to 2.51V (t1 in Figure 17). The
ramping voltage at SS ramps the non-inverting input of the regulation comparator, and the output voltage, in a
controlled manner. For proper operation, the soft-start capacitor should be no smaller than 1000 pF.
The LM25011 can be employed as a tracking regulator by applying the controlling voltage to the SS pin. The
regulator’s output voltage tracks the applied voltage, gained up by the ratio of the feedback resistors. The applied
voltage at the SS pin must be within the range of 0.5V to 2.6V. The absolute maximum rating for the SS pin is
3.0V. If the tracking function causes the voltage at the FB pin to go below the thresholds for the PGD pin, the
PGD pin will switch low (see POWER GOOD OUTPUT (PGD)). An internal switch grounds the SS pin if the input
voltage at VIN is below its under-voltage lock-out threshold or if the Thermal Shutdown activates. If the tracking
function (described above) is used, the tracking voltage applied to the SS pin must be current limited to a
maximum of 1 mA.
SHUTDOWN FUNCTION
The SS pin can be used to shutdown the LM25011 by grounding the SS pin as shown in Figure 20. Releasing
the pin allows normal operation to resume.
SS
STOP
RUN
LM25011
CSS
Figure 20. Shutdown Implementation
POWER GOOD OUTPUT (PGD)
The Power Good output (PGD) indicates when the voltage at the FB pin is close to the internal 2.51V reference
voltage. The rising threshold at the FB pin for the PGD output to switch high is 95% of the internal reference. The
falling threshold for the PGD output to switch low is approximately 3.3% below the rising threshold.
The PGD pin is internally connected to the drain of an N-channel MOSFET switch. An external pull-up resistor
(RPGD), connected to an appropriate voltage not exceeding 7V, is required at PGD to indicate the LM25011’s
status to other circuitry. When PGD is low, the pin’s voltage is determined by the current into the pin. See the
graph “PGD Low Voltage vs. Sink Current”.
Upon powering up the LM25011, the PGD pin is high until the voltage at VIN reaches 2V, at which time PGD
switches low. As VIN is increased PGD stays low until the output voltage takes the voltage at the FB pin above
95% of the internal reference voltage, at which time PGD switches high. As VIN is decreased (during shutdown)
PGD remains high until either the voltage at the FB pin falls below approximately 92% of the internal reference,
or when VIN falls below its lower UVLO threshold, whichever occurs first. PGD then switches low, and remains
low until VIN falls below 2V, at which time PGD switches high. If the LM25011 is used as a tracking regulator (see
SOFT-START), the PGD output is high as long as the voltage at the FB pin is above the thresholds mentioned
above.
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THERMAL SHUTDOWN
The LM25011 should be operated so the junction temperature does not exceed 125°C. If the junction
temperature increases above that, an internal Thermal Shutdown circuit activates (typically) at 155°C, taking the
controller to a low power reset state by disabling the buck switch and taking the SS pin to ground. This feature
helps prevent catastrophic failures from accidental device overheating. When the junction temperature reduces
below 135°C (typical hysteresis = 20°C) normal operation resumes.
14
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SNVS617G – APRIL 2009 – REVISED FEBRUARY 2013
APPLICATIONS INFORMATION
EXTERNAL COMPONENTS
The procedure for calculating the external components is illustrated with a design example using the LM25011.
Referring to the Block Diagram, the circuit is to be configured for the following specifications:
• VOUT = 5V
• VIN = 8V to 36V
• Minimum load current for continuous conduction mode (IOUT(min) = 300 mA
• Maximum load current (IOUT(max) = 1.5 A
• Switching frequency (FS) = 1.0 MHz
• Soft-start time = 5 ms
RFB2 and RFB1: These resistors set the output voltage, and their ratio is calculated from:
RFB2/RFB1 = (VOUT/2.51V) - 1
(8)
For this example, RFB2/RFB1 = 0.992. RFB1 and RFB2 should be chosen from standard value resistors in the range
of 1.0 kΩ – 10 kΩ which satisfy the above ratio. For this example, 4.99 kΩ is chosen for both resistors, providing
a 5.02V output.
RT: This resistor sets the on-time, and (by default) the switching frequency. First check that the desired
frequency does not require an on-time or off-time shorter than the minimum allowed values (90 ns and 150,
respectively). The minimum on-time occurs at the maximum input voltage. For this example:
VOUT
tON(min) =
VIN(max) x FS
=
5V
= 139 ns
36V x 1 MHz
(9)
The minimum off-time occurs at the minimum input voltage. For this example:
tOFF(min) =
VIN(min) - VOUT
VIN(min) x FS
=
8V - 5V
= 375 ns
8V x 1 MHz
(10)
Both the on-time and off-time are acceptable since they are significantly greater than the minimum value for
each. The RT resistor is calculated from Equation 6 using the minimum input voltage:
5 - (8V x 1MHz x 15 ns)
- 500: = 118.5 k:
RT =
-11
1MHz x 4.1 x 10
(11)
A standard value 118 kΩ resistor is selected. The minimum on-time calculates to 152 ns at VIN = 36V, and the
maximum on-time calculates to 672 ns at Vin = 8V
L1: The parameters controlled by the inductor are the inductor current ripple amplitude (IOR), and the ripple
voltage amplitude across the current sense resistor RS. The minimum load current is used to determine the
maximum allowable ripple in order to maintain continuous conduction mode (the lower peak does not reach 0
mA). This is not a requirement of the LM25011, but serves as a guideline for selecting L1. For this example, the
maximum ripple current should be less than:
IOR(max) = 2 x IOUT(min) = 600 mA p-p
(12)
For applications where the minimum load current is zero, a good starting point for allowable ripple is 20% of the
maximum load current. In this case substitute 20% of IOUT(max) for IOUT(min) in Equation 12. The ripple amplitude
calculated in Equation 12 is then used in Equation 13:
L1(min) =
tON(min) x (VIN(max) - VOUT)
= 7.85 PH
IOR(max)
(13)
A standard value 10 µH inductor is chosen. Using this inductor value, the maximum ripple current amplitude,
which occurs at maximum VIN, calculates to 472 mAp-p, and the peak current is 1736 mA at maximum load
current. Ensure the selected inductor is rated for this peak current. The minimum ripple current, which occurs at
minimum VIN, calculates to 200 mAp-p.
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RS: The minimum current limit threshold is calculated at maximum load current, using the minimum ripple current
calculated above. The current limit threshold is the lower peak of the inductor current waveform when in current
limit (see Figure 18).
ILIM = 1.5A – (0.2 A/2) = 1.4A
(14)
Current limit detection occurs when the voltage across the sense resistor (RS) reaches the current limit threshold.
To allow for tolerances, the sense resistor value is calculated using the minimum threshold specification:
RS = 115 mV/1.4A = 82 mΩ
(15)
The next smaller standard value, 80 mΩ, is selected. The next step is to ensure that sufficient ripple voltage
occurs across RS with this value sense resistor. As mentioned in the Ripple Requirements section, a minimum of
15 mVp-p voltage ripple is required across the RS sense resistor during the off-time to ensure the regulation
circuit operates properly. The ripple voltage is the product of the inductor ripple current amplitude and the sense
resistor value. In this case, the minimum ripple voltage calculates to:
VRIPPLE = ΔI x RS = 200 mA x 0.080Ω = 16 mV
(16)
If the ripple voltage had calculated to less than 15 mVp-p the inductor value would have to be reduced to
increase the ripple current amplitude. This would have required a recalculation of ILIM and RS in the above
equations. Since the minimum requirement is satisfied in this case no change is necessary.
The nominal current limit threshold calculates to 1.63A. The minimum and maximum thresholds calculate to
1.44A and 1.83A respectively, using the minimum and maximum limits for the current limit threshold
specification. The load current is equal to the threshold current plus one half the ripple current. Under normal
load conditions, the maximum power dissipation in RS occurs at maximum load current, and at maximum input
voltage where the on-time duty cycle is minimum. In this design example, the minimum on-time duty cycle is:
Duty Cycle = D =
VOUT
5V
= 13.9%
=
36V
VIN
(17)
At maximum load current, the power dissipation in RS is equal to:
P(RS) = (1.5A)2 x 0.080Ω x (1 – 0.139) = 155 mW
(18)
When in current limit the maximum power dissipation in RS calculates to
P(RS) = (1.83A + 0.472A/4)2 x 0.080Ω = 304 mW
(19)
Duty cycle is not included in this power calculation since the on-time duty cycle is typically <5% when in current
limit.
COUT: The output capacitor should typically be no smaller than 3.3 µF, although that is dependent on the
frequency and the desired output characteristics. COUT should be a low ESR good quality ceramic capacitor.
Experimentation is usually necessary to determine the minimum value for COUT, as the nature of the load may
require a larger value. A load which creates significant transients requires a larger value for COUT than a nonvarying load.
CIN and CBYP: The purpose of CIN is to supply most of the switch current during the on-time, and limit the voltage
ripple at VIN, since it is assumed the voltage source feeding VIN has some amount of source impedance. When
the buck switch turns on, the current into VIN suddenly increases to the lower peak of the inductor’s ripple
current, then ramps up to the upper peak, then drops to zero at turn-off. The average current during the on-time
is the average load current. For a worst case calculation, CIN must supply this average load current during the
maximum on-time, without letting the voltage at the VIN pin drop below a minimum operating level of 5.5V. For
this exercise 0.5V is chosen as the maximum allowed input ripple voltage. Using the maximum load current, the
minimum value for CIN is calculated from:
CIN =
IOUT(max) x tON(max) 1.5A x 672 ns
= 2.02 PF
=
0.5V
'V
(20)
where tON is the maximum on-time, and ΔV is the allowable ripple voltage at VIN. The purpose of CBYP is to
minimize transients and ringing due to long lead inductance leading to the VIN pin. A low ESR 0.1 µF ceramic
chip capacitor is recommended, and CBYP must be located close to the VIN and SGND pins.
CBST: The recommended value for CBST is 0.1 µF. A high quality ceramic capacitor with low ESR is
recommended as CBST supplies a surge current to charge the buck switch gate at each turn-on. A low ESR also
helps ensure a complete recharge during each off-time.
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SNVS617G – APRIL 2009 – REVISED FEBRUARY 2013
CSS: The capacitor at the SS pin determines the soft-start time, i.e. the time for the output voltage to reach its
final value (t1 in Figure 17). For a soft-start time of 5 ms, the capacitor value is determined from the following:
5 ms x 10 PA
= 0.02 PF
CSS =
2.51V
(21)
D1: A Schottky diode is recommended. Ultra-fast recovery diodes are not recommended as the high speed
transitions at the SW pin may affect the regulator’s operation due to the diode’s reverse recovery transients. The
diode must be rated for the maximum input voltage, the maximum load current, and the peak current which
occurs when the current limit and maximum ripple current are reached simultaneously. The diode’s average
power dissipation is calculated from:
PD1 = VF x IOUT x (1 - D)
(22)
where VF is the diode’s forward voltage drop, and D is the on-time duty cycle.
FINAL CIRCUIT
The final circuit is shown in Figure 21, and its performance is shown in Figure 22 and Figure 23. The current limit
measured approximately 1.62A at Vin = 8V, and 1.69A at Vin = 36V.
8V to 36V
Input
RT
118 k:
CIN
4.7 PF
CBYP
0.1 PF
BST
VIN
CBST 0.1 PF
L1 10 PH
LM25011
SW
RT
VOUT
D1
5V
VPGD
CS
RPGD
10 k:
Power
Good
COUT
10 PF
RS
80 m:
PGD
CSG
RFB2
4.99 k:
SS
CSS
0.022 PF
SGND
FB
RFB1
4.99 k:
Figure 21. Example Circuit
Figure 22. Efficiency (Circuit of Figure 21)
Figure 23. Frequency vs VIN (Circuit of Figure 21)
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OUTPUT RIPPLE CONTROL (LM25011A)
The LM25011A most likely will require more ripple voltage than is generated across the RS resistor. Additional
ripple can be supplied to the FB pin, in phase with the switching waveform at the SW pin, for proper operation.
The required ripple can be supplied from ripple generated at VOUT, through the feedback resistors, as described
in Option A below. Options B and C provide for lower output ripple with one or two additional components.
The amount of additional ripple voltage needed at the FB pin is typically in the range of 30-150mV. Higher
switching frequencies or higher inductor values (less ripple current) require more ripple voltage injected on FB.
Insufficient ripple voltage will result in frequency jitter. For a particular application, add only as much ripple as
needed to stabilize the switching frequency over the required input voltage.
Option A) Lowest Cost Configuration: In this configuration R1 is installed in series with the output capacitor
(COUT) as shown in Figure 24. The inductor’s ripple current passes through R1, generating a ripple voltage at
VOUT. The minimum value for R1 is:
R1 =
VRIPPLE x (RFB2 + RFB1)
'I x RFB1
(23)
where ΔI is the minimum ripple current amplitude, which occurs at minimum Vin.
BST
C BST
LM25011A
L1
SW
VOUT
D1
CS
RFB2
R1
RS
C OUT
CSG
SGND
R FB1
FB
Figure 24. Option A – Lowest Cost Ripple Configuration
Option B) Intermediate Ripple Configuration: This configuration generates less ripple at VOUT than Option A
above by the addition of one capacitor (Cff), as shown in Figure 25.
BST
C BST
LM25011A
L1
SW
VOUT
D1
CS
R1
Cff
RS
RFB2
C OUT
CSG
SGND
FB
R FB1
Figure 25. Option B – Intermediate Ripple Configuration
Since the output ripple is passed by Cff to the FB pin with little or no attenuation, R1’s value can be chosen so
the minimum ripple at VOUT is approximately 150 mVp-p. The minimum value for R1 is calculated from:
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R1 =
SNVS617G – APRIL 2009 – REVISED FEBRUARY 2013
VRIPPLE
'I
(24)
where ΔI is the minimum ripple current amplitude, which occurs at minimum Vin. The minimum value for Cff is
calculated from:
3 x tON(max)
Cff >
RFB1//RFB2
(25)
where tON(max) is the maximum on-time (at minimum VIN), and RFB1//RFB2 is the parallel equivalent of the feedback
resistors.
Option C) Minimum Ripple Configuration:
BST
C BST
LM25011A
L1
SW
VOUT
D1
Rr
CS
Cr
COUT
Cac
RS
CSG
SGND
FB
RFB1
Figure 26. Option C: Minimum Output Ripple Configuration
In some applications, the ripple induced by series resistor R1 may not be acceptable. An external ripple circuit,
as shown in Figure 26, can be used to provide the required ripple to the FB pin.
1. The time constant τ=Rr*Cr should be greater than 8-10 times the switching period to generate a triangular
ramp at FB pin.
2. The smallest ripple at feedback ΔVFB = (VIN(min)-VOUT)*TON(max)/τ.
3. The ramp capacitor Cr should much smaller than the ac coupling capacitor Cac. Usually Cac=100nF,
Cr=1nF, and Rr is chosen to satisfy conditions 1 and 2 above.
PC BOARD LAYOUT
The LM25011 regulation and current limit comparators are very fast, and respond to short duration noise pulses.
Layout considerations are therefore critical for optimum performance. The layout must be as neat and compact
as possible, and all of the components must be as close as possible to their associated pins. The two major
current loops conduct currents which switch very fast, and therefore those loops must be as small as possible to
minimize conducted and radiated EMI. The first loop is formed by CIN, through the VIN to SW pins, L1, COUT, and
back to CIN. The second current loop is formed by RS, D1, L1, COUT and back to RS. The ground connection from
CSG to the ground end of CIN should be as short and direct as possible.
The power dissipation within the LM25011 can be approximated by determining the circuit’s total conversion loss
(PIN - POUT), and then subtracting the power losses in the free-wheeling diode, the sense resistor, and the
inductor. The power loss in the diode is approximately:
PD1 = IOUT x VF x (1-D)
(26)
where Iout is the load current, VF is the diode’s forward voltage drop, and D is the on-time duty cycle. The power
loss in the sense resistor is:
PRS = (IOUT)2 x RS x (1 – D)
(27)
The power loss in the inductor is approximately:
PL1 = IOUT2 x RL x 1.1
(28)
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LM25011, LM25011-Q1
SNVS617G – APRIL 2009 – REVISED FEBRUARY 2013
www.ti.com
where RL is the inductor’s DC resistance, and the 1.1 factor is an approximation for the AC losses. If it is
expected that the internal dissipation of the LM25011 will produce excessive junction temperatures during normal
operation, good use of the PC board’s ground plane can help to dissipate heat. Additionally the use of wide PC
board traces, where possible, can help conduct heat away from the IC pins. Judicious positioning of the PC
board within the end product, along with the use of any available air flow (forced or natural convection) can help
reduce the junction temperature.
20
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SNVS617G – APRIL 2009 – REVISED FEBRUARY 2013
REVISION HISTORY
Changes from Revision F (February 2013) to Revision G
•
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 20
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PACKAGE OPTION ADDENDUM
www.ti.com
23-Jun-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
LM25011AMY
ACTIVE
MSOPPowerPAD
DGQ
10
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 125
SN9B
LM25011AMYE
ACTIVE
MSOPPowerPAD
DGQ
10
250
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 125
SN9B
LM25011AMYX
ACTIVE
MSOPPowerPAD
DGQ
10
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 125
SN9B
LM25011AQ1MY/NOPB
ACTIVE
MSOPPowerPAD
DGQ
10
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 125
SZZA
LM25011AQ1MYX/NOPB
ACTIVE
MSOPPowerPAD
DGQ
10
3500
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 125
SZZA
LM25011MY/NOPB
ACTIVE
MSOPPowerPAD
DGQ
10
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 125
SVUB
LM25011MYX/NOPB
ACTIVE
MSOPPowerPAD
DGQ
10
3500
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 125
SVUB
LM25011Q1MY/NOPB
ACTIVE
MSOPPowerPAD
DGQ
10
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 125
SZFB
LM25011Q1MYX/NOPB
ACTIVE
MSOPPowerPAD
DGQ
10
3500
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 125
SZFB
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
23-Jun-2013
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LM25011, LM25011-Q1 :
• Catalog: LM25011
• Automotive: LM25011-Q1
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
10-Jul-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LM25011AMYE
MSOPPower
PAD
DGQ
10
250
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LM25011AQ1MY/NOPB
MSOPPower
PAD
DGQ
10
1000
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LM25011AQ1MYX/NOPB MSOPPower
PAD
DGQ
10
3500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LM25011MY/NOPB
MSOPPower
PAD
DGQ
10
1000
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LM25011MYX/NOPB
MSOPPower
PAD
DGQ
10
3500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LM25011Q1MY/NOPB
MSOPPower
PAD
DGQ
10
1000
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LM25011Q1MYX/NOPB
MSOPPower
PAD
DGQ
10
3500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
10-Jul-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM25011AMYE
MSOP-PowerPAD
DGQ
LM25011AQ1MY/NOPB
MSOP-PowerPAD
DGQ
10
250
213.0
191.0
55.0
10
1000
213.0
191.0
55.0
LM25011AQ1MYX/NOPB MSOP-PowerPAD
DGQ
10
3500
367.0
367.0
35.0
LM25011MY/NOPB
MSOP-PowerPAD
DGQ
10
1000
213.0
191.0
55.0
LM25011MYX/NOPB
MSOP-PowerPAD
DGQ
10
3500
367.0
367.0
35.0
LM25011Q1MY/NOPB
MSOP-PowerPAD
DGQ
10
1000
213.0
191.0
55.0
LM25011Q1MYX/NOPB
MSOP-PowerPAD
DGQ
10
3500
367.0
367.0
35.0
Pack Materials-Page 2
MECHANICAL DATA
DGQ0010A
MUC10A (Rev A)
BOTTOM VIEW
www.ti.com
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