a FEATURES Low Offset Voltage: 100 mV max Low Drift: 2 mV/8C max Wide Gain Range 1 to 10,000 High Common-Mode Rejection: 115 dB min High Bandwidth (G = 1000): 200 kHz typ Gain Equation Accuracy: 0.5% max Single Resistor Gain Set Input Overvoltage Protection Low Cost Available In Die Form APPLICATIONS Differential Amplifier Strain Gauge Amplifier Thermocouple Amplifier RTD Amplifier Programmable Gain Instrumentation Amplifier Medical Instrumentation Data Acquisition Systems High Accuracy 8-Pin Instrumentation Amplifier AMP02 PIN CONNECTIONS Epoxy Mini-DIP 16-Pin SOL (P Suffix) (S Suffix) and Cerdip (Z Suffix) NC = NO CONNECT GENERAL DESCRIPTION The AMP02 is the first precision instrumentation amplifier available in an 8-pin package. Gain of the AMP02 is set by a single external resistor, and can range from 1 to 10,000. No gain set resistor is required for unity gain. The AMP02 includes an input protection network that allows the inputs to be taken 60 V beyond either supply rail without damaging the device. Figure 1. Basic Circuit Connections Laser trimming reduces the input offset voltage to under 100 µV. Output offset voltage is below 4 mV and gain accuracy is better than 0.5% for gain of 1000. PMI’s proprietary thin-film resistor process keeps the gain temperature coefficient under 50 ppm/°C. A reference pin is provided to allow the output to be referenced to an external dc level. This pin may be used for offset correction or level shifting as required. In the 8-pin package, sense is internally connected to the output. Due to the AMP02’s design, its bandwidth remains very high over a wide range of gain. Slew rate is over 4 V/µs making the AMP02 ideal for fast data acquisition systems. For an instrumentation amplifier with the highest precision, consult the AMP01 data sheet. For the highest input impedance and speed, consult the AMP05 data sheet. REV. D Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703 AMP02–SPECIFICATIONS ELECTRICAL CHARACTERISTICS (@ V = 615 V, V S Parameter OFFSET VOLTAGE Input Offset Voltage Input Offset Voltage Drift Output Offset Voltage Symbol Conditions VIOS TA = +25°C –40°C ≤ TA ≤ +85°C –40°C ≤ TA ≤ +85°C TA = +25°C –40°C ≤ TA ≤ +85°C –40°C ≤ TA ≤ +85°C VS = ± 4.8 V to ± 18 V G = 100, 1000 G = 10 G=1 VS = ± 4.8 V to ± 18 V –40°C ≤ TA ≤ +85°C G = 1000, 100 G = 10 G=1 TCVIOS VOOS Output Offset Voltage Drift TCVOOS Power Supply Rejection PSR CM = 0 V, TA = +258C, unless otherwise noted.) Min AMP02E Typ Max 20 50 0.5 1 4 50 110 95 75 120 110 90 105 90 70 110 95 75 dB dB dB RIN Differential, G ≤ 1000 Common-Mode, G = 1000 TA = +25°C (Note 1) VCM = ± 11 V G = 1000, 100 G = 10 G=1 VCM = ± 11 V –40°C ≤ TA ≤ +85°C G = 100, 1000 G = 10 G=1 10 16.5 OUTPUT RATING Output Voltage Swing GTC NOISE Voltage Density, RTI fO = 1 kHz G = 1000 G = 100 G = 10 G=1 fO = 1 kHz, G = 1000 0.1 Hz to 10 Hz G = 1000 G = 100 G = 10 Noise Current Density, RTI in Input Noise Voltage en p-p DYNAMIC RESPONSE Small-Signal Bandwidth (–3 dB) G = 100, 1000 Slew Rate Settling Time BW G=1 G = 10 SR tS G = 10, RL = 1 kΩ To 0.01% ± 10 V Step G = 1 to 1000 5 ± 11 20 10 nA pA/°C nA pA/°C 10 16.5 GΩ GΩ V 110 95 75 115 110 90 dB dB dB 110 95 75 120 110 90 105 90 70 115 105 85 dB dB dB 0.50 0.30 0.25 0.02 10k 0.006 20 en 4 250 2 15 120 115 95 1 TA = +25°C, RL = 1 kΩ RL = 1 kΩ, –40°C ≤ TA ≤ +85°C Output-to-Ground Short Output-to-Ground Short 10 115 100 80 G = 1 to 1000 1 ≤ G ≤ 1000 (Notes 2, 3) VOUT Positive Current Limit Negative Current Limit ± 11 G = 1000 G = 100 G = 10 G=1 G µV µV µV/°C mV mV µV/°C dB dB dB INPUT Input Resistance Gain Range Nonlinearity Temperature Coefficient 200 350 4 8 20 200 115 100 80 2 150 1.2 9 G = 50 kΩ +1 RG Units 110 95 75 TA = +25°C –40°C ≤ TA ≤ +85°C TA = +25°C –40°C ≤ TA ≤ +85°C GAIN Gain Equation Accuracy 40 100 1 2 9 100 Max 125 110 90 IB TCIB IOS TCIOS IVR CMR 100 200 2 4 10 100 AMP02F Typ 115 100 80 INPUT CURRENT Input Bias Current Input Bias Current Drift Input Offset Current Input Offset Current Drift Input Voltage Range Common-Mode Rejection Min ± 12 ± 11 4 ± 13 ± 12 22 32 0.70 0.50 0.40 0.05 10k 1 0.006 20 50 ± 12 ± 11 50 % % % % V/V % ppm/°C ±13 ±12 22 32 V V mA mA 9 10 18 120 0.4 9 10 18 120 0.4 nV/√Hz nV/√Hz nV/√Hz nV/√Hz pA/√Hz 0.4 0.5 1.2 0.4 0.5 1.2 µV p-p µV p-p µV p-p 1200 300 200 6 1200 300 200 6 kHz kHz kHz V/µs 10 10 µs 4 SENSE INPUT Input Resistance Voltage Range RIN 25 ± 11 25 ± 11 kΩ V REFERENCE INPUT Input Resistance Voltage Range Gain to Output RIN 50 ± 11 1 50 ± 11 1 kΩ V V/V –2– REV. D AMP02 Parameter Symbol POWER SUPPLY Supply Voltage Range Supply Current VS ISY Conditions Min AMP02E Typ ± 4.5 TA = +25°C –40°C ≤ TA ≤ +85°C 5 5 Max Min ± 18 6 6 ± 4.5 AMP02F Typ Max Units 5 5 ± 18 6 6 V mA mA NOTES 1 Input voltage range guaranteed by common-mode rejection test. 2 Guaranteed by design. 3 Gain tempco does not include the effects of external component drift. Specifications subject to change without notice. Package Type uJA2 uJC Units 8-Pin Plastic DIP (P) 16-Pin SOL (S) 96 92 37 27 °C/W °C/W ABSOLUTE MAXIMUM RATINGS Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V Common-Mode Input Voltage . [(V–) – 60 V] to [(V+) + 60 V] Differential Input Voltage . . . . [(V–) – 60 V] to [(V+) + 60 V] Output Short-Circuit Duration . . . . . . . . . . . . . . .Continuous Operating Temperature Range . . . . . . . . . . . . –40°C to +85°C Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C Function Temperature Range . . . . . . . . . . . –65°C to +150°C Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . +300°C NOTES 1 Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted. 2 θJA is specified for worst case mounting conditions, i.e., θJA is specified for device in socket for P-DIP package; θJA is specified for device soldered to printed circuit board for SOL package. ORDERING GUIDE Model AMP02EP AMP02FP AMP02AZ/883C AMP02FS AMP02GBC AMP02FS-REEL VIOS max @ VOOS max @ Temperature TA = +258C TA = +258C Range Package Description 100 µV 200 µV 200 µV 200 µV 4 mV 8 mV 10 mV 8 mV –40°C to +85°C –40°C to +85°C –55°C to +125°C –40°C to +85°C 200 µV 8 mV –40°C to +85°C 8-Pin Plastic DIP 8-Pin Plastic DIP 8-Pin Cerdip 16-Pin SOIC Die 16-Pin SOIC Figure 2. Simplified Schematic REV. D –3– AMP02 1. RG1 2. –IN 3. +IN 4. V– 5. REFERENCE 6. OUT 7. V+ 8. RG2 9. SENSE CONNECT SUBSTRATE TO V– DIE SIZE 0.103 X 0.116 inch, 11,948 sq. mils (2.62 X 2.95 mm, 7.73 sq. mm) Dice Characteristics WAFER TEST LIMITS at V = 615 V, V S CM = 0 V, TA = +258C, unless otherwise noted. AMP02 GBC Limits Units VIOS 200 µV max VOOS 8 mV max Parameter Symbol Input Offset Voltage Output Offset Voltage Conditions VS = ± 4.8 V to ± 18 V G = 1000 G = 100 G = 10 G=1 110 110 95 75 Power Supply Rejection PSR Input Bias Current IB 20 nA max Input Offset Current IOS 10 nA max Input Voltage Range IVR Guaranteed by CMR Tests ± 11 V min CMR VCM = ± 11 V G = 1000 G = 100 G = 10 G=1 110 110 95 75 Common-Mode Rejection G= Gain Equation Accuracy Output Voltage Swing VOUT Supply Current ISY 50 kΩ + 1, G = 1000 RG RL = 1 kΩ dB min dB min 0.7 % max ± 12 V min 6 mA max NOTE Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AMP02 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. –4– WARNING! ESD SENSITIVE DEVICE REV. D Typical Performance Characteristics–AMP02 Figure 3. Typical Distribution of Input Offset Voltage Figure 6. Typical Distribution of Output Offset Voltage Figure 9. Input Offset Current vs. Temperature REV. D Figure 4. Typical Distribution of TCVIOS Figure 5. Input Offset Voltage Change vs. Supply Voltage Figure 7. Typical Distribution of TCVOOS Figure 8. Output Offset Voltage Change vs. Supply Voltage Figure 10. Input Bias Current vs. Temperature –5– Figure 11. Input Bias Current vs. Supply Voltage AMP02 Figure 12. Closed-Loop Voltage Gain vs. Frequency Figure 15. Positive PSR vs. Frequency Figure 18. Voltage Noise Density vs. Frequency Figure 13. Common-Mode Rejection vs. Frequency Figure 14. Common-Mode Rejection vs. Voltage Gain Figure 16. Negative PSR vs. Frequency Figure 17. Total Harmonic Distortion vs. Frequency Figure 19. RTI Voltage Noise Density vs. Gain –6– Figure 20. 0.1 Hz to 10 Hz Noise AV = 1000 REV. D AMP02 Figure 21. Maximum Output Swing vs. Frequency Figure 22. Maximum Output Voltage vs. Load Resistance Figure 24. Supply Current vs. Supply Voltage REV. D Figure 23. Closed Loop Output Impedance vs. Frequency Figure 25. Slew Rate vs. Voltage Gain –7– AMP02 APPLICATIONS INFORMATION The voltage gain can range from 1 to 10,000. A gain set resistor is not required for unity-gain applications. Metal-film or wirewound resistors are recommended for best results. INPUT AND OUTPUT OFFSET VOLTAGES Instrumentation amplifiers have independent offset voltages associated with the input and output stages. The input offset component is directly multiplied by the amplifier gain, whereas output offset is independent of gain. Therefore, at low gain, output-offset-errors dominate, while at high gain, input-offseterrors dominate. Overall offset voltage, VOS, referred to the output (RTO) is calculated as follows: The total gain accuracy of the AMP02 is determined by the tolerance of the external gain set resistor, RG, combined with the gain equation accuracy of the AMP02. Total gain drift combines the mismatch of the external gain set resistor drift with that of the internal resistors (20 ppm/°C typ). Maximum gain drift of the AMP02 independent of the external gain set resistor is 50 ppm/°C. VOS (RTO) = (VIOS 3 G) + VOOS All instrumentation amplifiers require attention to layout so thermocouple effects are minimized. Thermocouples formed between copper and dissimilar metals can easily destroy the TCVOS performance of the AMP02 which is typically 0.5 µV/°C. Resistors themselves can generate thermoelectric EMFs when mounted parallel to a thermal gradient. where VIOS and VOOS are the input and output offset voltage specifications and G is the amplifier gain. The overall offset voltage drift TCVOS, referred to the output, is a combination of input and output drift specifications. Input offset voltage drift is multiplied by the amplifier gain, G, and summed with the output offset drift: The AMP02 uses the triple op amp instrumentation amplifier configuration with the input stage consisting of two transimpedance amplifiers followed by a unity-gain differential amplifier. The input stage and output buffer are laser-trimmed to increase gain accuracy. The AMP02 maintains wide bandwidth at all gains as shown in Figure 26. For voltage gains greater than 10, the bandwidth is over 200 kHz. At unity-gain, the bandwidth of the AMP02 exceeds 1 MHz. TCVOS (RTO) = (TCVIOS 3 G) + TCVOOS where TCVIOS is the input offset voltage drift, and TCVOOS is the output offset voltage drift. Frequently, the amplifier drift is referred back to the input (RTI) which is then equivalent to an input signal change: TCVOS (RTI) =TCVIOS + TCV OOS G For example, the maximum input-referred drift of an AMP02EP set to G = 1000 becomes: TCVOS (RTI) = 2 µV/°C + 100 µV /°C = 2.1 µV/°C 1000 INPUT BIAS AND OFFSET CURRENTS Input transistor bias currents are additional error sources which can degrade the input signal. Bias currents flowing through the signal source resistance appear as an additional offset voltage. Equal source resistance on both inputs of an IA will minimize offset changes due to bias current variations with signal voltage and temperature. However, the difference between the two bias currents, the input offset current, produces an error. The magnitude of the error is the offset current times the source resistance. Figure 26. The AMP02 Keeps Its Bandwidth at High Gains A current path must always be provided between the differential inputs and analog ground to ensure correct amplifier operation. Floating inputs, such as thermocouples, should be grounded close to the signal source for best common-mode rejection. COMMON-MODE REJECTION Ideally, an instrumentation amplifier responds only to the difference between the two input signals and rejects common-mode voltages and noise. In practice, there is a small change in output voltage when both inputs experience the same common-mode voltage change; the ratio of these voltages is called the commonmode gain. Common-mode rejection (CMR) is the logarithm of the ratio of differential-mode gain to common-mode gain, expressed in dB. Laser trimming is used to achieve the high CMR of the AMP02. GAIN The AMP02 only requires a single external resistor to set the voltage gain. The voltage gain, G, is: G= 50 kΩ +1 RG and RG = 50 kΩ G –1 –8– REV. D AMP02 Figure 27. Triple Op Amp Topology of the AMP02 Figure 27 shows the triple op amp configuration of the AMP02. With all instrumentation amplifiers of this type, it is critical not to exceed the dynamic range of the input amplifiers. The amplified differential input signal and the input common-mode voltage must not force the amplifier’s output voltage beyond ± 12 V (VS = ± 15 V) or nonlinear operation will result. The input stage amplifier’s output voltages at V, and V2 equals: 2R V D V1 = – 1+ R 2 +V CM G VD +V CM = –G 2 2R V D V2 = 1+ R 2 +V CM G V = G D +V CM 2 where VD = Differential input voltage = (+IN) – (–IN) VCM = Common-mode input voltage G = Gain of instrumentation amplifier If V1 and V2 can equal ± 12 V maximum, then the common-mode input voltage range is: CMVR = ± 12V – REV. D GV D 2 GROUNDING The majority of instruments and data acquisition systems the separate grounds for analog and digital signals. Analog ground may also be divided into two or more grounds which will be tied together at one point, usually the analog power-supply ground. In addition, the digital and analog grounds may be joined, normally at the analog ground pin on the A to D converter. Follow this basic practice is essential for good circuit performance. Mixing grounds causes interactions between digital circuits and the analog signals. Since the ground returns have finite resistance and inductance, hundreds of millivolts can be develop between the system ground and the data acquisition components. Using separate ground returns minimizes the current flow in the sensitive analog return path to the system ground point. Consequently, noisy ground currents from logic gates do interact with the analog signals. Inevitably, two or more circuits will be joined together with their grounds at differential potentials. In these situations, the differential input of an instrumentation amplifier, with its high CMR, can accurately transfer analog information from one circuit to another. SENSE AND REFERENCE TERMINALS The sense terminal completes the feedback path for the instrumentation amplifier output stage and is internally connected directly to the output. For SOL devices, connect the sense terminal to the output. The output signal is specified with respect to the reference terminal, which is normally connected to analog ground. The reference may also be used for offset correction level shifting. A reference source resistance will reduce the common-mode rejection by the ratio of 25 kΩ/RREF. If the reference source resistance is 1 Ω, then the CMR will be reduced 88 dB (25 kΩ/1 Ω = 88 dB). –9– AMP02 OVERVOLTAGE PROTECTION POWER SUPPLY CONSIDERATIONS Instrumentation amplifiers invariably sit at the front end of instrumentation systems where there is a high probability of exposure to overloads. Voltage transients, failure of a transducer, or removal of the amplifier power supply while the signal source is connected may destroy or degrade the performance of an unprotected device. A common technique used is to place limiting resistors in series with each input, but this adds noise. The AMP02 includes internal protection circuitry that limits the input current to ± 4 mA for a 60 V differential overload (see Figure 28) with power off, ± 2.5 mA with power on. Achieving the rated performance of precision amplifiers in a practical circuit requires careful attention to external influences. For example, supply noise and changes in the nominal voltage directly affect the input offset voltage. A PSR of 80 dB means that a change of 100 mV on the supply, not an uncommon value, will produce a 10 µV input offset change. Consequently, care should be taken in choosing a power unit that has a low output noise level, good line and load regulation, and good temperature stability. In addition, each power supply should be properly bypassed. Figure 28. AMP02’s Input Protection Circuitry Limits Input Current During Overvoltage Conditions –10– REV. D AMP02 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). Mini-Dip (N-8) Package 0.430 (10.92) 0.348 (8.84) 8 5 0.280 (7.11) 0.240 (6.10) 1 4 0.060 (1.52) 0.015 (0.38) PIN 1 0.210 (5.33) MAX 0.325 (8.25) 0.300 (7.62) 0.195 (4.95) 0.115 (2.93) 0.130 (3.30) MIN 0.160 (4.06) 0.115 (2.93) 0.022 (0.558) 0.100 0.070 (1.77) 0.014 (0.356) (2.54) 0.045 (1.15) BSC 0.015 (0.381) 0.008 (0.204) SEATING PLANE Cerdip (Q-8) Package 0.005 (0.13) MIN 0.055 (1.4) MAX 8 5 0.310 (7.87) 0.220 (5.59) 1 4 PIN 1 0.405 (10.29) MAX 0.320 (8.13) 0.290 (7.37) 0.060 (1.52) 0.015 (0.38) 0.200 (5.08) MAX 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.100 0.070 (1.78) 0.014 (0.36) (2.54) 0.030 (0.76) BSC 0.150 (3.81) MIN SEATING PLANE 0.015 (0.38) 0.008 (0.20) 15° 0° SOL (R-16) Package 9 1 8 PIN 1 0.0118 (0.30) 0.0040 (0.10) 0.0500 (1.27) BSC REV. D 0.4193 (10.65) 0.3937 (10.00) 16 0.2992 (7.60) 0.2914 (7.40) 0.4133 (10.50) 0.3977 (10.00) 0.1043 (2.65) 0.0926 (2.35) 0.0291 (0.74) x 45° 0.0098 (0.25) 8° 0.0192 (0.49) 0° SEATING 0.0125 (0.32) 0.0138 (0.35) PLANE 0.0091 (0.23) –11– 0.0500 (1.27) 0.0157 (0.40) –12– PRINTED IN U.S.A. 000000000