SDAS187A − APRIL 1982 − REVISED DECEMBER 1994 SN54ALS00A, SN54AS00 . . . J PACKAGE SN74ALS00A, SN74AS00 . . . D OR N PACKAGE (TOP VIEW) description These devices contain four independent 2-input positive-NAND gates. They perform the Boolean functions Y = A • B or Y = A + B in positive logic. The SN54ALS00A and SN54AS00 are characterized for operation over the full military temperature range of − 55°C to 125°C. The SN74ALS00A and SN74AS00 are characterized for operation from 0°C to 70°C. FUNCTION TABLE (each gate) INPUTS B H H L L X H X L H 1B 2A 2B 3A 3B 4A 4B 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y SN54ALS00A, SN54AS00 . . . FK PACKAGE (TOP VIEW) 1Y NC 2A NC 2B logic symbol† 1A 1 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 4A NC 4Y NC 3B 2Y GND NC 3Y 3A A OUTPUT Y 1A 1B 1Y 2A 2B 2Y GND 4B Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs 1B 1A NC VCC • 3 & 2 4 6 5 NC − No internal connection 1Y 2Y 9 8 10 3Y 12 11 13 4Y † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, J, and N packages. Copyright 1994, Texas Instruments Incorporated ! " #$%! " &$'(#! )!%* )$#!" # ! "&%##!" &% !+% !%" %," "!$%!" "!)) -!.* )$#! &#%""/ )%" ! %#%""(. #($)% !%"!/ (( &%!%"* • DALLAS, TEXAS 75265 • HOUSTON, TEXAS 77251−1443 POST OFFICE BOX 655303 POST OFFICE BOX 1443 1 SDAS187A − APRIL 1982 − REVISED DECEMBER 1994 logic diagram (positive logic) 1A 1B 2A 2B 3A 3B 4A 4B 1 3 2 1Y 4 6 5 2Y 9 8 10 3Y 12 11 13 4Y Pin numbers shown are for the D, J, and N packages. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Operating free-air temperature range, TA: SN54ALS00A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C SN74ALS00A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions SN54ALS00A VCC VIH Supply voltage High-level input voltage SN74ALS00A MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 2 2 UNIT V V VIL Low-level input voltage 0.8‡ 0.7§ IOH IOL High-level output current −0.4 −0.4 mA Low-level output current 4 8 mA 70 °C TA Operating free-air temperature ‡ Applies over temperature range − 55°C to 70°C § Applies over temperature range 70°C to 125°C 2 −55 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 125 0.8 V 0 SDAS187A − APRIL 1982 − REVISED DECEMBER 1994 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH SN54ALS00A TYP† MAX TEST CONDITIONS MIN VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = −18 mA IOH = − 0.4 mA VOL VCC = 4.5 V IOL = 4 mA IOL = 8 mA II IIH VCC = 5.5 V, VCC = 5.5 V, VI = 7 V VI = 2.7 V IIL IO‡ VCC = 5.5 V, VCC = 5.5 V, VI = 0.4 V VO = 2.25 V ICCH ICCL VCC = 5.5 V, VCC = 5.5 V, VI = 0 VI = 4.5 V SN74ALS00A TYP† MAX MIN −1.2 VCC − 2 −1.5 VCC − 2 0.25 V V 0.4 0.25 0.4 0.35 0.5 0.1 −20 UNIT 0.1 V mA 20 20 µA −0.1 −0.1 mA −112 mA mA −112 −30 0.5 0.85 0.5 0.85 1.5 3 1.5 3 mA † All typical values are at VCC = 5 V, TA = 25°C. ‡ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX§ SN54ALS00A tPLH tPHL A or B Y UNIT SN74ALS00A MIN MAX MIN MAX 3 15 3 11 2 9 2 8 ns § For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 3 SDAS187A − APRIL 1982 − REVISED DECEMBER 1994 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Operating free-air temperature range, TA: SN54AS00 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C SN74AS00 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions SN54AS00 SN74AS00 MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL IOH Low-level input voltage 0.8 0.8 V High-level output current −2 −2 mA IOL TA Low-level output current 20 mA 70 °C High-level input voltage 2 2 V 20 Operating free-air temperature −55 125 V 0 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER SN54AS00 TYP‡ MAX TEST CONDITIONS MIN VIK VOH VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = −18 mA IOH = − 2 mA VOL II VCC = 4.5 V, VCC = 5.5 V, IOL = 20 mA VI = 7 V IIH IIL IO§ VCC = 5.5 V, VCC = 5.5 V, VI = 2.7 V VI = 0.4 V VCC = 5.5 V, VCC = 5.5 V, VO = 2.25 V VI = 0 ICCH ICCL SN74AS00 TYP‡ MAX MIN −1.2 VCC − 2 −1.2 VCC − 2 0.35 0.5 0.5 V 0.1 0.1 mA 20 20 µA −112 2 V V 0.35 −0.5 −30 UNIT −30 3.2 2 −0.5 mA −112 mA 3.2 mA VCC = 5.5 V, VI = 4.5 V 10.8 17.4 10.8 17.4 mA ‡ All typical values are at VCC = 5 V, TA = 25°C. § The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. switching characteristics (see Figure 1) PARAMETER tPLH tPHL FROM (INPUT) TO (OUTPUT) A or B Y VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX¶ SN54AS00 SN74AS00 MIN MAX MIN MAX 1 5 1 4.5 1 5 1 4 ¶ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. 4 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • UNIT ns SDAS187A − APRIL 1982 − REVISED DECEMBER 1994 PARAMETER MEASUREMENT INFORMATION SERIES 54ALS/74ALS AND 54AS/74AS DEVICES 7V RL = R1 = R2 VCC S1 RL R1 Test Point From Output Under Test CL (see Note A) From Output Under Test RL Test Point CL (see Note A) CL (see Note A) LOAD CIRCUIT FOR BI-STATE TOTEM-POLE OUTPUTS LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS 3.5 V Timing Input Test Point From Output Under Test LOAD CIRCUIT FOR 3-STATE OUTPUTS 3.5 V High-Level Pulse 1.3 V R2 1.3 V 1.3 V 0.3 V 0.3 V tsu Data Input tw th 3.5 V 1.3 V 3.5 V Low-Level Pulse 1.3 V 0.3 V 1.3 V 0.3 V VOLTAGE WAVEFORMS PULSE DURATIONS VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 3.5 V Output Control (low-level enabling) 1.3 V 1.3 V 0.3 V tPZL Waveform 1 S1 Closed (see Note B) tPLZ 3.5 V Input tPZH 1.3 V 0.3 V tPHL tPLH VOH In-Phase Output VOL 0.3 V 1.3 V 1.3 V VOL tPLH tPHL VOH 1.3 V 1.3 V [3.5 V 1.3 V tPHZ Waveform 2 S1 Open (see Note B) 1.3 V VOH Out-of-Phase Output (see Note C) 0.3 V [0 V 1.3 V 1.3 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. When measuring propagation delay items of 3-state outputs, switch S1 is open. D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%. E. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuits and Voltage Waveforms • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 5 PACKAGE OPTION ADDENDUM www.ti.com 17-Dec-2015 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) 5962-86833012A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 596286833012A SNJ54ALS 00AFK 5962-8683301DA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8683301DA SNJ54ALS00AW JM38510/37001B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/ 37001B2A JM38510/37001BCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 37001BCA M38510/37001B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/ 37001B2A M38510/37001BCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 37001BCA SN54ALS00AJ ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 SN54ALS00AJ SN54AS00J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 SN54AS00J SN74ALS00AD ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 ALS00A SN74ALS00ADBR ACTIVE SSOP DB 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 G00A SN74ALS00ADG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 ALS00A SN74ALS00ADR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 ALS00A SN74ALS00ADRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 ALS00A SN74ALS00ADRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 ALS00A SN74ALS00AN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74ALS00AN SN74ALS00AN3 OBSOLETE PDIP N 14 TBD Call TI Call TI 0 to 70 SN74ALS00ANE4 ACTIVE PDIP N 14 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 25 Addendum-Page 1 SN74ALS00AN Samples PACKAGE OPTION ADDENDUM www.ti.com 17-Dec-2015 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) SN74ALS00ANSR ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 ALS00A SN74AS00D ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 AS00 SN74AS00DR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 AS00 SN74AS00DRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 AS00 SN74AS00N ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74AS00N SN74AS00NE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74AS00N SN74AS00NSR ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74AS00 SNJ54ALS00AFK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 596286833012A SNJ54ALS 00AFK SNJ54ALS00AJ ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 SNJ54ALS00AJ SNJ54ALS00AW ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8683301DA SNJ54ALS00AW SNJ54AS00J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 SNJ54AS00J (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com 17-Dec-2015 Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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OTHER QUALIFIED VERSIONS OF SN54ALS00A, SN54AS00, SN74ALS00A, SN74AS00 : • Catalog: SN74ALS00A, SN74AS00 • Military: SN54ALS00A, SN54AS00 NOTE: Qualified Version Definitions: • Catalog - TI's standard catalog product • Military - QML certified for Military and Defense Applications Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SN74ALS00ADBR SSOP SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) DB 14 2000 330.0 16.4 8.2 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 6.6 2.5 12.0 16.0 Q1 SN74ALS00ADR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74ALS00ANSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 SN74AS00DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74AS00NSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74ALS00ADBR SSOP DB 14 2000 367.0 367.0 38.0 SN74ALS00ADR SOIC D 14 2500 367.0 367.0 38.0 SN74ALS00ANSR SO NS 14 2000 367.0 367.0 38.0 SN74AS00DR SOIC D 14 2500 367.0 367.0 38.0 SN74AS00NSR SO NS 14 2000 367.0 367.0 38.0 Pack Materials-Page 2 MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. 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