Product Folder Sample & Buy Technical Documents Support & Community Tools & Software LM1086 SNVS039J – JUNE 2000 – REVISED APRIL 2015 LM1086 1.5-A Low Dropout Positive Regulators 1 Features 3 Description • The LM1086 is a regulator with a maximum dropout of 1.5 V at 1.5 A of load current. The device has the same pin-out as TI's industry standard LM317. 1 • • • • Available in 1.8-V, 2.5-V, 3.3-V, 5-V and Adjustable Versions Current Limiting and Thermal Protection Output Current 1.5 A Line Regulation 0.015% (Typical) Load Regulation 0.1% (Typical) 2 Applications • • • • • High-Efficiency Linear Regulators Battery Chargers Post Regulation for Switching Supplies Constant Current Regulators Microprocessor Supplies Two resistors are required to set the output voltage of the adjustable output voltage version of the LM1086. Fixed output voltage versions integrate the adjust resistors. The LM1086 circuit includes a zener trimmed bandgap reference, current limiting, and thermal shutdown. Refer to LM1084 for the 5-A version, and the LM1085 for the 3-A version. Device Information(1) PART NUMBER PACKAGE LM1086 BODY SIZE (NOM) WSON (8) 4 mm × 4 mm DDPAK/TO-263 (3) 10.18 mm × 8.41 mm TO-220 (3) 14.986 mm × 10.16 mm (1) For all available packages, see the orderable addendum at the end of the datasheet. Typical Application 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LM1086 SNVS039J – JUNE 2000 – REVISED APRIL 2015 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 4 4 4 5 5 7 Absolute Maximum Ratings ...................................... ESD Ratings ............................................................ Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Typical Characteristics .............................................. Detailed Description .............................................. 9 7.1 Overview ................................................................... 9 7.2 Functional Block Diagram ......................................... 9 7.3 Feature Description................................................. 10 7.4 Device Functional Modes........................................ 11 8 Application and Implementation ........................ 13 8.1 Application Information............................................ 13 8.2 Typical Applications ................................................ 13 9 Power Supply Recommendations...................... 18 10 Layout................................................................... 18 10.1 Layout Guidelines ................................................. 18 10.2 Layout Example .................................................... 18 10.3 Thermal Considerations ........................................ 19 11 Device and Documentation Support ................. 21 11.1 11.2 11.3 11.4 Development Support ........................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 21 21 21 21 12 Mechanical, Packaging, and Orderable Information ........................................................... 21 4 Revision History Changes from Revision I (August 2014) to Revision J • Added 8-pin WSON pinout drawing and associated device information................................................................................ 3 Changes from Revision H (May 2013) to Revision I • 2 Page Page Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section ................................................................................................. 4 Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM1086 LM1086 www.ti.com SNVS039J – JUNE 2000 – REVISED APRIL 2015 5 Pin Configuration and Functions 8-Pin WSON Package NGN Top View ADJ/GND 1 VIN 2 8 VOUT 7 VOUT VOUT N/C 3 6 VOUT N/C 4 5 N/C 3-Pin TO-220 Package NDE Top View 3-Pin DDPAK/TO-263 Package KTT Top View Pin Functions PIN NAME ADJ/GND VOUT VIN N/C NUMBER I/O DESCRIPTION KTT/NDE NGN 1 1 –– Adjust pin for the adjustable output voltage version. Ground pin for the fixed output voltage versions. 2, TAB 6, 7, 8, PAD O Output voltage pin for the regulator. 3 2 I Input voltage pin for the regulator. 3, 4, 5 –– No Connection Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM1086 3 LM1086 SNVS039J – JUNE 2000 – REVISED APRIL 2015 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) (2) MIN Maximum Input to Output Voltage Differential MAX UNIT LM1086-ADJ 29 V LM1086-1.8 27 V LM1086-2.5 27 V LM1086-3.3 27 V 25 V 150 °C 260, to 10 sec °C 150 °C LM1086-5.0 Power Dissipation (3) Internally Limited Junction Temperature (TJ) (4) Lead Temperature Storage temperature, Tstg (1) (2) (3) (4) –65 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications. Power dissipation is kept in a safe range by current limiting circuitry. Refer to Overload Recovery in Application and Implementation. The value θJA for the WSON package is specifically dependent on PCB trace area, trace material, and the number of thermal vias. For improved thermal resistance and power dissipation for the WSON package, refer to Application Note AN-1187 (literature number SNOA401). The maximum power dissipation is a function of TJ(MAX) , θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX)–T A)/θJA. All numbers apply for packages soldered directly into a PC board. Refer to Thermal Considerations 6.2 ESD Ratings V(ESD) (1) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) VALUE UNIT ±2000 V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions MIN MAX UNIT Control Section 0 125 °C Output Section 0 150 °C Control Section −40 125 °C Output Section −40 150 °C JUNCTION TEMPERATURE RANGE (TJ) "C" Grade "I" Grade (1) 4 (1) The maximum power dissipation is a function of TJ(MAX) , θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX)–T A)/θJA. All numbers apply for packages soldered directly into a PC board. Refer to Thermal Considerations. Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM1086 LM1086 www.ti.com SNVS039J – JUNE 2000 – REVISED APRIL 2015 6.4 Thermal Information LM1086 THERMAL METRIC (1) KTT NDE NGN 3 PINS 3 PINS 8 PINS RθJA Junction-to-ambient thermal resistance 40.8 23.0 35.9 RθJC(top) Junction-to-case (top) thermal resistance 42.3 16.1 24.2 RθJB Junction-to-board thermal resistance 23.3 4.5 13.2 ψJT Junction-to-top characterization parameter 10.2 2.4 0.2 ψJB Junction-to-board characterization parameter 22.3 2.5 13.3 RθJC(bot) Junction-to-case (bottom) thermal resistance: Control Section/Output Section 1.5/4.0 1.5/4.0 2.9 (1) UNIT °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 6.5 Electrical Characteristics Typicals and limits appearing in normal type apply for TJ = 25°C unless specified otherwise. PARAMETER VREF VOUT TEST CONDITIONS (1) (2) (3) (4) UNIT MIN TYP MAX MIN (1) TYP (2) 1.238 1.250 1.262 1.225 1.250 1.270 V Output Voltage (3) LM1086-1.8, IOUT = 0 mA, VIN = 5 V, 0 ≤ IOUT ≤ IFULL LOAD, 3.3 V ≤ VIN ≤ 18 V 1.782 1.8 1.818 1.764 1.8 1.836 V LM1086-2.5, IOUT = 0 mA, VIN = 5 V, 0 ≤ IOUT ≤ IFULL LOAD, 4.0 V ≤ VIN ≤ 18 V 2.475 2.50 2.525 2.450 2.50 2.55 V LM1086-3.3, IOUT = 0 mA, VIN = 5 V, 0 ≤ IOUT ≤ IFULL LOAD, 4.75 V ≤ VIN ≤ 18 V 3.267 3.300 3.333 3.235 3.300 3.365 V LM1086-5.0, IOUT = 0 mA, VIN = 8 V, 0 ≤ IOUT ≤ IFULL LOAD, 6.5 V ≤ VIN ≤ 20 V 4.950 5.000 5.050 4.900 5.000 5.100 V 0.015% 0.2% 0.035% 0.2% LM1086-1.8, IOUT = 0 mA, 3.3 V ≤ VIN ≤ 18 V 0.3 6 0.6 6 mV LM1086-2.5, IOUT = 0 mA, 4.0 V ≤ VIN ≤ 18 V 0.3 6 0.6 6 mV LM1086-3.3, IOUT = 0 mA, 4.5 V ≤ VIN ≤ 18 V 0.5 10 1.0 10 mV LM1086-5.0, IOUT = 0 mA, 6.5 V ≤ VIN ≤ 20 V 0.5 10 1.0 10 mV Reference Voltage LM1086-ADJ, IOUT = 10 mA, VIN − VOUT = 3 V, 10 mA ≤ IOUT ≤ IFULL LOAD, 1.5 V ≤ VIN − VOUT ≤ 15 V (3) LM1086-ADJ, IOUT =10 mA, 1.5 V ≤ (VIN - VOUT) ≤ 15 V ΔVOUT TJ over the entire range for operation (see Recommended Operating Conditions) TJ = 25°C Line Regulation (4) MAX (1) All limits are specified by testing or statistical analysis. Typical Values represent the most likely parametric norm. IFULL LOAD is defined in the current limit curves. The IFULL LOAD Curve defines current limit as a function of input-to-output voltage. Note that 15W power dissipation for the LM1086 is only achievable over a limited range of input-to-output voltage. Load and line regulation are measured at constant junction temperature, and are specified up to the maximum power dissipation of 15W. Power dissipation is determined by the input/output differential and the output current. Ensured maximum power dissipation will not be available over the full input/output range. Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM1086 5 LM1086 SNVS039J – JUNE 2000 – REVISED APRIL 2015 www.ti.com Electrical Characteristics (continued) Typicals and limits appearing in normal type apply for TJ = 25°C unless specified otherwise. PARAMETER TJ = 25°C TEST CONDITIONS MIN ΔVOUT Load Regulation (4) Dropout Voltage (5) TJ over the entire range for operation (see Recommended Operating Conditions) Current Limit Minimum Load Current (6) Quiescent Current Thermal Regulation TYP (2) MAX LM1086-ADJ, (VIN-V OUT ) = 3 V, 10 mA ≤ IOUT ≤ IFULL LOAD 0.1% 0.3% 0.2% 0.4% LM1086-1.8, 2.5, VIN = 5 V, 0 ≤ IOUT ≤ IFULL LOAD 3 12 6 20 mV LM1086-3.3, VIN = 5 V, 0 ≤ IOUT ≤ IFULL LOAD 3 15 7 25 mV LM1086-5.0, VIN = 8 V, 0 ≤ IOUT ≤ IFULL LOAD 5 20 10 35 mV 1.3 1.5 V LM1086-ADJ, 1.8, 2.5, 3.3, 5, ΔVREF, ΔVOUT = 1%, IOUT = 1.5A MAX (1) TYP LM1086-ADJ, VIN − VOUT = 5 V, VIN − VOUT = 25 V ILIMIT MIN (1) UNIT 1.50 2.7 0.05 0.15 LM1086-1.8,2.5, 3.3, VIN = 8 V 1.5 2.7 A LM1086-5.0, VIN = 10 V 1.5 2.7 A A LM1086-ADJ, VIN −VOUT = 25 V 5.0 10.0 mA LM1086-1.8, 2.5, VIN ≤ 18 V 5.0 10.0 mA LM1086-3.3, VIN ≤ 18 V 5.0 10.0 mA LM1086-5.0, VIN ≤ 20 V 5.0 10.0 mA TA = 25°C, 30ms Pulse 0.008 0.04 %/W fRIPPLE = 120 Hz, COUT = 25 µF Tantalum, IOUT = 1.5 A Ripple Rejection dB LM1086-ADJ, CADJ = 25 µF, (VIN− VO) = 3 V 60 75 LM1086-1.8, 2.5, VIN = 6 V 60 72 dB LM1086-3.3, VIN= 6.3 V 60 72 dB LM1086-5.0 VIN = 8 V 60 68 dB Adjust Pin Current LM1086 55 Adjust Pin Current Change 10 mA ≤ IOUT ≤ IFULL LOAD, 1.5 V ≤ (VIN−VOUT) ≤ 15 V 0.2 Temperature Stability (5) (6) 6 120 µA 5 µA 0.5% Long Term Stability TA = 125°C, 1000 Hrs RMS Noise (% of VOUT) 10 Hz ≤ f≤ 10 kHz 0.3% 1.0% 0.003% Dropout voltage is specified over the full output current range of the device. The minimum output current required to maintain regulation. Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM1086 LM1086 www.ti.com SNVS039J – JUNE 2000 – REVISED APRIL 2015 6.6 Typical Characteristics Figure 1. Dropout Voltage vs Output Current Figure 2. Short-Circuit Current vs Input/Output Difference Figure 3. Load Regulation vs Temperature Figure 4. Percent Change in Output Voltage vs Temperature Figure 5. Adjust Pin Current vs Temperature Figure 6. Maximum Power Dissipation vs Temperature Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM1086 7 LM1086 SNVS039J – JUNE 2000 – REVISED APRIL 2015 www.ti.com Typical Characteristics (continued) 8 Figure 7. Ripple Rejection vs Frequency (LM1086-ADJ) Figure 8. Ripple Rejection vs Output Current (LM1086ADJ) Figure 9. Ripple Rejection vs Frequency (LM1086-5) Figure 10. Ripple Rejection vs Output Current (LM1086-5) Figure 11. Line Transient Response Figure 12. Load Transient Response Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM1086 LM1086 www.ti.com SNVS039J – JUNE 2000 – REVISED APRIL 2015 7 Detailed Description 7.1 Overview A basic functional diagram for the LM1086-ADJ (excluding protection circuitry) is shown in Figure 13. The topology is basically that of the LM317 except for the pass transistor. Instead of a Darlingtion NPN with its two diode voltage drop, the LM1086 uses a single NPN. This results in a lower dropout voltage. The structure of the pass transistor is also known as a quasi LDO. The advantage of a quasi LDO over a PNP LDO is its inherently lower quiescent current. The LM1086 is specified to provide a minimum dropout voltage of 1.5V over temperature, at full load. Figure 13. Basic Functional Block Diagram 7.2 Functional Block Diagram Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM1086 9 LM1086 SNVS039J – JUNE 2000 – REVISED APRIL 2015 www.ti.com 7.3 Feature Description 7.3.1 Ripple Rejection Ripple rejection is a function of the open loop gain within the feed-back loop (refer to Figure 13 and Figure 16). The LM1086 exhibits 75dB of ripple rejection (typ.). When adjusted for voltages higher than VREF, the ripple rejection decreases as function of adjustment gain: (1+R1/R2) or VO/VREF. Therefore a 5-V adjustment decreases ripple rejection by a factor of four (−12dB); Output ripple increases as adjustment voltage increases. However, the adjustable version allows this degradation of ripple rejection to be compensated. The adjust terminal can be bypassed to ground with a capacitor (CADJ). The impedance of the CADJ should be equal to or less than R1 at the desired ripple frequency. This bypass capacitor prevents ripple from being amplified as the output voltage is increased. 1/(2π*fRIPPLE*CADJ) ≤ R1 (1) 7.3.2 Load Regulation The LM1086 regulates the voltage that appears between its output and ground pins, or between its output and adjust pins. In some cases, line resistances can introduce errors to the voltage across the load. To obtain the best load regulation, a few precautions are needed. Figure 14 shows a typical application using a fixed output regulator. Rt1 and Rt2 are the line resistances. VLOAD is less than the VOUT by the sum of the voltage drops along the line resistances. In this case, the load regulation seen at the RLOAD would be degraded from the data sheet specification. To improve this, the load should be tied directly to the output terminal on the positive side and directly tied to the ground terminal on the negative side. Figure 14. Typical Application Using Fixed Output Regulator When the adjustable regulator is used (Figure 15), the best performance is obtained with the positive side of the resistor R1 tied directly to the output terminal of the regulator rather than near the load. This eliminates line drops from appearing effectively in series with the reference and degrading regulation. For example, a 5V regulator with 0.05-Ω resistance between the regulator and load will have a load regulation due to line resistance of 0.05 Ω × IL. If R1 (=125 Ω) is connected near the load the effective line resistance will be 0.05 Ω (1 + R2/R1) or in this case, it is 4 times worse. In addition, the ground side of the resistor R2 can be returned near the ground of the load to provide remote ground sensing and improve load regulation. Figure 15. Best Load Regulation Using Adjustable Output Regulator 10 Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM1086 LM1086 www.ti.com SNVS039J – JUNE 2000 – REVISED APRIL 2015 Feature Description (continued) 7.3.3 Overload Recovery Overload recovery refers to regulator's ability to recover from a short circuited output. A key factor in the recovery process is the current limiting used to protect the output from drawing too much power. The current limiting circuit reduces the output current as the input to output differential increases. Refer to short circuit curve in the Typical Characteristics section. During normal start-up, the input to output differential is small since the output follows the input. But, if the output is shorted, then the recovery involves a large input to output differential. Sometimes during this condition the current limiting circuit is slow in recovering. If the limited current is too low to develop a voltage at the output, the voltage will stabilize at a lower level. Under these conditions it may be necessary to recycle the power of the regulator in order to get the smaller differential voltage and thus adequate start up conditions. Refer to Typical Characteristics section for the short circuit current vs. input differential voltage. 7.4 Device Functional Modes 7.4.1 Output Voltage The LM1086 adjustable version develops a 1.25-V reference voltage, (VREF), between the output and the adjust terminal. As shown in Figure 16, this voltage is applied across resistor R1 to generate a constant current I1. This constant current then flows through R2. The resulting voltage drop across R2 adds to the reference voltage to sets the desired output voltage. The current IADJ from the adjustment terminal introduces an output error . But since it is small (120uA max), it becomes negligible when R1 is in the 100 Ω range. For fixed voltage devices, R1 and R2 are integrated inside the devices. Figure 16. Basic Adjustable Regulator 7.4.2 Stability Consideration Stability consideration primarily concerns the phase response of the feedback loop. In order for stable operation, the loop must maintain negative feedback. The LM1086 requires a certain amount series resistance with capacitive loads. This series resistance introduces a zero within the loop to increase phase margin and thus increase stability. The equivalent series resistance (ESR) of solid tantalum or aluminum electrolytic capacitors is used to provide the appropriate zero (approximately 500 kHz). Aluminum electrolytics are less expensive than tantalums, but their ESR varies exponentially at cold temperatures; therefore requiring close examination when choosing the desired transient response over temperature. Tantalums are a convenient choice because their ESR varies less than 2:1 over temperature. The recommended load/decoupling capacitance is a 10 uF tantalum or a 50 uF aluminum. These values will assure stability for the majority of applications. The adjustable versions allows an additional capacitor to be used at the ADJ pin to increase ripple rejection. If this is done the output capacitor should be increased to 22uF for tantalum or to 150 uF for aluminum. Capacitors other than tantalum or aluminum can be used at the adjust pin and the input pin. A 10 uF capacitor is a reasonable value at the input. See Ripple Rejection section regarding the value for the adjust pin capacitor. Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM1086 11 LM1086 SNVS039J – JUNE 2000 – REVISED APRIL 2015 www.ti.com Device Functional Modes (continued) It is desirable to have large output capacitance for applications that entail large changes in load current (microprocessors for example). The higher the capacitance, the larger the available charge per demand. It is also desirable to provide low ESR to reduce the change in output voltage: ΔV = ΔI x ESR (2) It is common practice to use several tantalum and ceramic capacitors in parallel to reduce this change in the output voltage by reducing the overall ESR. Output capacitance can be increased indefinitely to improve transient response and stability. 7.4.3 Protection Diodes Under normal operation, the LM1086 regulator does not need any protection diode. With the adjustable device, the internal resistance between the adjustment and output terminals limits the current. No diode is needed to divert the current around the regulator even with a capacitor on the adjustment terminal. The adjust pin can take a transient signal of ±25 V with respect to the output voltage without damaging the device. When an output capacitor is connected to a regulator and the input is shorted, the output capacitor will discharge into the output of the regulator. The discharge current depends on the value of the capacitor, the output voltage of the regulator, and rate of decrease of VIN. In the LM1086 regulator, the internal diode between the output and input pins can withstand microsecond surge currents of 10 A to 20 A. With an extremely large output capacitor (≥1000 µf), and with input instantaneously shorted to ground, the regulator could be damaged. In this case, an external diode is recommended between the output and input pins to protect the regulator, shown in Figure 17. Figure 17. Regulator with Protection Diode 12 Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM1086 LM1086 www.ti.com SNVS039J – JUNE 2000 – REVISED APRIL 2015 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information The LM1086 is versatile in its applications, including uses in programmable output regulation and local on-card regulation. Or, by connecting a fixed resistor between the ADJUST and OUTPUT terminals, the LM1086 can function as a precision current regulator. An optional output capacitor can be added to improve transient response. The ADJUST terminal can be bypassed to achieve very high ripple-rejection ratios, which are difficult to achieve with standard three-terminal regulators. Please note, in the following applications, if ADJ is mentioned, it makes use of the adjustable version of the part, however, if GND is mentioned, it is the fixed voltage version of the part. 8.2 Typical Applications 8.2.1 1.2-V to 15-V Adjustable Regulator This part can be used as a simple low drop out regulator to enable a variety of output voltages needed for demanding applications. By using an adjustable R2 resistor a variety of output voltages can be made possible as shown in Figure 18 based on the LM1086-ADJ. Figure 18. 1.2-V to 15-V Adjustable Regulator 8.2.1.1 Design Requirements The device component count is very minimal, employing two resistors as part of a voltage divider circuit and an output capacitor for load regulation. 8.2.1.2 Detailed Design Procedure The voltage divider for this part is set based on the equation shown in Figure 18, where R1 is the upper feedback resistor R2 is the lower feedback resistor. Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM1086 13 LM1086 SNVS039J – JUNE 2000 – REVISED APRIL 2015 www.ti.com Typical Applications (continued) 8.2.1.3 Application Curve 8.2.2 Adjustable at 5 V The application shown in Figure 19 outlines a simple 5-V output application made possible by the LM1086-ADJ. This application can provide 1.5 A at high efficiencies and very low drop-out. Figure 19. Adjustable at 5 V 8.2.3 5-V Regulator with Shutdown A variation of the 5-V output regulator application with shutdown control is shown in Figure 20 based on the LM1086-ADJ. It uses a simple NPN transistor on the ADJ pin to block or sink the current on the ADJ pin. If the TTL logic is pulled high, the NPN transistor is activated and the part is disabled, outputting approximately 1.25 V. If the TTL logic is pulled low, the NPN transistor is unbiased and the regulator functions normally. Figure 20. 5-V Regulator with Shutdown 14 Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM1086 LM1086 www.ti.com SNVS039J – JUNE 2000 – REVISED APRIL 2015 Typical Applications (continued) 8.2.4 Battery Charger The LM1086-ADJ can be used as a battery charger to regulate the charging current required by the battery bank as shown in Figure 21. In this application the LM1086 acts as a constant voltage, constant current part by sensing the voltage potential across the battery and compensating it to the current voltage. To maintain this voltage, the regulator delivers the maximum charging current required to charge the battery. As the battery approaches the fully charged state, the potential drop across the sense resistor, RS reduces and the regulator throttles back the current to maintain the float voltage of the battery. Figure 21. Battery Charger 8.2.5 Adjustable Fixed Regulator A simple adjustable, fixed range output regulator can be made possible by placing a variable resistor on the ground of the device as shown in Figure 22 based on the fixed output voltage LM1086-5.0. The GND pin has a small quiescent current of 5 mA typical. Increasing the resistance on the GND pin increases the voltage potential across the resistor. This potential is then mirrored on to the output to increase the total output voltage by the potential drop across the GND resistor. Figure 22. Adjustable Fixed Regulator 8.2.6 Regulator With Reference A fixed output voltage version of the LM1086-5.0 can be employed to provide an output rail and a reference rail at the same time as shown in Figure 23. This simple application makes use of a reference diode, the LM136-5, to regulate the GND voltage to a fixed 5 V based on the quiescent current generated by the GND pin. This voltage is then added onto the output to generate a total of 10 V out. Figure 23. Regulator With Reference Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM1086 15 LM1086 SNVS039J – JUNE 2000 – REVISED APRIL 2015 www.ti.com Typical Applications (continued) 8.2.7 High Current Lamp Driver Protection A simple constant current source with protection can be designed by controlling the impedance between the lamp and ground. The LM1086-ADJ shown in Figure 24 makes use of an external TTL or CMOS input to drive the NPN transistor. This pulls the output of the regulator to a few tenths of a volt and puts the part into current limit. Releasing the logic will reduce the current flow across the lamp into the normal operating current thereby protecting the lamp during startup. Figure 24. High Current Lamp Driver Protection 8.2.8 Battery Backup Regulated Supply A regulated battery backup supply can be generated by using two fixed output voltage versions of the part as shown in Figure 25. The top regulator supplies the Line voltage during normal operation, however when the input is not available, the second regulator derives power from the battery backup and regulates it to 5 V based on the LM1086-5.0. The diodes prevent the rails from back feeding into the supply and batteries. Figure 25. Battery Backup Regulated Supply 16 Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM1086 LM1086 www.ti.com SNVS039J – JUNE 2000 – REVISED APRIL 2015 Typical Applications (continued) 8.2.9 Ripple Rejection Enhancement A very simple ripple rejection circuit is shown in Figure 26 using the LM1086-ADJ. The capacitor C1 smooths out the ripple on the output by cleaning up the feedback path and preventing excess noise from feeding back into the regulator. Please remember XC1 should be approximately equal to R1 at the ripple frequency. Figure 26. Ripple Rejection Enhancement 8.2.10 Automatic Light Control A common street light control or automatic light control circuit is designed in Figure 27 based on the LM1086ADJ. The photo transistor conducts in the presence of light and grounds the ADJ pin preventing the lamp from turning on. However, in the absence of light, the LM1086 regulates the voltage to 1.25 V between OUT and ADJ, ensuring the lamp remains on. Figure 27. Automatic Light Control 8.2.11 Remote Sensing Remote sensing is a method of compensating the output voltage to a very precise degree by sensing the output and feeding it back through the feedback. The circuit implementing this is shown in Figure 28 using the LM1086ADJ. The output of the regulator is fed into a voltage follower to avoid any loading effects and the output of the op-amp is injected into the top of the feedback resistor network. This has the effect of modulating the voltage to a precise degree without additional loading on the output. Figure 28. Remote Sensing Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM1086 17 LM1086 SNVS039J – JUNE 2000 – REVISED APRIL 2015 www.ti.com 9 Power Supply Recommendations The linear regulator input supply should be well regulated and kept at a voltage level such that the maximum input to output voltage differential allowed by the device is not exceeded. The minimum dropout voltage (VIN – VOUT) should be met with extra headroom when possible in order to keep the output well regulated. A 10 μF or higher capacitor should be placed at the input to bypass noise. 10 Layout 10.1 Layout Guidelines For the best overall performance, some layout guidelines should be followed. Place all circuit components on the same side of the circuit board and as near as practical to the respective linear regulator pins connections. Traces should be kept short and wide to reduce the amount of parasitic elements into the system. The actual width and thickness of traces will depend on the current carrying capability and heat dissipation required by the end system. An array of plated vias can be placed on the pad area underneath the TAB to conduct heat to any inner plane areas or to a bottom-side copper plane. 10.2 Layout Example Figure 29. Layout Example 18 Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM1086 LM1086 www.ti.com SNVS039J – JUNE 2000 – REVISED APRIL 2015 10.3 Thermal Considerations ICs heats up when in operation, and power consumption is one factor in how hot it gets. The other factor is how well the heat is dissipated. Heat dissipation is predictable by knowing the thermal resistance between the IC and ambient (θJA). Thermal resistance has units of temperature per power (C/W). The higher the thermal resistance, the hotter the IC. The LM1086 specifies the thermal resistance for each package as junction to case (θJC). In order to get the total resistance to ambient (θJA), two other thermal resistance must be added, one for case to heat-sink (θCH) and one for heatsink to ambient (θHA). The junction temperature can be predicted as follows: TJ = TA + PD (θJC + θCH + θHA) = TA + PD θJA where • • • TJ is junction temperature TA is ambient temperature PD is the power consumption of the device (3) Device power consumption is calculated as follows: IIN = IL + IG PD = (VIN−VOUT) IL + VINIG (4) (5) Figure 30 shows the voltages and currents which are present in the circuit. Figure 30. Power Dissipation Diagram Once the devices power is determined, the maximum allowable (θJA (max)) is calculated as: θJA (max) = TR(max)/PD = TJ(max) − TA(max)/PD The LM1086 has different temperature specifications for two different sections of the IC: the control section and the output section. The Thermal Information table shows the junction to case thermal resistances for each of these sections, while the maximum junction temperatures (TJ(max)) for each section is listed in the Absolute Maximum Ratings section of the datasheet. TJ(max) is 125°C for the control section, while TJ(max) is 150°C for the output section. θJA (max) should be calculated separately for each section as follows: θJA (max, CONTROL SECTION) = (125°C - TA(max))/PD θJA (max, OUTPUT SECTION) = (150°C - TA(max))/PD (6) (7) The required heat sink is determined by calculating its required thermal resistance (θHA (max)). θHA (max) = θJA (max) − (θJC + θCH) (θHA (max)) (θHA (θHA (8) should also be calculated twice as follows: = θJA (max, CONTROL SECTION) - (θJC (CONTROL SECTION) + θCH) (max)) = θJA(max, OUTPUT SECTION) - (θJC (OUTPUT SECTION) + θCH) (max)) (9) (10) If thermal compound is used, θCH can be estimated at 0.2 C/W. If the case is soldered to the heat sink, then a θCH can be estimated as 0 C/W. After, θHA (max) is calculated for each section, choose the lower of the two θHA appropriate heat sink. (max) values to determine the Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM1086 19 LM1086 SNVS039J – JUNE 2000 – REVISED APRIL 2015 www.ti.com Thermal Considerations (continued) If PC board copper is going to be used as a heat sink, then Figure 31 can be used to determine the appropriate area (size) of copper foil required. Figure 31. Heat Sink Thermal Resistance vs Area 20 Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM1086 LM1086 www.ti.com SNVS039J – JUNE 2000 – REVISED APRIL 2015 11 Device and Documentation Support 11.1 Development Support For additional information, see Texas Instruments' E2E community resources at http://e2e.ti.com. 11.2 Trademarks All trademarks are the property of their respective owners. 11.3 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 11.4 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated Product Folder Links: LM1086 21 PACKAGE OPTION ADDENDUM www.ti.com 19-Jul-2016 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LM1086-ADJ MDC ACTIVE DIESALE Y 0 130 Green (RoHS & no Sb/Br) Call TI Level-1-NA-UNLIM -40 to 85 LM1086CS-2.5/NOPB ACTIVE DDPAK/ TO-263 KTT 3 45 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR -40 to 125 LM1086CS-3.3/NOPB ACTIVE DDPAK/ TO-263 KTT 3 45 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR LM1086CS-5.0/NOPB ACTIVE DDPAK/ TO-263 KTT 3 45 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR LM1086CS-ADJ NRND DDPAK/ TO-263 KTT 3 45 TBD Call TI Call TI LM1086 CS-ADJ LM1086CS-ADJ/NOPB ACTIVE DDPAK/ TO-263 KTT 3 45 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR LM1086 CS-ADJ LM1086CSX-2.5/NOPB ACTIVE DDPAK/ TO-263 KTT 3 500 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR LM1086CSX-3.3/NOPB ACTIVE DDPAK/ TO-263 KTT 3 500 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR LM1086 CS-3.3 LM1086CSX-ADJ/NOPB ACTIVE DDPAK/ TO-263 KTT 3 500 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR LM1086 CS-ADJ LM1086CT-3.3/NOPB ACTIVE TO-220 NDE 3 45 Green (RoHS & no Sb/Br) CU SN Level-1-NA-UNLIM LM1086 CT-3.3 LM1086CT-5.0 NRND TO-220 NDE 3 TBD Call TI Call TI -40 to 125 LM1086 CT-5.0 LM1086CT-5.0/NOPB ACTIVE TO-220 NDE 3 45 Green (RoHS & no Sb/Br) CU SN Level-1-NA-UNLIM -40 to 125 LM1086 CT-5.0 LM1086CT-ADJ/NOPB ACTIVE TO-220 NDE 3 45 Green (RoHS & no Sb/Br) CU SN Level-1-NA-UNLIM LM1086ILD-3.3/NOPB ACTIVE WSON NGN 8 1000 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR LM1086IS-1.8/NOPB ACTIVE DDPAK/ TO-263 KTT 3 45 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR LM1086IS-3.3 NRND DDPAK/ TO-263 KTT 3 45 TBD Call TI Call TI -40 to 125 LM1086 IS-3.3 LM1086IS-3.3/NOPB ACTIVE DDPAK/ TO-263 KTT 3 45 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR -40 to 125 LM1086 IS-3.3 Addendum-Page 1 LM1086 CS-2.5 LM1086 CS-3.3 -40 to 125 -40 to 125 LM1086 CS-5.0 LM1086 CS-2.5 LM1086 CT-ADJ -40 to 125 1086I33 LM1086 IS-1.8 Samples PACKAGE OPTION ADDENDUM www.ti.com 19-Jul-2016 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LM1086IS-5.0 ACTIVE DDPAK/ TO-263 KTT 3 45 TBD Call TI Call TI LM1086 IS-5.0 LM1086IS-5.0/NOPB ACTIVE DDPAK/ TO-263 KTT 3 45 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR -40 to 125 LM1086 IS-5.0 LM1086IS-ADJ/NOPB ACTIVE DDPAK/ TO-263 KTT 3 45 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR -40 to 125 LM1086 IS-ADJ LM1086ISX-1.8/NOPB ACTIVE DDPAK/ TO-263 KTT 3 500 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR LM1086ISX-3.3/NOPB ACTIVE DDPAK/ TO-263 KTT 3 500 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR -40 to 125 LM1086 IS-3.3 LM1086ISX-5.0/NOPB ACTIVE DDPAK/ TO-263 KTT 3 500 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR -40 to 125 LM1086 IS-5.0 LM1086ISX-ADJ/NOPB ACTIVE DDPAK/ TO-263 KTT 3 500 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR -40 to 125 LM1086 IS-ADJ LM1086IT-3.3/NOPB ACTIVE TO-220 NDE 3 45 Green (RoHS & no Sb/Br) CU SN Level-1-NA-UNLIM -40 to 125 LM1086 IT-3.3 LM1086IT-5.0/NOPB ACTIVE TO-220 NDE 3 45 Green (RoHS & no Sb/Br) CU SN Level-1-NA-UNLIM -40 to 125 LM1086 IT-5.0 LM1086IT-ADJ/NOPB ACTIVE TO-220 NDE 3 45 Green (RoHS & no Sb/Br) CU SN Level-1-NA-UNLIM -40 to 125 LM1086 IT-ADJ LM1086 IS-1.8 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com 19-Jul-2016 (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 23-Apr-2015 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM1086CSX-2.5/NOPB DDPAK/ TO-263 KTT 3 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 LM1086CSX-3.3/NOPB DDPAK/ TO-263 KTT 3 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 LM1086CSX-ADJ/NOPB DDPAK/ TO-263 KTT 3 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 LM1086ILD-3.3/NOPB WSON NGN 8 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 LM1086ISX-1.8/NOPB DDPAK/ TO-263 KTT 3 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 LM1086ISX-3.3/NOPB DDPAK/ TO-263 KTT 3 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 LM1086ISX-5.0/NOPB DDPAK/ TO-263 KTT 3 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 LM1086ISX-ADJ/NOPB DDPAK/ TO-263 KTT 3 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 23-Apr-2015 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM1086CSX-2.5/NOPB DDPAK/TO-263 KTT 3 500 367.0 367.0 45.0 LM1086CSX-3.3/NOPB DDPAK/TO-263 KTT 3 500 367.0 367.0 45.0 LM1086CSX-ADJ/NOPB DDPAK/TO-263 KTT 3 500 367.0 367.0 45.0 LM1086ILD-3.3/NOPB WSON NGN 8 1000 213.0 191.0 55.0 LM1086ISX-1.8/NOPB DDPAK/TO-263 KTT 3 500 367.0 367.0 45.0 LM1086ISX-3.3/NOPB DDPAK/TO-263 KTT 3 500 367.0 367.0 45.0 LM1086ISX-5.0/NOPB DDPAK/TO-263 KTT 3 500 367.0 367.0 45.0 LM1086ISX-ADJ/NOPB DDPAK/TO-263 KTT 3 500 367.0 367.0 45.0 Pack Materials-Page 2 MECHANICAL DATA NDE0003B www.ti.com MECHANICAL DATA NGN0008A LDC08A (Rev B) www.ti.com MECHANICAL DATA KTT0003B TS3B (Rev F) BOTTOM SIDE OF PACKAGE www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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