CLARE ITC100P Integrated telecom circuit Datasheet

ITC100P
Integrated Telecom Circuits
Hook Switch Breakdown Voltage
Bridge Rectifier Reverse
Voltage
Darlington Collector Current
ITC100P
350
Units
V
350
120
V
mA
Features
• Small 16 Pin SOIC Package (PCMCIA Compatible)
• Board Space and Cost Savings
• No Moving Parts
• 3750VRMS Input/Output Isolation
• FCC Compatible Part 68
• Photodarlington Hook Switch
• Full-Wave Bridge Rectifier
• Darlington Transistor for Electronic Inductor “Dry”
Circuits
• Half Wave Current Detector for Ring Signal or Loop
Current Detect
• JEDEC Standard Pin Out
Applications
• Data/Fax Modem
• Voice Mail Systems
• Telephone Sets
• Computer Telephony Integration
• Set Top Box Modems
Description
The Integrated Telecom Circuit combines a high
voltage optically isolated photodarlington, bridge
rectifier, Darlington transistor and optocoupler into one
16 pin SOIC package, consolidating designs and
reducing component count in telecom applications.
The ITC100’s optocoupler provides for half wave
detection of ring signals.
Approvals
• UL Recognized
• EN 60950
Ordering Information
Part #
Description
ITC100P
ITC100PTR
16 Pin SOIC (50/Tube)
16 Pin SOIC (1000/Reel)
Pin Configuration
NC 1
16
Photodarlington LED 2
Anode
Photodarlington LED 3
Cathode
15
Photodarlington Emitter
13 Bridge Output (-)
NC 5
12 Bridge Input
Collector -Phototransistor 7
Emitter -Phototransistor 8
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14 Darlington Base
NC 4
NC 6
DS-ITC100P-R1.2
Darlington Emitter
11 Bridge Input
10 Phototransistor LED Anode
9
Phototransistor LED
Cathode
1
ITC100P
Absolute Maximum Ratings (@ 25˚ C)
Parameter
Total Package Dissipation
Isolation Voltage
Input to Output
Operational Temperature
Storage Temperature
Soldering Temperature
(10 Seconds Max.)
1
Min
-
Typ Max Units
11
W
3750
-40
-40
-
-
Absolute Maximum Ratings are stress ratings. Stresses in
excess of these ratings can cause permanent damage to
the device. Functional operation of the device at conditions
beyond those indicated in the operational sections of this
data sheet is not implied.
VRMS
+85
°C
+125 °C
+220 °C
Above 25˚ derate linerity 8.33mw/˚C
Total Power Dissipation (PD):
PD=PHOOKSWITCH + PBRIDGE + PDARLINGTON + PLED
PD=(RDS(on)) (I2L) + 2(VF)(IL) + (VCE)(IL) + (VLED)(IF)
WHERE:
RDS(on) = Maximum realy on resistance
IL
= Maximum loop current
VF
= Maximum diode forward voltage
VCE
= Maximum voltage collector to emitter
VLED
= Maximum LED forward voltage
IF
= Maximum LED current
Electrical Characteristics
Parameter
Photodarlington Portion
Collector-Emitter Breakdown voltage
Collector Dark Current
Collector Emitter Saturation Voltage
Current Gain
LED Input control Current
LED input Voltage Drop
LED Reverse Input Voltage
LED Reverse Input Current
Phototransistor Portion
Phototransitor Blocking Voltage
Phototransistor Dark Current
Saturation Voltage
Current Transfer Ratio
LED Input control Current
LED input Voltage Drop
LED Input Current (Detector must be off)
Bridge Rectifier Portion
Reverse Voltage
Forward Voltage Drop
2
Condition
Symbol
Min
Typ
Max
Units
IC = 100uA
VCE = 200V
IC = 100mA
IB = 150uA
Hfe
IF = 5mA
IR = 5V
BVCEO
ICEO
VCE(S)
350
-
-
100
1.2
V
nA
V
IC= 40mA VCE =2V
IF
VF
VR
IR
2500
5
0.9
-
1.2
-
40000
50
1.4
5
10
mA
V
V
mA
IC = 10uA
VCC = 5V
IF = 0mA
IC = 2mA
IF = 16mA
VCE = 0.5V
IF = 6mA
VCE = 0.5V
IC = 2mA
IF = 5mA
VCE = 5V
IC = 10uA
BVCEO
ICEO
20
-
50
50
500
V
mA
VSAT
-
0.3
0.5
V
CTR
33
400
-
%
IF
6
2
100
mA
VF
IF
0.9
5
1.2
25
1.4
-
V
uA
IFD = 120mA
VRD
VFD
-
-
350
1.1
V
V
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Rev. 1.2
ITC100P
Electrical Characteristics
Parameter
Reverse Leakage Current
Forward Current Continuous
Forward Current Peak
Darlington Portion
Collector Emitter Voltage
Collector Current Continous
Off – State Collector Emitter
Leakage Current
DC Gain Current
Saturation Voltage
Total Harmonic Distortion
Rev. 1.2
Condition
TJ= 25oC
VR = 350V
TJ= 85oC
T= 10mS
IC=10mA DC
IB=0
VC=3.5V
VCE=10V
IB=0mA
VCE=5VDC
IC=100mA
IC=120mA
F0=300Hz @
-10dBm
IC=40mA
Symbol
IRD
Min
-
Typ
-
Max
10
Units
uA
IFD
IFD
-
-
50
140
0.5
uA
mA
A
VCEO
20
-
-
V
IC
ICEX
-
-
120
1
mA
uA
hFE
300
-
-
-
VCE(SAT)
-
-
-
1.5
-80
V
dB
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3
MECHANICAL DIMENSIONS
10.160 0.381
(0.400 0.015)
16 Pin SOIC (“P” Suffix)
PC Board Pattern
(Top View)
1.270 TYP.
(0.050 TYP.)
1.270
(0.050)
1.981 TYP.
(0.078 TYP.)
2.108 MAX.
(0.083 MAX.)
7.493
(0.295
1.016 TYP.
(0.040 TYP.)
0.254
(0.010
0.127
0.005)
10.363 0.127
(0.408 0.005)
9.728 0.051
(0.383 0.002)
0.0127
0.0005)
1.193
(0.047)
0.406 TYP.
(0.016) TYP.
0.787
(0.031)
8.890 TYP.
(0.350 TYP.)
Tape and Reel Packaging for 16 Pin SOIC Package
330.2 DIA.
(13.00 DIA.)
Top Cover
Tape Thickness
0.102 MAX.
(0.004 MAX.)
1
16
16.30 MAX.
(0.642 MAX.)
10.70
(0.421)
Top Cover
Tape
12.00
(0.172)
Embossed Carrier
Embossment
2.70
(0.106)
10.90
(0.430)
User Direction of Feed
4.90
(0.193)
Dimensions
mm
(inches)
For additional information please visit our website at: www.clare.com
Clare, Inc. makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions
at any time without notice. Neither circuit patent licenses nor indemnity are expressed or implied. Except as set forth in Clare’s Standard Terms and Conditions of Sale, Clare, Inc. assumes no liability whatsoever, and
disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right.
The products described in this document are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support
or sustain life, or where malfunction of Clare’s product may result in direct physical harm, injury, or death to a person or severe property or environmental damage. Clare, Inc. reserves the right to discontinue or make
changes to its products at any time without notice.
Specification: DS-ITC100P-R1.2
©Copyright 2003, Clare, Inc.
OptoMOS® is a registered trademark of Clare, Inc.
All rights reserved. Printed in USA.
2/24/03
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