Revised March 2000 DM74AS374 Octal D-Type Edge-Triggered Flip-Flops with 3-STATE Outputs General Description Features These 8-bit registers feature totem-pole 3-STATE outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. The high-impedance state and increased high-logic-level drive provide these registers with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pull-up components. They are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. ■ Switching specifications at 50 pF The eight flip-flops of the AS374 are edge-triggered D-type flip-flops. On the positive transition of the clock, the Q outputs will be set to the logic states that were set up at the D inputs. ■ Switching specifications guaranteed over full temperature and VCC range ■ Advanced oxide-isolated, ion-implanted Schottky TTL process ■ Functionally and pin-for-pin compatible with LS and ALS TTL counterparts ■ Improved AC performance over LS and ALS TTL counterparts ■ 3-STATE buffer-type outputs drive bus lines directly A buffered output control input can be used to place the eight outputs in either a normal logic state (HIGH or LOW logic levels) or a high impedance state. In the high-impedance state the outputs neither load nor drive the bus lines significantly. The output control does not affect the internal operation of the flip-flops. That is, the old data can be retained or new data can be entered even while the outputs are off. Ordering Code: Order Number Package Number DM74AS374WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Description DM74AS374N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram © 2000 Fairchild Semiconductor Corporation DS006310 www.fairchildsemi.com DM74AS374 Octal D-Type Edge-Triggered Flip-Flops with 3-STATE Outputs October 1986 DM74AS374 Function Table Output Logic Diagram Clock D L ↑ H L ↑ L L L L X Q0 H X X Z Control Output Q H L = LOW State H = HIGH State X = Don’t Care ↑ = Positive Edge Transition Z = High Impedance State Q0 = Previous Condition of Q www.fairchildsemi.com 2 DM74AS374 Absolute Maximum Ratings(Note 1) Supply Voltage 7V Input Voltage 7V Voltage Applied to Disabled Output 5.5V 0°C to +70°C Operating Free Air Temperature Range −65°C to +150°C Storage Temperature Range Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Typical θJA N Package 52.5°C/W M Package 70.5°C/W Recommended Operating Conditions Symbol Parameter Min Nom Max Units 4.5 5 5.5 V Low Level Input Voltage 0.8 V VCC Supply Voltage VIH High Level Input Voltage VIL 2 V IOH High Level Output Current −15 mA IOL Low Level Output Current 48 mA fCLK Clock Frequency 125 MHz tW Width of Clock Pulse 0 HIGH 4 LOW 3 ns tSU Data Setup Time (Note 2) 2↑ 0 tH Data Hold Time (Note 2) 3↑ 0 TA Operating Free Air Temperature 0 ns ns °C 70 Note 2: The (↑) arrow indicates the positive edge of the Clock is used for reference. Electrical Characteristics over recommended operating free air temperature range. All typical values are measured at VCC = 5V, TA = 25°C. Symbol Parameter Conditions VIK Input Clamp Voltage VCC = 4.5V, II = −18 mA VOH HIGH Level VCC = 4.5V, IOH = Max Output Voltage IOH = −2 mA, VCC = 4.5V to 5.5V VOL LOW Level Output Voltage Min 2.4 Input Current @ Max Input Voltage VCC = 5.5V, VIH = 7V Max Units −1.2 V 3.2 V VCC − 2 VCC = 4.5V, IOL = Max II Typ 0.35 0.5 V 0.1 mA IIH HIGH Level Input Current VCC = 5.5V, VIH = 2.7V 20 µA IIL LOW Level Input Current VCC = 5.5V, VIL = 0.4V −0.5 mA IO Output Drive Current VCC = 5.5V, VO = 2.25V −112 mA IOZH OFF-State Output Current, VCC = 5.5V, VO = 2.7V 50 µA VCC = 5.5V, VO = 0.4V −50 µA −30 HIGH Level Voltage Applied IOZL OFF-State Output Current, LOW Level Voltage Applied ICC Supply Current VCC = 5.5V Outputs HIGH 77 Outputs Open Outputs LOW 84 128 Outputs Disabled 84 128 3 120 mA www.fairchildsemi.com DM74AS374 Switching Characteristics over recommended operating free air temperature range Symbol Parameter Conditions fMAX Maximum Clock Frequency VCC = 4.5V to 5.5V tPLH Propagation Delay Time RL = 500Ω LOW-to-HIGH Level Output CL = 50 pF tPHL From Propagation Delay Time Output Enable Time to HIGH Level Output tPZL Output Enable Time to LOW Level Output tPHZ Output Disable Time from HIGH Level Output tPLZ Output Disable Time from LOW Level Output www.fairchildsemi.com Min Max 125 HIGH-to-LOW Level Output tPZH To 4 Units MHz Clock Any Q 3 8 ns Clock Any Q 4 9 ns Output Control Any Q 2 6 ns Output Control Any Q 3 10 ns Output Control Any Q 2 6 ns Output Control Any Q 2 6 ns DM74AS374 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B 5 www.fairchildsemi.com DM74AS374 Octal D-Type Edge-Triggered Flip-Flops with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 6