CAT5133 16 Volt Digitally Programmable Potentiometer (DPPTM) with 128 Taps and an Increment Decrement Interface FEATURES DESCRIPTION Single linear DPP with 128 taps The CAT5133 is a high voltage Digital Programmable Potentiometer (DPP) integrated with E2PROM memory and control logic to operate in a similar manor to a mechanical potentiometer. The DPP consists of a series of resistive elements connected between two externally accessible end points. The tap points between each resistive element are connected to the wiper outputs with CMOS switches. A 7-bit wiper control register (WCR) independently controls the wiper tap switches for the DPP. Associated with the control register is a 7-bit nonvolatile memory data register (DR) used for storing the wiper settings. Changing the value of the wiper control register or storing that value into the nonvolatile memory is performed via a 3-input Increment-Decrement interface. End-to-end resistance of 10kΩ, 50kΩ or 100kΩ 2-wire (I2C-like) interface Fast Up/Down wiper control mode Non-volatile wiper setting storage Automatic wiper setting recall at power-up Digital Supply range (VCC): 2.7V to 5.5V Analog Supply range (V+): +8V to +16V Low Standby Current: 15μA 100 Year wiper setting memory Industrial Temperature range: -40ºC to +85ºC RoHS-compliant 10-pin MSOP package The CAT5133 comes with 2 voltage supply inputs: VCC (digital supply voltage) input and V+ (analog bias supply) input. Providing separate Digital and Analog inputs allow the potentiometer terminals to be as much as 10 volts above VCC and 16 volts above ground. APPLICATION LCD screen Adjustment Volume Control Mechanical potentiometer replacement The CAT5133 can be used as a potentiometer or as a two terminal, variable resistor. It is designed for circuit level or system level adjustments in a wide variety of applications. Gain adjustment Line impedance matching VCOM settings adjustment On power-up, the contents of the nonvolatile data register (DR) are transferred to the wiper control register (WCR) and the wiper is positioned to that location. The CAT5133 is shipped with the DR programmed to position 64. For Ordering Information details, see page 9. BLOCK DIAGRAM © 2006 Catalyst Semiconductor, Inc. Characteristics subject to change without notice 1 Doc. No. 2125 Rev. B CAT5133 PIN CONFIGURATION PIN DESCRIPTIONS USOP Package (GZ) Pin Name Function 1 U/D̄ Up/Down Data Input – Determines the direction of movement of the wiper 2 3 4 5 6 7 8 9 GND VCC ¯¯¯ CS N/C RH RW RL V+ Ground Logic Supply Voltage (2.7V to 5.5V) Chip Select – The chip is selected when the input is low. No Connect High Reference Terminal for the Potentiometer Wiper Terminal for the Potentiometer Low Reference Terminal for the Potentiometer Analog Bias Voltage Input (+8.0V to +16.0V) 10 ¯¯¯ INC Increment Input – Moves the wiper in the direction determined by the Up/Down input on each negative edge DEVICE OPERATION wiper (depending on the state of the U/D̄ input and 7-bit counter). The wiper, when at either fixed terminal, acts like its mechanical equivalent and does not move beyond the last position. The value of the counter is stored in nonvolatile memory whenever ¯¯¯ CS transitions HIGH while the INC ¯¯¯ input is also HIGH. When the CAT5133 is powered-down; the last stored wiper counter position is maintained in the nonvolatile memory. When power is restored, the contents of the memory are recalled and the counter is set to the value stored. The CAT5133 operates like a digitally controlled potentiometer with RH and RL equivalent to the high and low terminals and RW equivalent to the mechanical potentiometer’s wiper. There are 128 available tap positions including the resistor end points, RH and RL. There are 127 resistor elements connected in series between the RH and RL terminals. The wiper terminal is connected to one of the 128 taps and controlled by three inputs, INC ¯¯¯, U/D̄ and ¯¯¯. CS These inputs control a 7-bit up/down counter whose output is decoded to select the wiper position. The selected wiper position can be stored in nonvolatile memory using the INC ¯¯¯ and ¯¯¯ CS inputs. With INC ¯¯¯ set low, the CAT5133 may be de-selected and powered down without storing the current wiper position in nonvolatile memory. This allows the system to always power up to a preset value stored in nonvolatile memory. With ¯¯¯ CS set LOW the CAT5133 is selected and will respond to the U/D̄ and INC ¯¯¯ inputs. HIGH to LOW transitions on INC ¯¯¯ will increment or decrement the OPERATION MODES ¯¯¯ INC High to Low High to Low High Low X Doc. No. 2125 Rev. B ¯¯¯ CS Low Low Low to High Low to High High U/D̄ High Low X X X Operation Wiper toward H Wiper toward L Store Wiper Position No Store, Return to Standby Standby 2 © 2006 Catalyst Semiconductor, Inc. Characteristics subject to change without notice CAT5133 POWER-ON AND POTENTIOMETER CHARACTERISTICS The CAT5133 is a 128-position, digital controlled potentiometer. When applying power to the CAT5133, VCC must be supplied prior to or simultaneously with V+. At the same time, the signals on RH, RW and RL terminals should not exceed V+. If V+ is applied before VCC, the electronic switches of the DPP are powered in the absence of the switch control signals, that could result in multiple switches being turned on. This causes unexpected wiper settings and possible current overload of the potentiometer. The end-to-end nominal resistance of the potentiometer has 128 contact points linearly distributed across the total resistor. Each of these contact points is addressed by the 7 bit wiper register which is decoded to select one of these 128 contact points. Each contact point generates a linear resistive value between the 0 position and the 127 position. These values can be determined by dividing the end-to-end value of the potentiometer by 127. The 10kΩ potentiometer has a resistance of ~79Ω between each wiper position. However in addition to the ~79Ω for each resistive segment of the potentiometer, a wiper resistance offset must be considered. Table 8 shows the effect of this value and how it would appear on the wiper terminal. When VCC is applied, the device turns on at the midpoint wiper location (64) until the wiper register can be loaded with the nonvolatile memory location previously stored in the device. After the nonvolatile memory data is loaded into the wiper register the wiper location will change to the previously stored wiper position. This offset will appear in each of the CAT5133 end-toend resistance values in the same way as the 10kΩ example. However resistance between each wiper position for the 50kΩ version will be ~395Ω and for the100kΩ version will be ~790Ω. At power-down, it is recommended to turn-off first the signals on RH, RW and RL, followed by V+ and, after that, VCC, in order to avoid unexpected transitions of the wiper and uncontrolled current overload of the potentiometer. Potentiometer Resistance and Wiper Resistance Offset Effects Position 0 01 63 127 Typical RW to RL Resistance for 10kΩ DPP 70Ω or 149Ω or 5,047Ω or 10,070Ω or Position 0Ω + 70Ω 79Ω + 70Ω 4,977Ω + 70Ω 10,000Ω + 70Ω 00 64 126 127 Typical RW to RH Resistance for 10kΩ DPP 10,070Ω or 5,047Ω or 149Ω or 70Ω or 10,000Ω + 70Ω 4,977Ω + 70Ω 79Ω + 70Ω 0Ω + 70Ω ABSOLUTE MAXIMUM RATINGS(1) Parameters Temperature Under Bias Storage Temperature Voltage on any U/D̄, INC ¯¯¯,& ¯¯¯ CS Pins with Respect to VCC(2) Voltage on RH, RL, & RW Pins with Respect to VCC VCC with Respect to Ground V+ with respect to Ground Wiper Current Lead Soldering temperature (10 seconds) Ratings -55 to +125 -65 to +150 -0.3 to +VCC+0.3 V+ -0.3 to +6.0 -0.3 to +16.5 ±6 +300 Units °C °C V V V V mA °C Notes: (1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability. (2) Latch-up protection is provided for stresses up to 100mA on the digital from -0.3V to VCC +0.3V. © 2006 Catalyst Semiconductor, Inc. Characteristics subject to change without notice 3 Doc. No. 2125 Rev. B CAT5133 RECOMMENDED OPERATING CONDITIONS VCC = +2.7V to +5.5V V+ = +8.0V to +16.0V Operating Temperature Range: -40°C to +85°C POTENTIOMETER CHARACTERISTICS (Over recommended operating conditions unless otherwise stated.) Symbol RPOT RPOT RPOT RTOL IW RW VTERM RES ALIN RLIN TCRPOT TCRatio CH/CL/C fc Parameter Test Conditions Potentiometer Resistance (10kΩ) Potentiometer Resistance (50kΩ)(7) Potentiometer Resistance (100kΩ)(7) Min Limits Typ 10 50 100 Potentiometer Resistance Tolerance Power Rating Wiper Current Wiper Resistance Voltage on RW , RH or RL 25ºC IW = +1mA @ V+ = 12V IW = +1mA @ V+ = 8V GND = 0V; V+ = 8V to 16V Resolution Absolute Linearity(2) VW(n)(actual) - VW(n)(expected)(5), (6) (3) Relative Linearity VW(n+1) - [VW(n) +LSB](5), (6) (1) Temperature Coefficient of RPOT Ratiometric Temperature Coefficient (1) (1) Potentiometer Capacitances Frequency Response RPOT = 50kΩ 70 110 GND Max Units kΩ kΩ kΩ ±20 % 50 ±3 150 200 V+ mW mA Ω Ω V 0.78 ±1 ±0.5 ±300 30 10/10/25 0.4 % LSB(4) LSB(4) ppm/°C ppm/°C pF MHz Notes: (1) (2) (3) (4) (5) (6) (7) This parameter is tested initially and after a design or process change that affects the parameter. Absolute linearity is utilized to determine actual wiper voltage versus expected voltage as determined by wiper position when used as a potentiometer. Relative linearity is utilized to determine the actual change in voltage between two successive tap positions when used as a potentiometer. LSB = (RHM - RLM)/127; where RHM and RLM are the highest and lowest measured values on the wiper terminal. n = 1, 2, ..., 127. + V @ RH; 0V @ RL; VW measured @ RW, with no load. Contact factory for availability on this version of the CAT5133. Doc. No. 2125 Rev. B 4 © 2006 Catalyst Semiconductor, Inc. Characteristics subject to change without notice CAT5133 DC ELECTRICAL CHARACTERISTICS VCC = +2.7V to +6.0V, unless otherwise specified. Symbol ICC1 ICC2 ISB(VCC) ISB(V+) ILI ILO VIL VIH VOL1 Parameter Power Supply Current Power supply Current Nonvolatile WRITE Standby Current (VCC = 5V) V+ Standby Current Input Leakage Current Output Leakage Current Input Low Voltage Input High Voltage Output Low Voltage (VCC = 3.0V) Test Conditions VCC = 5.5V, fINC = 1MHz, Input = GND VCC = 5.5V, fINC = 1MHz, Input = GND VIN = GND or VCC, INC = VCC VCC = 5V, V+ = 16V VIN = GND to VCC VOUT = GND to VCC IOL = 3 mA Min Max 1 3.0 5 10 10 10 -1 VCC x 0.3 VCC x 0.7 VCC + 1.0 0.4 Units mA mA µA µA µA µA V V V CAPACITANCE TA = 25ºC, f = 1.0MHz, VCC = 5.0V Symbol CI/O CIN Parameter Input/Output Capacitance (SDA) Input Capacitance (A0, A1, SCL) Test Conditions VI/O = 0V(1) VIN = 0V(1) Min Max 8 6 Units pF pF Min Max 1 1 Units ms ms Min 5 5 Max 10 10 Units μs μs Min Max 5 Units ms POWER UP TIMING(1)(2) Symbol tPUR tPUW Parameter Power-up to Read Operation Power-up to Write Operation XDCP TIMING Symbol tWRPO tWRL Parameter Wiper Response Time After Power Supply Stable Wiper Response Time After Instruction Issued WRITE CYCLE LIMITS Symbol tWR Parameter Write Cycle Time Notes: (1) This parameter is tested initially and after a design or process change that affects the parameter. (2) tPUR and tPUW are the delays required from the time VCC is stable until the specified operation can be initiated. © 2006 Catalyst Semiconductor, Inc. Characteristics subject to change without notice 5 Doc. No. 2125 Rev. B CAT5133 RELIABILITY CHARACTERISTICS (Over recommended operating conditions unless otherwise stated.) Symbol NEND(1) TDR(1) Parameter Endurance Data Retention Reference Test Method MIL-STD-883, Test Method 1033 MIL-STD-883, Test Method 1008 Min 100,000 100 Max Units Cycles/Byte Years Typ(1) Max 1 5 5 500 1 10 Units ns ns ns ns ns μs ns ms μs μs μs ms ms Notes: (1) This parameter is tested initially and after a design or process change that affects the parameter. A.C. OPERATIONG CHARACTERISTICS VCC = +2.5V to +6.0V, VH = VCC, VL = 0V, unless otherwise specified. Symbol tCI tDI tID tIL tIH tIC tCPH tCPH tIW tCYC tR, tF(2) tPU(2) tWR Parameter ¯¯¯ CS to INC Setup U/D to ¯¯¯¯ INC Setup U/D to ¯¯¯¯ INC Hold ¯¯¯¯ INC LOW Period ¯¯¯¯ INC HIGH Period ¯¯¯¯ INC Inactive to ¯¯¯ CS Inactive ¯¯¯ CS Deselect Time (NO STORE) ¯¯¯ CS Deselect Time (STORE) ¯¯¯¯ INC to VOUT Change ¯¯¯¯ INC Cycle Time ¯¯¯¯ INC Input Rise and Fall Time Power-up to Wiper Stable Store Cycle Min 100 50 100 250 250 1 100 10 1 A.C. TIMING Notes: (1) (2) (3) Typical values are for TA=25ºC and nominal supply voltage. This parameter is periodically sampled and not 100% tested. MI in the A.C. Timing diagram refers to the minimum incremental change in the W output due to a change in the wiper position. Doc. No. 2125 Rev. B 6 © 2006 Catalyst Semiconductor, Inc. Characteristics subject to change without notice CAT5133 TYPICAL PERFORMANCE CHARACTERISTICS Resistance betw een R W and R L 12.000 ICC2 (NV write) vs Temperature ICC2 (NV write) vs Temperature 400 Vcc= 2.7V; V+=8v Vcc=5.5V; V+=16V 10.000 350 300 ICC2 (μA) RWL (Kohm) 8.000 6.000 4.000 250 200 150 Vcc = 2.7V 100 2.000 Vcc = 5.5V 50 0 0.000 0 16 32 48 64 80 96 112 -50 128 -30 -10 10 1.000 Tam b = 25 C Rtotal = 10K 90 110 130 Vcc=2.7V; V+=8V Tam b = 25ºC Rtotal = 10K 0.400 Vcc=5.5V; V+=16V Vcc=5.5V; V+=16V 0.300 0.400 0.200 R LIN Error (LSB) ALIN Error (LSB) 70 0.500 Vcc=2.7V; V+=8v 0.600 50 Relative Line arity Error Absolute Line arity Error per Tap Position 0.800 30 Temperature (ºC) Tap position 0.200 0.000 -0.200 -0.400 0.100 0.000 -0.100 -0.200 -0.600 -0.300 -0.800 -0.400 -1.000 -0.500 0 16 32 48 64 80 96 112 0 128 © 2006 Catalyst Semiconductor, Inc. Characteristics subject to change without notice 16 32 48 64 80 96 112 128 Tap position Tap position 7 Doc. No. 2125 Rev. B CAT5133 PACKAGE OUTLINES 10-LEAD MSOP E1 E e D A2 b SYMBOL MIN L A1 NOM MAX 1.10 A A1 0.00 0.05 0.15 A2 0.75 0.85 0.95 b 0.17 D 2.90 3.00 3.10 E 4.75 4.90 5.05 E1 2.90 3.00 3.10 0.27 0.50 BSC e L GAUGE PLANE A 0.40 0.8 0° 8° For current Tape and Reel information, download the PDF file from: http://www.catsemi.com/documents/tapeandreel.pdf. Notes: 1. All dimensions are in millimeters. Angles in degrees. 2. Complies with JEDEC Specification MO-187. 3. Stand off height/coplanarity are considered as special characteristics. Doc. No. 2125 Rev. B 8 © 2006 Catalyst Semiconductor, Inc. Characteristics subject to change without notice CAT5133 EXAMPLE OF ORDERING INFORMATION Prefix CAT Device # Suffix 5133 Z I -10 Temperature Range I = Industrial (-40ºC to 85ºC) Company ID Product Number 5133 Package Z: MSOP Resistance -10: 10k ohms -50: 50k ohms(4) -00: 100k ohms(4) –G T3 T: Tape & Reel 3: 3000/Reel Lead Finish G: NiPdAu Notes: (1) All packages are RoHS-compliant (Lead-free, Halogen-free). (2) The standard lead finish is NiPdAu. (3) The device used in the above example is a CAT5133ZI-10-GT3 (MSOP, Industrial Temperature range, 10k ohms, NiPdAu, Tape & Reel). (4) For additional package and temperature options, please contact your nearest Catalyst Semiconductor Sales office. ORDERING PART NUMBER CAT5133ZI-10-GT3 CAT5133ZI-50-GT3(4) CAT5133ZI-00-GT3(4) © 2006 Catalyst Semiconductor, Inc. Characteristics subject to change without notice 9 Doc. No. 2125 Rev. B REVISION HISTORY Date 04/28/06 11/03/06 Rev. A B Reason Initial Issue Update Ordering Information Copyrights, Trademarks and Patents Trademarks and registered trademarks of Catalyst Semiconductor include each of the following: AE2 ™ TM Beyond Memory DPP ™ MiniPot TM M Quad-ModeT Catalyst Semiconductor has been issued U.S. and foreign patents and has patent applications pending that protect its products. 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Products with data sheets labeled "Advance Information" or "Preliminary" and other products described herein may not be in production or offered for sale. Catalyst Semiconductor advises customers to obtain the current version of the relevant product information before placing orders. Circuit diagrams illustrate typical semiconductor applications and may not be complete. Catalyst Semiconductor, Inc. Corporate Headquarters 2975 Stender Way Santa Clara, CA 95054 Phone: 408.542.1000 Fax: 408.542.1200 www.catsemi.com Document No: 2125 Revision: B Issue date: 11/03/06