IRF IRFH7545PBF Brushed motor drive application Datasheet

StrongIRFET™
IRFH7545PbF
HEXFET® Power MOSFET
Application
 Brushed Motor drive applications
 BLDC Motor drive applications
 Battery powered circuits
 Half-bridge and full-bridge topologies
 Synchronous rectifier applications
 Resonant mode power supplies
 OR-ing and redundant power switches
 DC/DC and AC/DC converters
 DC/AC Inverters
VDSS
60V
RDS(on) typ.
4.3m
max
5.2m
ID
85A
Benefits
 Improved Gate, Avalanche and Dynamic dV/dt Ruggedness
 Fully Characterized Capacitance and Avalanche SOA
 Enhanced body diode dV/dt and dI/dt Capability
 Lead-Free, RoHS Compliant
PQFN 5 x 6 mm
Package Type
IRFH7545PbF
PQFN 5mm x 6mm
Standard Pack
Form
Quantity
Tape and Reel
4000
20
IRFH7545TRPbF
80
15
10
TJ = 125°C
5
0
4
6
8
10
12
14
16
18
20
VGS, Gate -to -Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
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60
40
20
TJ = 25°C
2
1
Orderable Part Number
100
ID = 51A
ID, Drain Current (A)
RDS(on), Drain-to -Source On Resistance (m)
Base part number
© 2014 International Rectifier
0
25
50
75
100
125
150
TC , Case Temperature (°C)
Fig 2. Maximum Drain Current vs. Case Temperature
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IRFH7545PbF
Absolute Maximum Rating
Symbol
ID @ TC(Bottom) = 25°C
ID @ TC(Bottom) = 100°C
IDM
PD @TC = 25°C
Parameter
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current 
Maximum Power Dissipation
Linear Derating Factor
VGS
Gate-to-Source Voltage
TJ
Operating Junction and
TSTG
Storage Temperature Range
Avalanche Characteristics
EAS (Thermally limited)
Single Pulse Avalanche Energy 
EAS (Thermally limited)
Single Pulse Avalanche Energy 
IAR
Avalanche Current 
EAR
Repetitive Avalanche Energy 
Thermal Resistance
Symbol
Parameter
Junction-to-Case 
RJC (Bottom)
Junction-to-Case 
RJC (Top)
Junction-to-Ambient 
RJA
Junction-to-Ambient 
RJA (<10s)
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
V(BR)DSS
Drain-to-Source Breakdown Voltage
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
IDSS
Gate Threshold Voltage
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Gate Resistance
RG
Max.
85
54
340
83
0.67
± 20
Units
-55 to + 150
°C
102
160
mJ
See Fig 15, 16, 23a, 23b
A
mJ
Typ.
–––
–––
–––
–––
A
W
W/°C
V
Max.
1.5
22
34
23
Units
°C/W
Min.
60
–––
Typ. Max. Units
Conditions
––– –––
V
VGS = 0V, ID = 250µA
49
––– mV/°C Reference to 25°C, ID = 1mA 
–––
–––
2.1
–––
–––
–––
–––
–––
4.3
6.0
–––
–––
–––
–––
–––
2.5
5.2
–––
3.7
1.0
150
100
-100
–––
m

V
µA
nA
VGS = 10V, ID = 51A 
VGS = 6.0V, ID = 26A 
VDS = VGS, ID = 100µA
VDS =60 V, VGS = 0V
VDS =60V,VGS = 0V,TJ =125°C
VGS = 20V
VGS = -20V

Notes:
Repetitive rating; pulse width limited by max. junction temperature.
 Limited by TJmax, starting TJ = 25°C, L = 78µH, RG = 50, IAS = 51A, VGS =10V.
ISD  51A, di/dt  1212A/µs, VDD  V(BR)DSS, TJ 175°C.
Pulse width  400µs; duty cycle  2%.
 Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
 Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.
 R is measured at TJ approximately 90°C.
 Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 18A, VGS =10V.
 When mounted on 1 inch square PCB (FR-4). Please refer to AN-994 for more details:
http://www.irf.com/technical-info/appnotes/an-994.pdf
2
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© 2014 International Rectifier
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IRFH7545PbF
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Qg
Qgs
Qgd
Qsync
td(on)
tr
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
Total Gate Charge Sync. (Qg – Qgd)
Turn-On Delay Time
Rise Time
Min.
140
–––
–––
–––
–––
–––
–––
Typ.
–––
73
19
22
51
8.6
26
td(off)
Turn-Off Delay Time
–––
43
tf
Ciss
Coss
Crss
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Effective Output Capacitance
(Energy Related)
Output Capacitance (Time Related)
–––
–––
–––
–––
16
3890
365
220
–––
370
–––
VGS = 0V, VDS = 0V to 48V
–––
470
–––
VGS = 0V, VDS = 0V to 48V
Min.
Typ.
Max. Units
–––
–––
85
–––
–––
340
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
Coss eff.(ER)
Coss eff.(TR)
Diode Characteristics
Symbol
Parameter
Continuous Source Current
IS
(Body Diode)
Pulsed Source Current
ISM
(Body Diode)
Max. Units
Conditions
–––
S VDS = 10V, ID = 51A
110
ID = 51A
–––
VDS = 30V
nC
–––
VGS = 10V
–––
–––
VDD = 30V
–––
ID = 51A
ns
–––
RG= 2.7
VGS = 10V 
–––
–––
–––
–––
A
VSD
Diode Forward Voltage
–––
–––
1.2
dv/dt
Peak Diode Recovery dv/dt
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
–––
–––
–––
–––
–––
8.1
32
34
30
38
–––
–––
–––
–––
–––
IRRM
Reverse Recovery Current
–––
1.7
–––
3
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pF
V
VGS = 0V
VDS = 25V
ƒ = 1.0MHz, See Fig.7
D
G
S
TJ = 25°C,IS = 51A,VGS = 0V 
V/ns TJ = 150°C,IS = 51A,VDS = 60V
TJ = 25°C
VDD = 51V
ns
TJ = 125°C
IF = 51A,
TJ = 25°C di/dt = 100A/µs 
nC
TJ = 125°C
A
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TJ = 25°C

November 7, 2014
IRFH7545PbF
1000
1000
100
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
10
4.5V
100
BOTTOM
4.5V
10
60µs PULSE WIDTH
60µs PULSE WIDTH
Tj = 25°C
Tj = 150°C
1
1
0.1
1
10
100
0.1
VDS, Drain-to-Source Voltage (V)
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current (A)
100
2.4
1000
100
TJ = 150°C
TJ = 25°C
10
1
VDS = 25V
60µs PULSE WIDTH
ID = 51A
VGS = 10V
2.0
1.6
1.2
0.8
0.4
0.1
2
3
4
5
6
-60 -40 -20 0
7
Fig 6. Normalized On-Resistance vs. Temperature
Fig 5. Typical Transfer Characteristics
100000
14.0
VGS, Gate-to-Source Voltage (V)
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
10000
Ciss
Coss
1000
20 40 60 80 100 120 140 160
TJ , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
C, Capacitance (pF)
10
Fig 4. Typical Output Characteristics
Fig 3. Typical Output Characteristics
Crss
100
ID = 51A
12.0
VDS = 48V
VDS = 30V
10.0
VDS= 12V
8.0
6.0
4.0
2.0
0.0
0.1
1
10
100
0
VDS , Drain-to-Source Voltage (V)
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20
40
60
80
100
QG, Total Gate Charge (nC)
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage
4
1
VDS, Drain-to-Source Voltage (V)
Fig 8. Typical Gate Charge vs.
Gate-to-Source Voltage
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IRFH7545PbF
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
100
TJ = 150°C
10
TJ = 25°C
1
VGS = 0V
100µsec
100
OPERATION IN THIS
AREA LIMITED BY RDS(on)
10
1
10msec
Tc = 25°C
Tj = 150°C
Single Pulse
DC
0.1
0.1
0.1
0.4
0.7
1.0
1.3
0.1
1.6
1
10
VDS , Drain-to-Source Voltage (V)
VSD , Source-to-Drain Voltage (V)
Fig 10. Maximum Safe Operating Area
Fig 9. Typical Source-Drain Diode Forward Voltage
0.6
78
Id = 1.0mA
76
0.5
74
0.4
Energy (µJ)
V(BR)DSS, Drain-to-Source Breakdown Voltage (V)
1msec
72
70
0.3
0.2
68
0.1
66
0.0
64
-60 -40 -20 0
0
20 40 60 80 100 120 140 160
TJ , Temperature ( °C )
10
20
30
40
50
60
VDS, Drain-to-Source Voltage (V)
RDS (on), Drain-to -Source On Resistance (m)
Fig 11. Drain-to-Source Breakdown Voltage
Fig 12. Typical Coss Stored Energy
20.0
VGS = 5.5V
VGS = 6.0V
VGS = 7.0V
VGS = 8.0V
VGS = 10V
15.0
10.0
5.0
0.0
0
50
100
150
200
ID, Drain Current (A)
Fig 13. Typical On-Resistance vs. Drain Current
5
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IRFH7545PbF
Thermal Response ( Z thJC ) °C/W
10
1
D = 0.50
0.20
0.10
0.05
0.1
0.02
0.01
0.01
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case
100
Avalanche Current (A)
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 125°C and
Tstart =25°C (Single Pulse)
10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming  j = 25°C and
Tstart = 125°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Avalanche Current vs. Pulse Width
EAR , Avalanche Energy (mJ)
120
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 51A
100
80
60
40
20
0
25
50
75
100
125
150
Starting TJ , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy vs. Temperature
6
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Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1.Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for every
part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not
exceeded.
3. Equation below based on circuit and waveforms shown in Figures
23a, 23b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
increase during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax
(assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
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IRFH7545PbF
12
IF = 34A
VR = 51V
4.0
TJ = 25°C
TJ = 125°C
9
3.5
IRRM (A)
VGS(th), Gate threshold Voltage (V)
4.5
3.0
2.5
2.0
ID = 100µA
ID = 250µA
ID = 1.0mA
ID = 1.0A
1.5
6
3
1.0
0
-75 -50 -25
0
25
50
75 100 125 150
0
200
TJ , Temperature ( °C )
600
800
1000
diF /dt (A/µs)
Fig 17. Threshold Voltage vs. Temperature
Fig 18. Typical Recovery Current vs. dif/dt
12
200
IF = 51A
VR = 51V
TJ = 25°C
TJ = 125°C
QRR (nC)
9
IRRM (A)
400
6
175
IF = 34A
VR = 51V
150
TJ = 25°C
TJ = 125°C
125
100
75
3
50
0
25
0
200
400
600
800
1000
0
200
diF /dt (A/µs)
400
600
800
1000
diF /dt (A/µs)
Fig 19. Typical Recovery Current vs. dif/dt
Fig 20. Typical Stored Charge vs. dif/dt
QRR (nC)
200
175
IF = 51A
VR = 51V
150
TJ = 25°C
TJ = 125°C
125
100
75
50
25
0
200
400
600
800
1000
diF /dt (A/µs)
Fig 21. Typical Stored Charge vs. dif/dt
7
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IRFH7545PbF
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V(BR)DSS
15V
L
VDS
D.U.T
RG
IAS
20V
tp
tp
DRIVER
+
V
- DD
A
I AS
0.01
Fig 23a. Unclamped Inductive Test Circuit
Fig 24a. Switching Time Test Circuit
Fig 23b. Unclamped Inductive Waveforms
Fig 24b. Switching Time Waveforms
Id
Vds
Vgs
VDD
Vgs(th)
Qgs1 Qgs2
Fig 25a. Gate Charge Test Circuit
8
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Qgd
Qgodr
Fig 25b. Gate Charge Waveform
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IRFH7545PbF
PQFN 5x6 Outline "E" Package Details
For more information on board mounting, including footprint and stencil recommendation, please refer to application note
AN-1136: http://www.irf.com/technical-info/appnotes/an-1136.pdf
For more information on package inspection techniques, please refer to application note AN-1154:
http://www.irf.com/technical-info/appnotes/an-1154.pdf
PQFN 5x6 Outline "E" Part Marking
INTERNATIONAL
RECTIFIER LOGO
DATE CODE
ASSEMBLY
SITE CODE
(Per SCOP 200-002)
PIN 1
IDENTIFIER
XXXX
XYWWX
XXXXX
PART NUMBER
(“4 or 5 digits”)
MARKING CODE
(Per Marking Spec)
LOT CODE
(Eng Mode - Min last 4 digits of EATI#)
(Prod Mode - 4 digits of SPN code)
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
9
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IRFH7545PbF
PQFN Tape and Reel
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
Qualification Information†
Industrial
Qualification Level
(per JEDEC JESD47F†† guidelines)
Moisture Sensitivity Level
MSL1
PQFN 5mm x 6mm
(per JEDEC J-STD-020D††)
Yes
RoHS Compliant
† Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability
†† Applicable version of JEDEC standard at the time of product release.
Revision History
Date
Comments
8/21/2014
Updated data sheet with latest PQFN Tape and Reel on page 10.
11/7/2014


Updated EAS (L =1mH) = 160mJ on page 2
Updated note 8 “Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 18A, VGS =10V” on page 2
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit http://www.irf.com/whoto-call/
10
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