OKI MSM6775 1/3, 1/4, 1/5 duty lcd driver with 5-dot common driver and 80-dot Datasheet

E2B0012-27-Y2
¡ Semiconductor
MSM6775
¡ Semiconductor
This version: Nov.
1997
MSM6775
Previous version: Mar. 1996
1/3, 1/4, 1/5 DUTY LCD DRIVER WITH 5-DOT COMMON DRIVER AND 80-DOT
SEGMENT DRIVER
GENERAL DESCRIPTION
The MSM6775 is an LCD driver for dynamic display providing 3-duty-switchable pins (1/3, 1/
4 and 1/5 duty). It can directly drive LCDs of up to 400, 320 and 240 segments when 1/5, 1/4
and 1/3 duty are selected, respectively.
FEATURES
• Operating range
Supply voltage (VDD)
Operating temperature (Top)
LCD driving voltage (VDD-VLC3)
• Segment output
1/5 duty
1/4 duty
1/3 duty
• Serial transfer clock frequency
• Serial interface with CPU
:
:
:
:
:
:
:
:
:
2.7 to 5.5V
–40 to +85°C
3.5 to 5.5V
80 pins
Up to 400 segments can be displayed.
Up to 320 segments can be displayed.
Up to 240 segments can be displayed.
4MHz
Through three input pins (DATA, LOAD, and
CLOCK)
• One-to-one corresponcence between input data and its output
When input data is at "H" level
: Display goes on.
When input data is at "L" level
: Display goes off.
• Built-in oscillator circuit for COMMON signals
• The entire display can be turned off. (BLANK pin)
• Package:
100-pin plastic TQFP (TQFP100-P-1414-0.50-K) (Product name : MSM6775TS-K)
1/13
¡ Semiconductor
MSM6775
BLOCK DIAGRAM
SEG1
SEG80
BLANK
80-DOT SEGMENT DRIVER
80-CH DATA SELECTOR
80-BIT
LATCH 5
LOAD
DSEL2
VDD
VSS
80-BIT
LATCH 2
80-BIT
LATCH 1
80
88-BIT SHIFT REGISTER
CLOCK
DSEL1
80-BIT
LATCH 3
LATCH
SELECTOR
DATA
OSC–R
OSC–C
OSC–IN
80-BIT
LATCH 4
OSC
TIMING
GENERATOR
COMMON
DRIVER
VLC1
VLC2
VLC3
COM1
COM2
COM3
COM4
COM5
2/13
¡ Semiconductor
MSM6775
76 SEG26
77 SEG27
78 SEG28
79 SEG29
80 SEG30
81 SEG31
82 SEG32
83 SEG33
84 SEG34
85 SEG35
86 SEG36
87 SEG37
88 SEG38
89 SEG39
90 SEG40
91 SEG41
92 SEG42
93 SEG43
94 SEG44
95 SEG45
96 SEG46
97 SEG47
98 SEG48
99 SEG49
100 SEG50
PIN CONFIGURATION (TOP VIEW)
59 SEG9
SEG68 18
58 SEG8
SEG69 19
57 SEG7
SEG70 20
56 SEG6
SEG71 21
55 SEG5
SEG72 22
54 SEG4
SEG73 23
53 SEG3
SEG74 24
52 SEG2
SEG75 25
51 SEG1
SEG76
COM1 50
60 SEG10
SEG67 17
COM2 49
61 SEG11
SEG66 16
COM3 48
62 SEG12
SEG65 15
COM4 47
63 SEG13
SEG64 14
COM5 46
64 SEG14
SEG63 13
VLC1 45
65 SEG15
SEG62 12
VLC2 44
66 SEG16
SEG61 11
VLC3 43
67 SEG17
SEG60 10
VSS 42
9
OSC-IN 41
68 SEG18
SEG59
OSC-C 40
8
OSC-R 39
69 SEG19
SEG58
DSEL1 38
7
DSEL2 37
70 SEG20
SEG57
BLANK 36
6
DATA 35
71 SEG21
SEG56
CLOCK 34
5
LOAD 33
72 SEG22
SEG55
VDD 32
4
NC 31
73 SEG23
SEG54
SEG80 30
3
SEG79 29
74 SEG24
SEG53
SEG78 28
75 SEG25
2
26
1
SEG52
SEG77 27
SEG51
NC : No connection
100-Pin Plastic TQFP
3/13
¡ Semiconductor
MSM6775
PIN DESCRIPTIONS
Symbol
Type
OSC-IN
I
OSC-C
O
OSC-R
O
DATA
I
CLOCK
I
LOAD
I
BLANK
I
DSEL1
I
DSEL2
I
Description
Pins for oscillation. The oscillator circuit is configured by externally connecting two
resistors and a capacitor. Make the wiring length as short as possible, because the
resistor connected to the OSC-IN pin has a higher value and the circuit is susceptible
to external noise.
Serial data input pin. The display goes on when input data is at "H" level, and it goes
off when input data is at "L" level.
Shift clock input pin. Data from the DATA pin is transferred in synchronization with the
rising edge of the shift clock. (Built-in Schmitt circuit is used.)
Load signal input pin. Serially input data is transferred to the 80-bit latch at "H" level
of this load signal, then held at "L" level.
Input pin that turns off all segments. The entire display goes off when "L" level is
applied to this pin. The display returns to the previous state when "H" level is applied.
Input pins to select 1/3, 1/4, or 1/5 duty. Following shows how each duty is selected.
DSEL2
DSEL1
Duty selected
L
L
1/3
L
H
1/4
X
1/5
H
X: Don't care
COM1 to
COM5
SEG1 to
SEG80
O
O
VSS
LCD panel. For the correspondence between the output of these pins and input data,
see Section, "Data Structure".
Bias pins for LCD drive. Through these pins, bias voltages for the LCD
—
are externally supplied. The bias potential must meet the following condition:
VDD>VLC1≥VLC2>VLC3
VLC3
VDD
LCD panel.
Display output pins for LCD. These pins are connected to the SEGMENT side on the
VLC1
VLC2
Display output pins for LCD. These pins are connected to the COMMON side on the
—
Supply voltage pin and ground pin.
4/13
¡ Semiconductor
MSM6775
ABSOLUTE MAXIMUM RATINGS
Parameter
Condition
Rating
Unit
Supply Voltage
Symbol
VDD
Ta=25°C
–0.3 to +6.0
V
Input Voltage
VI
Ta=25°C
–0.3 to VDD+0.3
V
Storage Temperature
TSTG
–55 to +150
°C
—
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol Condition
Unit
Applicable pin
VDD
—
2.7 to 5.5
V
VDD
VDD – VLC3
—
3.5 to 5.5
V
VDD, VLC1, VLC2, VLC3
Top
—
–40 to +85
°C
—
Supply Voltage
LCD Driving Voltage
Range
Operating Temperature
Oscillator Circuit
Min
Max
Unit
Applicable pin
Oscillation Resistance
Parameter
Symbol Condition
R0
—
20
120
kW
OSC-R
Oscillation Capacitance
C0
—
0.00047
0.01
mF
OSC-C
Current Limiting Resistance
R1
—
62
360
kW
OSC-IN
COMMON Signal Frequency
fCOM
—
25
250
Hz
COM1 to
COM5
Note: See Section, "Reference Data," for the resistor and capacitor values in the table.
RC Values in Oscillator Circuit
Parameter
Symbol
1/3 duty
1/4 duty 1/5 duty
Unit
Applicable pin
Oscillation Resistance
R0
68
51
43
kW
OSC-R
Oscillation Capacitance
C0
0.001
0.001
0.001
mF
OSC-C
Current Limiting Resistance
R1
220
160
130
kW
OSC-IN
Example of an oscillator circuit
MSM6775
R0
OSC-R
C0
OSC-C
R1
OSC-IN
5/13
¡ Semiconductor
MSM6775
ELECTRICAL CHARACTERISTICS
DC Characteristics
(VDD=2.7 to 5.5V, Ta=–40 to +85°C)
Parameter
Symbol
Condition
Min
Max
Unit
"H" Input Voltage 1
VIH1
*1
0.85VDD
VDD
V
"L" Input Voltage 1
VIL1
*1
VSS
0.15VDD
V
"H" Input Voltage 2
VIH2
*2
0.8VDD
VDD
V
"L" Input Voltage 2
VIL2
*2
VSS
0.2VDD
V
"H" Input Current
VIH
VDD=5.5V, VI=VDD
*3
—
10
mA
"L" Input Current
VIL
VDD=5.5V, VI=0V
—
–10
mA
VDD–1
—
V
*3
IO=–100mA
VOC0
COMMON
VOC1
IO=±100mA
*6
VLC1–1
VLC1+1
V
Output Voltage
VOC2
VDD=4.0V
IO=±100mA
*7
VLC2–1
VLC2+1
V
VOC3
IO=+100mA
*8
—
VLC3+1
V
VOS0
IO=–10mA
VDD–1
—
V
Segment
VOS1
IO=±10mA
*6
VLC1–1
VLC1+1
V
Output Voltage
VOS2
IO=±10mA
*7
VLC2–1
VLC2+1
V
VOS3
IO=+10mA
*8
—
VLC3–1
V
*9
—
0.5
mA
Supply Current
*1
*2
*3
*4
*5
*6
*7
*8
*9
IDD
VDD=4.0V
*4
*5
VDD=5.0V, no load
Applies to the CLOCK and OSC-IN.
Applies to all input pins excluding the CLOCK and OSC-IN.
Applies to all input pins.
Applies to COM1 to COM5.
Applies to SEG1 to SEG80.
VLC1=3.0V
VLC2=2.0V
VLC3=1.0V
R0=51kW R1=160kW C0=0.001mF
6/13
¡ Semiconductor
MSM6775
AC Characteristics
(VDD=2.7 to 5.5V, Ta=–40 to +85°C)
Parameter
Symbol
Condition
Min
Max
Unit
Clock Frequency
fCP
—
—
4.0
MHZ
Clock "H" Time
tWHC
—
70
—
ns
Applicable pin
CLOCK
Clock "L" Time
tWLC
—
70
—
ns
Data Set-up Time
tDS
—
50
—
ns
DATA
Data Hold Time
tDH
—
50
—
ns
CLOCK
Load "H" Time
tWHL
—
100
—
ns
LOAD
Clock-to-load Time
tCL
—
100
—
ns
CLOCK
Load-to-clock Time
tLC
—
100
—
ns
LOAD
Rise time, Fall Time
tr1, tf1
—
—
50
ns
CLOCK
OSC-IN Input Frequency
fOSC
—
—
20
kHZ
OSC-IN "H" Time
tWHO
—
20
—
ms
OSC-IN "L" Time
tWLO
—
20
—
ms
Rise Time, Fall Time
tr2, tf2
—
—
100
ns
DATA
VIH2
VIH2
VIL2
VIL2
tDS
OSC-IN
tDH
tr1
tWLC
VIH1
CLOCK
VIL1
tf1
tWHC
VIH1
VIL1
VIL1
1/fCP
VIL1
tWHL
tLC
tCL
VIH2 VIH2
LOAD
VIL2
VIL2
1/fOSC
tr2
tWHO
VIH1
OSC-IN
VIL1
VIL1
tf2
VIH1
VIL1
tWLO
(VIH1=0.85VDD
(VIH2=0.8VDD
VIL1=0.15VDD)
VIL2=0.2VDD )
7/13
¡ Semiconductor
MSM6775
FUNCTIONAL DESCRIPTION
Operation
As shown in "Data Structure" (next section), the display data consists of the data field
corresponding to the output for turning the segments on or off and the select field that selects
the input block of data. Data input to the DATA pin is loaded into the 88-bit shift register at the
rising edge of the CLOCK signal, transferred to the 80-bit latch while the load signal is at "H"
level, and then output via the 80-dot segment driver.
D1
D80
1
80
DM1 DM2 DM3
C1
C2
C3
C4
C5
84
85
86
87
88
DATA
81
82
83
CLOCK
LOAD
Data in
display latch
Old data
New data
8/13
¡ Semiconductor
MSM6775
Data Structure
Input data
End bit
C5
First bit
Corresponds to SEG80
Corresponds to SEG1
C4
C3
C2
C1
DM3 DM2 DM1
Select bit
(5 bits)
D80
D79
Dummy bit
(3 bits)
D5
D4
D3
D2
D1
LCD display data
(80 bits)
Correspondence between select bits and COM1 to COM5
C5
C4
C3
C2
C1
Description
0
0
0
0
1
Display data corresponding to COM1
0
0
0
1
0
Display data corresponding to COM2
0
0
1
0
0
Display data corresponding to COM3
0
1
0
0
0
Display data corresponding to COM4
1
0
0
0
0
Display data corresponding to COM5
Notes: 1. Arbitrary data can be set for the dummy bits.
2. Select bits C1 to C5 select 80-bit latches that correspond to COM1 to COM5,
respectively. Therefore, if "1" is set for more than one select bit, data is set to all the
corresponding 80-bit latches.
Example:
If "1" is set to all the select bits C1 to C5, the display data of D1 to D80 is set to all the
80-bit latches that correspond to COM1 to COM5.
9/13
¡ Semiconductor
MSM6775
APPLICATION CIRCUITS
(For 1/4 duty)
1/4 DUTY
320-SEGMENT
LCD PANEL
CPU
DATA
CLOCK
LOAD
BLANK
VDD
P
O
R
T
SEG1
SEG80
COM1
COM2
COM3
COM4
COM5
Open
R1
OSC-IN
C0
MSM6775
OSC-C
R0
OSC-R
DSEL1
DSEL2
VSS
VLC1 VLC2 VLC3
+5V
BIAS CIRCUIT
10/13
¡ Semiconductor
MSM6775
REFERENCE DATA
The data shown in this section is for reference (a metal film resistor and a film capacitor are
used). Resistor and capacitor values must be determined based on experiments.
Use the following expression to convert oscillation frequency to COMMON frame frequency (or
vice versa):
fCOM=fOSC ¥ Duty/16
fCOM : COMMON frame frequency
fOSC : Oscillation frequency
Duty : e.g., 1/4 for 1/4 duty
For example, if fCOM=100Hz at 1/5 duty, the oscillation frequency is fOSC=8000Hz.
IDD vs. VDD
0.7
Ta=25°C
R0=51kW
R1=160kW
C0=0.001mF
1/4 duty
0.6
IDD [mA]
0.5
0.4
0.3
0.2
0.1
0
2
3
4
5
6
7
VDD [V]
COMMON Frame Frequency vs. VDD
(The resistor and capacitor values used are their recommended values.)
Frame Frequency [Hz]
120
Ta=25°C
1/3 duty
1/4 duty
1/5 duty
110
100
90
80
2
3
4
5
6
7
VDD [V]
11/13
¡ Semiconductor
MSM6775
Oscillation Frequency vs. R0 (VDD=3V)
Frequency [Hz]
105
104
C0=0.00047mF
C0=0.001mF
C0=0.0022mF
C0=0.0047mF
1000
R1 ~~ 3R0
Ta=25°C
100
20
30
40
50
R0 [kW]
60
70 80 90 100
Oscillation Frequency vs. R0 (VDD=5V)
Frequency [Hz]
105
104
C0=0.00047mF
C0=0.001mF
C0=0.0022mF
C0=0.0047mF
1000
R1 ~~ 3R0
Ta=25°C
100
20
30
40
50
R0 [kW]
60
70 80 90 100
12/13
¡ Semiconductor
MSM6775
PACKAGE DIMENSIONS
(Unit : mm)
TQFP100-P-1414-0.50-K
Mirror finish
Package material
Lead frame material
Pin treatment
Solder plate thickness
Package weight (g)
Epoxy resin
42 alloy
Solder plating
5 mm or more
0.55 TYP.
Notes for Mounting the Surface Mount Type Package
The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which
are very susceptible to heat in reflow mounting and humidity absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the
product name, package name, pin number, package code and desired mounting conditions
(reflow method, temperature and times).
13/13
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