a Ultraprecision Low Noise, 2.048 V/2.500 V/ 3.00 V/5.00 V XFET® Voltage References ADR420/ADR421/ADR423/ADR425 FEATURES Low Noise (0.1 Hz to 10 Hz) ADR420: 1.75 V p-p ADR421: 1.75 V p-p ADR423: 2.0 V p-p ADR425: 3.4 V p-p Low Temperature Coefficient: 3 ppm/C Long-Term Stability: 50 ppm/1000 Hours Load Regulation: 70 ppm/mA Line Regulation: 35 ppm/V Low Hysteresis: 40 ppm Typical Wide Operating Range ADR420: 4 V to 18 V ADR421: 4.5 V to 18 V ADR423: 5 V to 18 V ADR425: 7 V to 18 V Quiescent Current: 0.5 mA Maximum High Output Current: 10 mA Wide Temperature Range: –40C to +125C PIN CONFIGURATION Surface-Mount Packages 8-Lead SOIC 8-Lead Mini_SOIC 8 TP TP 1 VIN 2 ADR42x 7 NIC NIC 3 6 V OUT TOP VIEW GND 4 (Not to Scale) 5 TRIM NIC = NO INTERNAL CONNECTION TP = TEST PIN (DO NOT CONNECT) APPLICATIONS Precision Data Acquisition Systems High-Resolution Converters Battery-Powered Instrumentation Portable Medical Instruments Industrial Process Control Systems Precision Instruments Optical Network Control Circuits Table I. ADR42x Products GENERAL DESCRIPTION The ADR42x series are ultraprecision second-generation XFET voltage references featuring low noise, high accuracy, and excellent long-term stability in a SOIC and Mini_SOIC footprints. Patented temperature drift curvature correction technique and XFET (eXtra implanted junction FET) technology minimize nonlinearity of the voltage change with temperature. The XFET architecture offers superior accuracy and thermal hysteresis to the bandgap references. It also operates at lower power and lower supply headroom than the Buried Zener references. ADR420 Products Output Voltage VO Initial Accuracy mV % Tempco ppm/°C ADR420 ADR421 ADR423 ADR425 2.048 2.50 3.00 5.00 1, 3 1, 3 1.5, 4 2, 6 3, 10 3, 10 3, 10 3, 10 0.05, 0.15 0.04, 0.12 0.04, 0.12 0.04, 0.12 The superb noise, stable, and accurate characteristics of ADR42x make them ideal for precision conversion applications such as optical network and medical equipment. The ADR42x trim terminal can also be used to adjust the output voltage over a ±0.5% range without compromising any other performance. The ADR42x series voltage references offer two electrical grades and are specified over the extended industrial temperature range of –40°C to +125°C. Devices are available in 8-lead SOIC-8 or 30% smaller 8-lead Mini_SOIC-8 packages. XFET is a registered trademark of Analog Devices, Inc. REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2002 ADR42x–SPECIFICATIONS ADR420 ELECTRICAL SPECIFICATIONS Parameter Symbol Output Voltage Initial Accuracy A Grade VO VOERR Output Voltage Initial Accuracy B Grade VO VOERR Temperature Coefficient A Grade B Grade Supply Voltage Headroom Line Regulation TCVO VIN – VO ∆VO/∆VIN Load Regulation ∆VO/∆ILOAD Quiescent Current IIN Voltage Noise Voltage Noise Density Turn-On Settling Time Long-Term Stability Output Voltage Hysteresis Ripple Rejection Ratio Short Circuit to GND eN p-p eN tR ∆VO VO_HYS RRR ISC (@ VIN = 5.0 V to 15.0 V, TA = 25C, unless otherwise noted.) Conditions Min Typ Max Unit 2.045 –3 –0.15 2.047 –1 –0.05 2.048 2 1 2.051 +3 +0.15 2.049 +1 +0.05 10 3 10 35 V mV % V mV % ppm/°C ppm/°C V ppm/V 70 ppm/mA 500 600 µA µA µV p-p nV/√Hz µs ppm ppm dB mA –40°C < TA < +125°C 2.048 2 VIN = 5 V to 18 V –40°C < TA < +125°C ILOAD = 0 mA to 10 mA –40°C < TA < +125°C No Load –40°C < TA < +125°C 0.1 Hz to 10 Hz 1 kHz 390 1.75 60 10 50 40 75 27 1,000 Hours fIN = 10 kHz Specifications subject to change without notice. ADR421 ELECTRICAL SPECIFICATIONS Parameter Symbol Output Voltage Initial Accuracy A Grade VO VOERR Output Voltage Initial Accuracy B Grade VO VOERR Temperature Coefficient A Grade B Grade Supply Voltage Headroom Line Regulation TCVO VIN – VO ∆VO/∆VIN Load Regulation ∆VO/∆ILOAD Quiescent Current IIN Voltage Noise Voltage Noise Density Turn-On Settling Time Long-Term Stability Output Voltage Hysteresis Ripple Rejection Ratio Short Circuit to GND eN p-p eN tR ∆VO VO_HYS RRR ISC (@ VIN = 5.0 V to 15.0 V, TA = 25C, unless otherwise noted.) Conditions Min Typ Max Unit 2.497 –3 –0.12 2.499 –1 –0.04 2.500 2 1 2.503 +3 +0.12 2.501 +1 +0.04 10 3 10 35 V mV % V mV % ppm/°C ppm/°C V ppm/V 70 ppm/mA 500 600 µA µA µV p-p nV/√Hz µs ppm ppm dB mA –40°C < TA < +125°C 2.500 2 VIN = 5 V to 18 V –40°C < TA < +125°C ILOAD = 0 mA to 10 mA –40°C < TA < +125°C No Load –40°C < TA < +125°C 0.1 Hz to 10 Hz 1 kHz 1,000 Hours fIN = 10 kHz 390 1.75 80 10 50 40 75 27 Specifications subject to change without notice. –2– REV. B ADR420/ADR421/ADR423/ADR425 ADR423 ELECTRICAL SPECIFICATIONS Parameter Symbol Output Voltage Initial Accuracy A Grade VO VOERR Output Voltage Initial Accuracy B Grade VO VOERR Temperature Coefficient A Grade B Grade Supply Voltage Headroom Line Regulation TCVO VIN − VO ∆VO/∆VIN Load Regulation ∆VO/∆ILOAD Quiescent Current IIN Voltage Noise Voltage Noise Density Turn-On Settling Time Long-Term Stability Output Voltage Hysteresis Ripple Rejection Ratio Short Circuit to GND eN p-p eN tR ∆VO VO_HYS RRR ISC (@ VIN = 5.0 V to 15.0 V, TA = 25C, unless otherwise noted.) Conditions Min Typ Max Unit 2.996 –4 –0.13 2.9985 –1.5 –0.04 3.000 2 1 3.004 +4 +0.13 3.0015 +1.5 +0.04 10 3 10 35 V mV % V mV % ppm/°C ppm/°C V ppm/V 70 ppm/mA 500 600 µA µA µV p-p nV/√Hz µs ppm ppm dB mA –40°C < TA < +125°C 3.000 2 VIN = 5 V to 18 V –40°C < TA < +125°C ILOAD = 0 mA to 10 mA –40°C < TA < +125°C No Load –40°C < TA < +125°C 0.1 Hz to 10 Hz 1 kHz 390 2 90 10 50 40 75 27 1,000 Hours fIN = 10 kHz Specifications subject to change without notice. ADR425 ELECTRICAL SPECIFICATIONS (@ V Parameter Symbol Output Voltage Initial Accuracy A Grade VO VOERR Output Voltage Initial Accuracy B Grade VO VOERR Temperature Coefficient A Grade B Grade Supply Voltage Headroom Line Regulation TCVO VIN – VO ∆VO/∆VIN Load Regulation ∆VO/∆ILOAD Quiescent Current IIN Voltage Noise Voltage Noise Density Turn-On Settling Time Long-Term Stability Output Voltage Hysteresis Ripple Rejection Ratio Short Circuit to GND eN p-p eN tR ∆VO VO_HYS RRR ISC IN = 7.0 V to 15.0 V, TA = 25C, unless otherwise noted.) Conditions Typ Max Unit 4.994 –6 –0.12 4.998 –2 –0.04 5.000 2 1 5.006 +6 +0.12 5.002 +2 +0.04 10 3 10 35 V mV % V mV % ppm/°C ppm/°C V ppm/V 70 ppm/mA 500 600 µA µA µV p-p nV/√Hz µs ppm ppm dB mA –40°C < TA < +125°C 5.000 2 VIN = 7 V to 18 V –40°C < TA < +125°C ILOAD = 0 mA to 10 mA –40°C < TA < +125°C No Load –40°C < TA < +125°C 0.1 Hz to 10 Hz 1 kHz 1,000 Hours fIN = 10 kHz Specifications subject to change without notice. REV. B Min –3– 390 3.4 110 10 50 40 75 27 ADR420/ADR421/ADR423/ADR425 ABSOLUTE MAXIMUM RATINGS * PIN FUNCTION DESCRIPTIONS Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Output Short-Circuit Duration to GND . . . . . . . . . Indefinite Storage Temperature Range R, RM Packages . . . . . . . . . . . . . . . . . . . . –65°C to +150°C Operating Temperature Range ADR42x . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +125°C Junction Temperature Range R, RM Packages . . . . . . . . . . . . . . . . . . . . –65°C to +150°C Lead Temperature Range (Soldering, 60 sec) . . . . . . . 300°C *Absolute maximum ratings apply at 25°C, unless otherwise noted. PIN CONFIGURATIONS SOIC-8 VIN 2 ADR42x NIC 3 GND 4 Mnemonic Description 1, 8 TP 2 3, 7 VIN NIC 4 5 GND TRIM 6 VOUT Test Pin. There are actual connections in TP pins but they are reserved for factory testing purposes. Users should not connect anything to TP pins, otherwise the device may not function properly. Input Voltage No Internal Connect. NICs have no internal connections. Ground Pin = 0 V Trim Terminal. It can be used to adjust the output voltage over a ± 0.5% range without affecting the temperature coefficient. Output Voltage Mini_SOIC-8 8 TP TP 1 Pin VIN 2 7 NIC VOUT NIC 3 5 TRIM GND 4 6 NIC = NO INTERNAL CONNECTION TP = TEST PIN (DO NOT CONNECT) 8 TP TP 1 ADR42x 7 NIC 6 VOUT 5 TRIM NIC = NO INTERNAL CONNECTION TP = TEST PIN (DO NOT CONNECT) Package Type θJA* Unit 8-Lead Mini_SOIC (RM) 8-Lead SOIC (R) 190 130 °C/W °C/W *θJA is specified for the worst-case conditions, i.e., θJA is specified for device soldered in circuit board for surface-mount packages. ORDERING GUIDE Model Output Voltage VO Initial Accuracy mV % Temperature Coefficient Package ppm/°C Description Package Top Option Mark Number of Parts per Reel Temperature Range °C ADR420AR ADR420AR-Reel7 ADR420BR ADR420BR-Reel7 ADR420ARM-Reel7 2.048 2.048 2.048 2.048 2.048 3 3 1 1 3 0.15 0.15 0.05 0.05 0.15 10 10 3 3 10 SOIC SOIC SOIC SOIC Mini_SOIC SO-8 SO-8 SO-8 SO-8 RM-8 ADR420 ADR420 ADR420 ADR420 R4A 98 3,000 98 3,000 1,000 –40 to +125 –40 to +125 –40 to +125 –40 to +125 –40 to +125 ADR421AR ADR421AR-Reel7 ADR421BR ADR421BR-Reel7 ADR421ARM-Reel7 2.50 2.50 2.50 2.50 2.50 3 3 1 1 3 0.12 0.12 0.04 0.04 0.12 10 10 3 3 10 SOIC SOIC SOIC SOIC Mini_SOIC SO-8 SO-8 SO-8 SO-8 RM-8 ADR421 ADR421 ADR421 ADR421 R5A 98 3,000 98 3,000 1,000 –40 to +125 –40 to +125 –40 to +125 –40 to +125 –40 to +125 ADR423AR ADR423AR-Reel7 ADR423BR ADR423BR-Reel7 ADR423ARM-Reel7 3.00 3.00 3.00 3.00 3.00 4 4 1.5 1.5 4 0.13 0.13 0.04 0.04 0.13 10 10 3 3 10 SOIC SOIC SOIC SOIC Mini_SOIC SO-8 SO-8 SO-8 SO-8 RM-8 ADR423 ADR423 ADR423 ADR423 98 3,000 98 3,000 1,000 –40 to +125 –40 to +125 –40 to +125 –40 to +125 –40 to +125 ADR425AR ADR425AR-Reel7 ADR425BR ADR425BR-Reel7 ADR425ARM-Reel7 5.00 5.00 5.00 5.00 5.00 6 6 2 2 6 0.12 0.12 0.04 0.04 0.12 10 10 3 3 10 SOIC SOIC SOIC SOIC Mini_SOIC SO-8 SO-8 SO-8 SO-8 RM-8 ADR425 ADR425 ADR425 ADR425 R7A 98 3,000 98 3,000 1,000 –40 to +125 –40 to +125 –40 to +125 –40 to +125 –40 to +125 CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD42x features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. –4– WARNING! ESD SENSITIVE DEVICE REV. B ADR420/ADR421/ADR423/ADR425 PARAMETER DEFINITIONS Temperature Coefficient The change of output voltage over the operating temperature range and normalized by the output voltage at 25°C, expressed in ppm/°C. The equation follows: TCVO ( ppm / °C ) = Thermal Hysteresis Thermal hysteresis is defined as the change of output voltage after the device is cycled through temperature from +25°C to –40°C to +125°C and back to +25°C. This is a typical value from a sample of parts put through such a cycle. VO _ HYS = VO (25°C ) – VO _ TC VO (T2 ) – VO (T1 ) × 106 VO (25°C ) × (T2 – T1 ) VO _ HYS ( ppm ) = where VO (25°C) = VO at 25°C VO (T2) = VO at Temperature 2. Line Regulation The change in output voltage due to a specified change in input voltage. It includes the effects of self-heating. Line regulation is expressed in either percent per volt, parts-per-million per volt, or microvolts per volt change in input voltage Load Regulation The change in output voltage due to a specified change in load current. It includes the effects of self-heating. Load regulation is expressed in either microvolts per milliampere, parts-per-million per milliampere, or ohms of dc output resistance. Long-Term Stability Typical shift of output voltage at 25°C on a sample of parts subjected to operation life test of 1000 hours at 125°C: ∆VO = VO (t0 ) – VO (t1 ) × 106 VO (t0 ) – VO (t1 ) × 10 6 VO (t0 ) VO (25°C) = VO at 25°C VO_TC = VO at 25°C after temperature cycle at +25°C to –40°C to +125°C and back to +25°C. Input Capacitor Input capacitors are not required on the ADR42x. There is no limit for the value of the capacitor used on the input, but a 1 µF to 10 µF capacitor on the input will improve transient response in applications where the supply suddenly changes. An additional 0.1 µF in parallel will also help to reduce noise from the supply. Output Capacitor The ADR42x does not need output capacitors for stability under any load condition. An output capacitor, typically 0.1 µF, will filter out any low-level noise voltage and will not affect the operation of the part. On the other hand, the load transient response can be improved with an additional 1 µF to 10 µF output capacitor in parallel. A capacitor here will act as a source of stored energy for sudden increase in load current. The only parameter that will degrade, by adding an output capacitor, is turn-on time and it depends on the size of the capacitor chosen. where VO (t0) = VO at 25°C at Time 0 VO (t1) = VO at 25°C after 1,000 hours operation at 125°C. REV. B VO (25°C ) where VO (T1) = VO at Temperature 1 ∆VO ( ppm) = VO (25°C ) – VO _ TC –5– 2.0495 5.0025 2.0493 5.0023 2.0491 5.0021 2.0489 5.0019 2.0487 5.0017 VOUT – V VOUT – V ADR420/ADR421/ADR423/ADR425 ADR42x Series–Typical Performance Characteristics 2.0485 5.0015 2.0483 5.0013 2.0481 5.0011 2.0479 5.0009 2.0477 5.0007 2.0475 –40 –10 20 50 80 110 5.0005 –40 125 –10 TEMPERATURE – C TPC 1. ADR420 Typical Output Voltage vs. Temperature 20 40 TEMPERATURE – C 80 110 125 TPC 4. ADR425 Typical Output Voltage vs. Temperature 0.55 2.5015 2.5013 0.50 SUPPLY CURRENT – mA 2.5011 VOUT – V 2.5009 2.5007 2.5005 2.5003 2.5001 2.4999 +125C 0.45 +25C 0.40 –40C 0.35 0.30 2.4997 2.4995 –40 0.25 –10 20 50 TEMPERATURE – C 80 110 125 TPC 2. ADR421 Typical Output Voltage vs. Temperature 4 6 8 10 INPUT VOLTAGE – V 12 14 15 TPC 5. ADR420 Supply Current vs. Input Voltage 3.0010 0.55 3.0008 0.50 SUPPLY CURRENT – mA 3.0006 VOUT – V 3.0004 3.0002 3.0000 2.9998 2.9996 0.45 +125C 0.40 +25C 0.35 –40C 2.9994 0.30 2.9992 2.9990 –40 –10 20 40 TEMPERATURE – C 80 0.25 110 125 TPC 3. ADR423 Typical Output Voltage vs. Temperature 4 6 8 10 INPUT VOLTAGE – V 12 14 15 TPC 6. ADR421 Supply Current vs. Input Voltage –6– REV. B ADR420/ADR421/ADR423/ADR425 70 0.55 IL = 0mA TO 5mA 60 LOAD REGULATION – ppm/mA SUPPLY CURRENT – mA 0.50 +125C 0.45 0.40 +25C 0.35 –40C 0.30 0.25 50 VIN = 5V 40 30 VIN = 6.5V 20 10 4 6 8 10 INPUT VOLTAGE – V 12 14 0 –40 15 TPC 7. ADR423 Supply Current vs. Input Voltage –10 20 50 TEMPERATURE – C 80 110 125 TPC 10. ADR421 Load Regulation vs. Temperature 70 0.55 IL = 0mA TO 10mA 60 LOAD REGULATION – ppm/mA SUPPLY CURRENT – mA 0.50 +125C 0.45 0.40 +25C 0.35 –40C 0.30 0.25 50 VIN = 7V 40 VIN = 15V 30 20 10 8 6 10 12 INPUT VOLTAGE – V 14 0 –40 15 TPC 8. ADR425 Supply Current vs. Input Voltage –10 VIN = 15V IL = 0mA TO 10mA 30 LOAD REGULATION – ppm/mA LOAD REGULATION – ppm/mA 60 VIN = 4.5V 40 VIN = 6V 20 –10 20 50 TEMPERATURE – C 80 110 20 15 10 0 –40 125 TPC 9. ADR420 Load Regulation vs. Temperature REV. B 25 5 10 0 –40 110 125 35 IL = 0mA TO 5mA 30 80 TPC 11. ADR423 Load Regulation vs. Temperature 70 50 20 40 TEMPERATURE – C –10 20 40 TEMPERATURE – C 80 110 125 TPC 12. ADR425 Load Regulation vs. Temperature –7– ADR420/ADR421/ADR423/ADR425 14 6 VIN = 7.5V TO 15V VIN = 4.5V TO 15V 12 LINE REGULATION – ppm/V LINE REGULATION – ppm/V 5 4 3 2 1 10 8 6 4 2 0 –40 –10 20 50 80 110 0 –40 125 –10 TEMPERATURE – C TPC 13. ADR420 Line Regulation vs. Temperature 20 50 TEMPERATURE – C 80 110 125 TPC 16. ADR425 Line Regulation vs. Temperature 2.5 6 VIN = 5V TO 15V DIFFERENTIAL VOLTAGE – V LINE REGULATION – ppm/V 5 4 3 2 2.0 –40C +25C 1.5 +85C 1.0 0.5 1 0 –40 0 –10 20 50 TEMPERATURE – C 80 110 125 TPC 14. ADR421 Line Regulation vs. Temperature 1 0 2 3 LOAD CURRENT – mA 4 5 TPC 17. ADR420 Minimum Input-Output Voltage Differential vs. Load Current 9 2.5 VIN = 5V TO 15V 7 DIFFERENTIAL VOLTAGE – V LINE REGULATION – ppm/V 8 6 5 4 3 2 2.0 –40C +25C 1.5 +125C 1.0 0.5 1 0 –40 –10 20 50 TEMPERATURE – C 80 0 110 TPC 15. ADR423 Line Regulation vs. Temperature 0 1 2 3 LOAD CURRENT – mA 4 5 TPC 18. ADR421 Minimum Input-Output Voltage Differential vs. Load Current –8– REV. B ADR420/ADR421/ADR423/ADR425 2.5 DIFFERENTIAL VOLTAGE – V 2.0 –40C 1.5 1V/DIV +25C +125C 1.0 0.5 0 0 1 2 3 LOAD CURRENT – mA 4 5 TIME – 1s/DIV TPC 19. ADR423 Minimum Input-Output Voltage Differential vs. Load Current TPC 22. ADR421 Typical Noise Voltage 0.1 Hz to 10 Hz 2.0 –40C +25C 1.5 50V/DIV DIFFERENTIAL VOLTAGE – V 2.5 +125C 1.0 0.5 0 0 1 2 3 LOAD CURRENT – mA 4 5 TIME – 1s/DIV TPC 20. ADR425 Minimum Input-Output Voltage Differential vs. Load Current TPC 23. Typical Noise Voltage 10 Hz to 10 kHz 1k 30 SAMPLE SIZE – 160 VOLTAGE NOISE DENSITY 25 TEMPERATURE +25C –40C +125C +25C FREQUENCY 20 15 10 ADR425 ADR423 100 ADR420 ADR421 5 10 10 –100 –90 –80 –70 –60 –50 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 MORE 0 100 1k FREQUENCY – Hz 10k DEVIATION – ppm TPC 21. ADR421 Typical Hysteresis REV. B TPC 24. Voltage Noise Density vs. Frequency –9– ADR420/ADR421/ADR423/ADR425 1mA LOAD CBYPASS = 0F CL = 100nF LINE INTERRUPTION VOUT VIN 1V/DIV 500mV/DIV LOAD OFF VOUT 500mV/DIV LOAD ON 2V/DIV TIME – 100s/DIV TIME – 100s/DIV TPC 25. ADR421 Line Transient Response TPC 28. ADR421 Load Transient Response CBYPASS = 0.1F CIN = 0.01F NO LOAD LINE INTERRUPTION VIN 500mV/DIV VOUT VOUT 2V/DIV 500mV/DIV VIN 2V/DIV TIME – 4s/DIV TIME – 100s/DIV TPC 26. ADR421 Line Transient Response TPC 29. ADR421 Turn-Off Response 1mA LOAD CL = 0F VOUT CIN = 0.01F NO LOAD 1V/DIV VOUT 2V/DIV LOAD OFF VIN 2V/DIV 2V/DIV LOAD ON TIME – 4s/DIV TIME – 100s/DIV TPC 27. ADR421 Load Transient Response TPC 30. ADR421 Turn-On Response –10– REV. B ADR420/ADR421/ADR423/ADR425 50 CLOAD = 0.01F NO INPUT CAP 45 OUTPUT IMPEDANCE – 40 VOUT 2V/DIV 35 30 ADR425 25 ADR423 20 ADR421 15 10 VIN 2V/DIV 5 ADR420 10 TIME – 4s/DIV TPC 31. ADR421 Turn-Off Response 100 1k FREQUENCY – Hz 10k 100k TPC 34. Output Impedance vs. Frequency CLOAD = 0.01F NO INPUT CAP –10 –20 RIPPLE REJECTION – dB VOUT 2V/DIV VIN 2V/DIV –30 –40 –50 –60 –70 –80 –90 10 TIME – 4s/DIV TPC 32. ADR421 Turn-On Response 5V/DIV VIN 2V/DIV TIME – 100s/DIV TPC 33. ADR421 Turn-On/Turn-Off Response REV. B 1k 10k FREQUENCY – Hz 100k TPC 35. Ripple Rejection vs. Frequency CBYPASS = 0.1F RL = 500 CL = 0 VOUT 100 –11– 1M ADR420/ADR421/ADR423/ADR425 THEORY OF OPERATION Basic Voltage Reference Connections The ADR42x series of references uses a new reference generation technique known as XFET (eXtra implanted junction FET). This technique yields a reference with low supply current, good thermal hysteresis, and exceptionally low noise. The core of the XFET reference consists of two junction field-effect transistors (JFET), one of which has an extra channel implant to raise its pinch-off voltage. By running the two JFETs at the same drain current, the difference in pinch-off voltage can be amplified and used to form a highly stable voltage reference. Voltage references, in general, require a bypass capacitor connected from V OUT to GND. The circuit in Figure 2 illustrates the basic configuration for the ADR42x family of references. Other than a 0.1 µF capacitor at the output to help improve noise suppression, a large output capacitor at the output is not required for circuit stability. The intrinsic reference voltage is around 0.5 V with a negative temperature coefficient of about –120 ppm/°C. This slope is essentially constant to the dielectric constant of silicon and can be closely compensated by adding a correction term generated in the same fashion as the proportional-to-temperature (PTAT) term used to compensate bandgap references. The big advantage over a bandgap reference is that the intrinsic temperature coefficient is some thirty times lower (therefore requiring less correction), resulting in much lower noise since most of the noise of a bandgap reference comes from the temperature compensation circuitry. Figure 1 shows the basic topology of the ADR42x series. The temperature correction term is provided by a current source with a value designed to be proportional to absolute temperature. The general equation is: VIN I1 R2 * R1 R3 *EXTRA CHANNEL IMPLANT VOUT = G(VP – R1 IPTAT) 0.1F NIC 3 4 TP 7 NIC OUTPUT 6 TOP VIEW (Not to Scale) 5 TRIM 0.1F NIC = NO INTERNAL CONNECTION TP = TEST PIN (DO NOT CONNECT) Figure 2. Basic Voltage Reference Configuration Noise Performance The noise generated by the ADR42x family of references is typically less than 2 µV p-p over the 0.1 Hz to 10 Hz band for ADR420, ADR421, and ADR423. TPC 22 shows the 0.1 Hz to 10 Hz noise of the ADR421, which is only 1.75 µV p-p. The noise measurement is made with a bandpass filter made of a 2-pole high-pass filter with a corner frequency at 0.1 Hz and a 2-pole low-pass filter with a corner frequency at 10 Hz. The ADR42x trim terminal can be used to adjust the output voltage over a ± 0.5% range. This feature allows the system designer to trim system errors out by setting the reference to a voltage other than the nominal. This is also helpful if the part is used in a system at temperature to trim out any error. Adjustment of the output has negligible effect on the temperature performance of the device. To avoid degrading temperature coefficient, both the trimming potentiometer and the two resistors need to be low temperature coefficient types, preferably <100 ppm/°C. VOUT VP + 8 APPLICATIONS SECTION OUTPUT ADJUSTMENT ADR42x IPTAT 10F ADR42x Upon application of power (cold start), the time required for the output voltage to reach its final value within a specified error band is defined as the turn-on settling time. Two components normally associated with this are the time for the active circuits to settle, and the time for the thermal gradients on the chip to stabilize. TPC 29 through TPC 33, inclusive, show the turn-on settling time for the ADR421. where G is the gain of the reciprocal of the divider ratio, ∆VP is the difference in pinch-off voltage between the two JFETs, and IPTAT is the positive temperature coefficient correction current. ADR42x are created by on-chip adjustment of R2 and R3 to achieve 2.048 V or 2.500 V at the reference output respectively. I1 2 Turn-On Time (1) VOUT = G × ( ∆VP − R1 × I PTAT ) TP 1 VIN GND INPUT Figure 1. Simplified Schematic Device Power Dissipation Considerations The ADR42x family of references is guaranteed to deliver load currents to 10 mA with an input voltage that ranges from 4.5 V to 18 V. When these devices are used in applications at higher current, users should account for the temperature effects due to the power dissipation increases with the following equation: TJ = PD × θ JA + TA VIN OUTPUT VO = 0.5% VO ADR42x R1 470k Rp 10k TRIM GND (2) where TJ and TA are the junction and ambient temperatures, respectively, PD is the device power dissipation, and θJA is the device package thermal resistance. R2 10k (ADR420) 15k (ADR421) Figure 3. Output Trim Adjustment –12– REV. B ADR420/ADR421/ADR423/ADR425 +VDD Reference for Converters in Optical Network Control Circuits In the upcoming high-capacity, all-optical router network, Figure 4 employs arrays of micromirrors to direct and route optical signals from fiber to fiber, without first converting them to electrical form, which reduces the communication speed. The tiny micromechanical mirrors are positioned so that each is illuminated by a single wavelength that carries unique information and can be passed to any desired input and output fiber. The mirrors are tilted by the dual-axis actuators controlled by precision ADCs and DACs within the system. Due to the microscopic movement of the mirrors, not only is the precision of the converters important, but the noise associated with these controlling converters is also extremely critical, because total noise within the system can be multiplied by the numbers of converters employed. As a result, the ADR42x is necessary for this application for its exceptional low noise to maintain the stability of the control loop. SOURCE FIBER GIMBAL + SENSOR DESTINATION FIBER LASER BEAM ACTIVATOR LEFT AMPL MEMS MIRROR PREAMP 2 VIN 6 VOUT ADR42x GND 4 A1 –VREF –VDD A1 = OP777, OP193 Figure 5. Negative Reference High-Voltage Floating Current Source The circuit of Figure 6 can be used to generate a floating current source with minimal self-heating. This particular configuration can operate on high supply voltages determined by the breakdown voltage of the N-channel JFET. +VS ACTIVATOR RIGHT SST111 VISHAY VIN AMPL ADR42x VOUT CONTROL ELECTRONICS ADR421 DAC ADC DAC 2N3904 OP90 ADR421 GND RL 2.10k ADR421 DSP –VS Figure 4. All-Optical Router Network Figure 6. High-Voltage Floating Current Source A Negative Precision Reference without Precision Resistors Kelvin Connections In many current-output CMOS DAC applications, where the output signal voltage must be of the same polarity as the reference voltage, it is often required to reconfigure a current-switching DAC into a voltage-switching DAC through the use of a 1.25 V reference, an op amp, and a pair of resistors. Using a currentswitching DAC directly requires the need for an additional operational amplifier at the output to reinvert the signal. A negative voltage reference is then desirable from the point that an additional operational amplifier is not required for either reinversion (current-switching mode) or amplification (voltageswitching mode) of the DAC output voltage. In general, any positive voltage reference can be converted into a negative voltage reference through the use of an operational amplifier and a pair of matched resistors in an inverting configuration. The disadvantage to that approach is that the largest single source of error in the circuit is the relative matching of the resistors used. In many portable instrumentation applications, where PC board cost and area go hand-in-hand, circuit interconnects are very often of dimensionally minimum width. These narrow lines can cause large voltage drops if the voltage reference is required to provide load currents to various functions. In fact, a circuit’s interconnects can exhibit a typical line resistance of 0.45 mΩ/ square (1 oz. Cu, for example). Force and sense connections, also referred to as Kelvin connections, offer a convenient method of eliminating the effects of voltage drops in circuit wires. Load currents flowing through wiring resistance produce an error (VERROR = R × IL ) at the load. However, the Kelvin connection of Figure 7 overcomes the problem by including the wiring resistance within the forcing loop of the op amp. Since the op amp senses the load voltage, op amp loop control forces the output to compensate for the wiring error and to produce the correct voltage at the load. A negative reference can easily be generated by adding a precision op amp and configuring as in Figure 5. VOUT is at virtual ground and, therefore, the negative reference can be taken directly from the output of the op amp. The op amp must be dual supply, low offset, and have rail-to-rail capability if negative supply voltage is close to the reference output. VIN RLW 2 ADR42x VIN RLW A1 VOUT 6 VOUT SENSE VOUT FORCE RL GND 4 A1 = OP191 Figure 7. Advantage of Kelvin Connection REV. B –13– ADR420/ADR421/ADR423/ADR425 Together with a digital potentiometer and a Howland current pump, ADR425 forms the reference source for a programmable current as Dual Polarity References VIN 1F 0.1F 2 VIN VOUT 6 +5V R1 10k ADR425 U1 R2 10k IL = +10V (3) and TRIM 5 GND R2 A + R2 B R1 × VW R2 B V+ 4 OP1177 –5V U2 V– R3 5k VW D = 2N × VREF (4) where D = Decimal Equivalent of the Input Code N = Number of Bits –10V Figure 8. +5 V and –5 V Reference Using ADR425 +2.5V In addition, R1' and R2' must be equal to R1 and R2A + R2B, respectively. R2B in theory can be made as small as needed to achieve the current needed within A 2 output current driving capability. In this example, OP2177 is able to deliver a maximum of 10 mA. Since the current pump employs both positive and negative feedback, capacitors C1 and C2 are needed to ensure the negative feedback prevails and, therefore, avoids oscillation. This circuit also allows bidirectional current flow if the inputs VA and VB of the digital potentiometer are supplied with the dual polarity references as shown previously. +10V 2 VIN VOUT 6 ADR425 U1 GND R1 5.6k TRIM 5 4 R2 5.6k V+ OP1177 –2.5V U2 V– Programmable DAC Reference Voltage –10V Figure 9. +2.5 V and –2.5 V Reference Using ADR425 Dual polarity references can easily be made with an op amp and a pair of resistors. In order not to defeat the accuracy obtained by ADR42x, it is imperative to match the resistance tolerance as well as the temperature coefficient of all the components. With a multichannel DAC such as a Quad 12-bit voltage output DAC AD7398, one of its internal DACs and an ADR42x voltage reference can be served as a common programmable VREFX for the rest of the DACs. The circuit configuration is shown in Figure 11. The relationship of VREFX to VREF depends upon the digital code and the ratio of R1 and R2 and is given by: Programmable Current Source VREFX C1 10pF VDD R1’ 50k 2 VIN TRIM 5 U1 4 VOUT 6 AD5232 V+ U2 DIGITAL POT VDD C2 10pF A U2 B V+ W OP2177 R1 50k OP2177 A2 V– R2B 10 VSS A1 V– VSS (5) where D = Decimal Equivalent of Input Code and N = Number of Bits VREF = Applied External Reference VREFX = Reference Voltage for DAC A to D VDD ADR425 GND R2’ 1k R2 VREF × 1 + R1 = D R2 1 + N × R1 2 R2A 1k VL LOAD IL Figure 10. Programmable Current Source –14– REV. B ADR420/ADR421/ADR423/ADR425 Table III. VREFX vs. R1 and R2 R1, R2 R1 = R2 R1 = R2 R1 = R2 R1 = 3R2 R1 = 3R2 R1 = 3R2 Digital Code +5V ANALOG SUPPLY VREF 0000 0000 0000 1000 0000 0000 1111 1111 1111 0000 0000 0000 1000 0000 0000 1111 1111 1111 0.1F 10F AD7701 AVDD 2 VREF 1.3 VREF VREF 4 VREF 1.6 VREF VREF VIN VOUT 0.1F VOUTA R1 0.1% VIN DRDV GND BP/UP VOUTB AIN ANALOG GROUND VOUTC SERIAL CLOCK SERIAL CLOCK CLKIN SC2 AGND ADR425 DGND 0.1F 0.1F –5V ANALOG SUPPLY VOB = V REFX (DB) DACB VREFC SCLK SDATA SC1 ANALOG INPUT DVSS AVSS VREFB DATA READY READ (TRANSMIT) CLKOUT CAL CALIBRATE VREF DACA VREF CS R2 0.1% 0.1F MODE ADR42x RANGES SELECT VREFA DVDD SLEEP 0.1F 10F Figure 12. Voltage Reference for 16-Bit A/D Converter AD7701 VOC = V REFX (DC) DACC Precision Boosted Output Regulator VREFD VOUTD VOD = V REFX (DD) DACD AD7398 Figure 11. Programmable DAC Reference Precision Voltage Reference for Data Converters The ADR42x family has a number of features that make it ideal for use with A/D and D/A converters. The exceptional low noise, tight temperature coefficient, and high accuracy characteristics make the ADR42x ideal for low noise applications such as cellular base station applications. A precision voltage output with boosted current capability can be realized with the circuit shown in Figure 13. In this circuit, U2 forces VO to be equal to VREF by regulating the turn on of N1, therefore, the load current will be furnished by VIN. In this configuration, a 50 mA load is achievable at VIN of 5 V. Moderate heat will be generated on the MOSFET and higher current can be achieved with a replacement of the larger device. In addition, for heavy capacitive load with step input, a buffer may be added at the output to enhance the transient response. N1 VIN VO RL 5V Another example of ADC for which the ADR421 is also well-suited is the AD7701. Figure 12 shows the ADR421 used as the precision reference for this converter. The AD7701 is a 16-bit A/D converter with on-chip digital filtering intended for the measurement of wide dynamic range and low frequency signals such as those representing chemical, physical, or biological processes. It contains a chargebalancing (sigma-delta) ADC, calibration microcontroller with on-chip static RAM, a clock oscillator, and a serial communications port. 25 2 U1 2N7002 VIN VOUT TRIM GND 4 6 5 V+ AD8601 V– U2 ADR421 Figure 13. Precision Boosted Output Regulator REV. B –15– ADR420/ADR421/ADR423/ADR425 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-Lead Narrow Body SOIC (R-8) 0.1574 (4.00) 0.1497 (3.80) 8 5 1 4 C02432–0–3/02(B) 0.1968 (5.00) 0.1890 (4.80) 0.2440 (6.20) 0.2284 (5.80) PIN 1 0.0196 (0.50) 45 0.0099 (0.25) 0.0500 (1.27) BSC 0.0688 (1.75) 0.0532 (1.35) 0.0098 (0.25) 0.0040 (0.10) 8 0.0098 (0.25) 0 0.0075 (0.19) 0.020 (0.51) 0.013 (0.33) SEATING PLANE 0.050 (1.27) 0.016 (0.40) NOTES 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS 2. ALL DIMENSIONS PER JEDEC STANDARDS MS-012 AA 8-Lead Mini_SOIC (RM-8) 0.122 (3.10) 0.114 (2.90) 8 5 0.122 (3.10) 0.114 (2.90) 0.199 (5.05) 0.187 (4.75) 1 4 PIN 1 0.0256 (0.65) BSC 0.120 (3.05) 0.112 (2.84) 0.006 (0.15) 0.002 (0.05) 0.018 (0.46) SEATING 0.008 (0.20) PLANE 0.120 (3.05) 0.112 (2.84) 0.043 (1.09) 0.037 (0.94) 0.011 (0.28) 0.003 (0.08) 33 27 0.028 (0.71) 0.016 (0.41) Revision History Location Page 03/02—Data Sheet changed from REV. A to REV. B. Deletion of Precision Voltage Regulator section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Addition of Precision Boosted Output Regulator section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Addition of Figure 13 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Data Sheet changed from REV. 0 to REV. A. Addition of ADR423 and ADR425 to ADR420/ADR421 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Universal –16– REV. B PRINTED IN U.S.A. Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4