TI AM26C31CDR Quadruple differential line driver Datasheet

 SLLS103J − DECEMBER 1990 − REVISED NOVEMBER 2003
D Meets or Exceeds the Requirements of
D
D
1A
1Y
1Z
G
2Z
2Y
2A
GND
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
4A
4Y
4Z
G
3Z
3Y
3A
AM26C31M . . . FK PACKAGE
(TOP VIEW)
1Y
1A
NC
VCC
4A
D
D
D
D
D
TIA/EIA-422-B and ITU Recommendation
V.11
Low Power, ICC = 100 µA Typ
Operates From a Single 5-V Supply
High Speed, tPLH = tPHL = 7 ns Typ
Low Pulse Distortion, tsk(p) = 0.5 ns Typ
High Output Impedance in Power-Off
Conditions
Improved Replacement for AM26LS31
Available in Q-Temp Automotive
− High-Reliability Automotive Applications
− Configuration Control/Print Support
− Qualification to Automotive Standards
AM26C31M . . . J OR W PACKAGE
AM26C31Q . . . D PACKAGE
AM26C31C/I . . . D, DB, N, OR NS PACKAGE
(TOP VIEW)
description/ordering information
1Z
G
NC
2Z
2Y
4
3
2 1 20 19
18
5
17
6
16
7
15
8
9 10 11 12 13
14
4Y
4Z
NC
G
3Z
2A
GND
NC
3A
3Y
The AM26C31 is a differential line driver with
complementary outputs, designed to meet the
requirements of TIA/EIA-422-B and ITU (formerly
CCITT). The 3-state outputs have high-current
capability for driving balanced lines, such as
twisted-pair or parallel-wire transmission lines,
and they provide the high-impedance state in the
power-off condition. The enable functions are
common to all four drivers and offer the choice of
an active-high (G) or active-low (G) enable input.
BiCMOS circuitry reduces power consumption
without sacrificing speed.
NC − No internal connection
The AM26C31C is characterized for operation from 0°C to 70°C, the AM26C31I is characterized for operation
from −40°C to 85°C, the AM26C31Q is characterized for operation over the automotive temperature range of
−40°C to 125°C, and the AM26C31M is characterized for operation over the full military temperature range of
−55°C to 125°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2003, Texas Instruments Incorporated
! "#$ %!&
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!+ $$ "!!&
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"!+ %! !!$* $%! !+ $$ "!!&
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1
SLLS103J − DECEMBER 1990 − REVISED NOVEMBER 2003
description/ordering information (continued)
ORDERING INFORMATION
PDIP (N)
0°C
0
C to 70
70°C
C
−40°C
−40
C to 85
85°C
C
−40°C to 125°C
−55°C
125°C
−55
C to 125
C
ORDERABLE
PART NUMBER
PACKAGE†
TA
TOP-SIDE
MARKING
Tube of 25
AM26C31CN
Tube of 40
AM26C31CD
Reel of 2500
AM26C31CDR
SOP (NS)
Reel of 2000
AM26C31CNSR
26C31
SSOP (DB)
Reel of 2000
AM26C31CDBR
26C31
PDIP (N)
Tube of 25
AM26C31IN
AM26C31IN
Tube of 40
AM26C31ID
Reel of 2500
AM26C31IDR
SOP (NS)
Reel of 2000
AM26C31INSR
26C31
SSOP (DB)
Reel of 2000
AM26C31IDBR
26C31
Tube of 40
AM26C31QD
Reel of 2500
AM26C31QDR
CDIP (J)
Tube of 25
AM26C31MJ
AM26C31MJ
CFP (W)
Tube of 150
AM26C31MW
AM26C31MW
LCCC (FK)
Tube of 55
AM26C31MFK
SOIC (D)
SOIC (D)
SOIC (D)
AM26C31CN
AM26C31C
AM26C31C
AM26C31QD
AM26C31MFK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
(each driver)
INPUT
A
ENABLES
OUTPUTS
G
G
Y
Z
H
H
X
H
L
H
L
H
X
L
H
X
L
H
L
L
X
L
L
H
X
L
H
Z
Z
H = High level, L = Low level, X = Irrelevant,
Z = High impedance (off)
2
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SLLS103J − DECEMBER 1990 − REVISED NOVEMBER 2003
logic diagram (positive logic)
G
G
1A
2A
3A
4A
4
12
1
2
3
7
9
15
6
5
10
11
14
13
1Y
1Z
2Y
2Z
3Y
3Z
4Y
4Z
schematics of inputs and outputs
EQUIVALENT OF EACH INPUT
TYPICAL OF ALL OUTPUTS
VCC
VCC
Input
Output
GND
GND
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3
SLLS103J − DECEMBER 1990 − REVISED NOVEMBER 2003
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Differential input voltage range, VID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −14 V to 14 V
Output voltage range, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input or output clamp current, IIK or IOK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±150 mA
VCC current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 mA
GND current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −200 mA
Package thermal impedance, θJA (see Notes 2 and 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . 82°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
Operating virtual junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential output voltage (VOD), are with respect to the network ground terminal.
2. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions
MIN
4.5
MAX
5
5.5
UNIT
VCC
VID
Supply voltage
VIH
VIL
High-level input voltage
Low-level input voltage
0.8
V
IOH
IOL
High-level output current
−20
mA
20
mA
±7
Differential input voltage
Low-level output current
TA
Operating free-air temperature
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V
V
2
AM26C31C
4
NOM
V
0
70
AM26C31I
−40
85
AM26C31Q
−40
125
AM26C31M
−55
125
°C
SLLS103J − DECEMBER 1990 − REVISED NOVEMBER 2003
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VOH
VOL
High-level output voltage
Low-level output voltage
IO = −20 mA
IO = 20 mA
|VOD|
Differential output voltage magnitude
RL = 100 Ω,
See Figure 1
∆|VOD|
Change in magnitude of differential output voltage‡
RL = 100 Ω,
See Figure 1
VOC
∆|VOC|
Common-mode output voltage
RL = 100 Ω,
Change in magnitude of common-mode output voltage‡
RL = 100 Ω,
II
Input current
VI = VCC or GND
VO = 6 V
VCC = 0
VO = −0.25 V
VO = 0
IO(off)
Driver output current with power off
IOS
Driver output short-circuit current
IOZ
High-impedance off-state output current
AM26C31C
AM26C31I
MIN
TYP†
2.4
3.4
0.2
2
Quiescent supply current
0.4
V
V
±0.4
V
See Figure 1
3
V
See Figure 1
±0.4
V
±1
µA
100
−100
−30
−150
VO = 2.5 V
VO = 0.5 V
IO = 0
V
3.1
20
−20
VI = 0 V or 5 V
ICC
UNIT
MAX
VI = 2.4 V
or 0.5 V,
See Note 4
1.5
A
µA
mA
µA
A
100
µA
3
mA
Ci
Input capacitance
6
pF
† All typical values are at VCC = 5 V and TA = 25°C.
‡ ∆|VOD| and ∆|VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high level to a low
level.
NOTE 4: This parameter is measured per input. All other inputs are at 0 or 5 V.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
AM26C31C
AM26C31I
UNIT
MIN
TYP†
MAX
tPLH
tPHL
Propagation delay time, low- to high-level output
S1 is open,
See Figure 2
3
7
12
ns
Propagation delay time, high- to low-level output
S1 is open,
See Figure 2
3
7
12
ns
tsk(p)
Pulse skew time (|tPLH − tPHL|)
S1 is open,
See Figure 2
0.5
4
ns
tr(OD), tf(OD)
tPZH
Differential output rise and fall times
S1 is open,
See Figure 3
5
10
ns
Output enable time to high level
S1 is closed,
See Figure 4
10
19
ns
tPZL
tPHZ
Output enable time to low level
S1 is closed,
See Figure 4
10
19
ns
Output disable time from high level
S1 is closed,
See Figure 4
7
16
ns
tPLZ
Output disable time from low level
S1 is closed,
See Figure 4
7
16
ns
Cpd
Power dissipation capacitance (each driver)
(see Note 5)
S1 is open,
See Figure 2
170
pF
† All typical values are at VCC = 5 V and TA = 25°C.
NOTE 5: Cpd is used to estimate the switching losses according to PD = Cpd × VCC2 × f, where f is the switching frequency.
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5
SLLS103J − DECEMBER 1990 − REVISED NOVEMBER 2003
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VOH
VOL
High-level output voltage
Low-level output voltage
IO = −20 mA
IO = 20 mA
|VOD|
Differential output voltage magnitude
RL = 100 Ω,
See Figure 1
∆|VOD|
Change in magnitude of differential output voltage‡
RL = 100 Ω,
See Figure 1
VOC
∆|VOC|
Common-mode output voltage
RL = 100 Ω,
Change in magnitude of common-mode output voltage‡
RL = 100 Ω,
II
Input current
VI = VCC or GND
VO = 6 V
VCC = 0
VO = −0.25 V
VO = 0
IO(off)
Driver output current with power off
IOS
Driver output short-circuit current
IOZ
High-impedance off-state output current
Quiescent supply current
MIN
TYP†
2.2
3.4
0.2
2
V
0.4
V
V
±0.4
V
See Figure 1
3
V
See Figure 1
±0.4
V
±1
µA
100
−100
−170
20
−20
VI = 0 V or 5 V
VI = 2.4 V
or 0.5 V,
See Note 4
IO = 0
UNIT
MAX
3.1
VO = 2.5 V
VO = 0.5 V
IO = 0
ICC
AM26C31Q
AM26C31M
A
µA
mA
µA
A
100
µA
3.2
mA
Ci
Input capacitance
6
pF
† All typical values are at VCC = 5 V and TA = 25°C.
‡ ∆|VOD| and ∆|VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high level to a low
level.
NOTE 4: This parameter is measured per input. All other inputs are at 0 V or 5 V.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
AM26C31Q
AM26C31M
MIN
MAX
tPLH
tPHL
Propagation delay time, low- to high-level output
S1 is open,
See Figure 2
7
12
ns
Propagation delay time, high- to low-level output
S1 is open,
See Figure 2
6.5
12
ns
tsk(p)
Pulse skew time (|tPLH − tPHL|)
S1 is open,
See Figure 2
0.5
4
ns
tr(OD), tf(OD)
tPZH
Differential output rise and fall times
S1 is open,
See Figure 3
5
12
ns
Output enable time to high level
S1 is closed,
See Figure 4
10
19
ns
tPZL
tPHZ
Output enable time to low level
S1 is closed,
See Figure 4
10
19
ns
Output disable time from high level
S1 is closed,
See Figure 4
7
16
ns
tPLZ
Output disable time from low level
S1 is closed,
See Figure 4
7
16
ns
Cpd
Power dissipation capacitance (each driver)
(see Note 5)
S1 is open,
See Figure 2
100
† All typical values are at VCC = 5 V and TA = 25°C.
NOTE 5: Cpd is used to estimate the switching losses according to PD = Cpd × VCC2 × f, where f is the switching frequency.
6
UNIT
TYP†
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pF
SLLS103J − DECEMBER 1990 − REVISED NOVEMBER 2003
PARAMETER MEASUREMENT INFORMATION
RL/2
VOD2
RL/2
VOC
Figure 1. Differential and Common-Mode Output Voltages
C2 = 40 pF
Input
RL/2
C1 =
40 pF
500 Ω
1.5 V
S1
C3 = 40 pF
RL/2
See Note A
TEST CIRCUIT
3V
1.3 V
0V
Input A
(see Note B)
tPLH
Output Y
50%
tPHL
50%
1.3 V
tsk(p)
Output Z
50%
tsk(p)
50%
1.3 V
tPHL
tPLH
NOTES: A. C1, C2, and C3 include probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, duty cycle ≤ 50%, and tr, tf ≤ 6 ns.
Figure 2. Propagation Delay Time and Skew Waveforms and Test Circuit
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SLLS103J − DECEMBER 1990 − REVISED NOVEMBER 2003
PARAMETER MEASUREMENT INFORMATION
C2 = 40 pF
Input
RL/2
C1 =
40 pF
500 Ω
1.5 V
S1
C3 = 40 pF
RL/2
See Note A
TEST CIRCUIT
3V
Input A
(see Note B)
Differential
Output
0V
90%
90%
10%
10%
tr(OD)
tf(OD)
VOLTAGE WAVEFORMS
NOTES: A. C1, C2, and C3 include probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, duty cycle ≤ 50%, and tr, tf ≤ 6 ns.
Figure 3. Differential-Output Rise- and Fall-Time Waveforms and Test Circuit
8
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SLLS103J − DECEMBER 1990 − REVISED NOVEMBER 2003
PARAMETER MEASUREMENT INFORMATION
Output
C2 =
40 pF
0V
3V
Enable Inputs
(see Note B)
Input A
C1 =
40 pF
C3 =
40 pF
G
G
50 Ω
500 Ω
1.5 V
S1
50 Ω
Output
See Note A
TEST CIRCUIT
Enable G Input
(see Note C)
3V
1.3 V
1.3 V
Enable G Input
0V
1.5 V
Output WIth
0 V to A Input
VOL + 0.3 V
0.8 V
VOL
tPLZ
tPZL
VOH
Output WIth
3 V to A Input
VOH − 0.3 V
2V
1.5 V
tPHZ
tPZH
VOLTAGE WAVEFORMS
NOTES: A. C1, C2, and C3 includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, duty cycle ≤ 50%, tr < 6 ns, and
tf < 6 ns.
C. Each enable is tested separately.
Figure 4. Output Enable- and Disable-Time Waveforms and Test Circuit
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9
SLLS103J − DECEMBER 1990 − REVISED NOVEMBER 2003
TYPICAL CHARACTERISTICS
SUPPLY CURRENT
vs
SWITCHING FREQUENCY
300
IIDD
CC − Supply Current − mA
250
ÁÁ
ÁÁ
200
150
100
VCC = 5 V
TA = 25°C
See Figure 2
S1 Open
All Four Channels Switching Simultaneously
N Package
50
0
0
5
10
15
20
25
30
f − Switching Frequency − MHz
Figure 5
10
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35
40
MECHANICAL DATA
MCFP004A– JANUARY 1995 – REVISED FEBRUARY 2002
W (R-GDFP-F16)
CERAMIC DUAL FLATPACK
Base and Seating Plane
0.285 (7,24)
0.245 (6,22)
0.045 (1,14)
0.026 (0,66)
0.006 (0,15)
0.080 (2,03)
0.055 (1,40)
0.004 (0,10)
0.305 (7,75) MAX
1
0.019 (0,48)
0.015 (0,38)
16
0.050 (1,27)
0.430 (10,92)
0.370 (9,40)
0.005 (0,13) MIN
4 Places
8
9
0.360 (9,14)
0.250 (6,35)
0.360 (9,14)
0.250 (6,35)
4040180-3 / C 02/02
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification only.
Falls within MIL STD 1835 GDFP-1F16 and JEDEC MO-092AC
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MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
18
17
16
15
14
13
NO. OF
TERMINALS
**
12
19
11
20
10
A
B
MIN
MAX
MIN
MAX
20
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
28
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
9
22
8
44
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
23
7
52
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
24
6
68
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
84
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
B SQ
A SQ
25
5
26
27
28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140 / D 10/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a metal lid.
The terminals are gold plated.
Falls within JEDEC MS-004
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MECHANICAL
MPDI002C – JANUARY 1995 – REVISED DECEMBER 20002
N (R-PDIP-T**)
PLASTIC DUAL-IN-LINE PACKAGE
16 PINS SHOWN
PINS **
14
16
18
20
A MAX
0.775
(19,69)
0.775
(19,69)
0.920
(23,37)
1.060
(26,92)
A MIN
0.745
(18,92)
0.745
(18,92)
0.850
(21,59)
0.940
(23,88)
MS-100
VARIATION
AA
BB
AC
DIM
A
16
9
0.260 (6,60)
0.240 (6,10)
1
C
AD
8
0.070 (1,78)
0.045 (1,14)
0.045 (1,14)
0.030 (0,76)
D
D
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gauge Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.430 (10,92) MAX
0.021 (0,53)
0.015 (0,38)
0.010 (0,25) M
14/18 PIN ONLY
20 pin vendor option
D
4040049/E 12/2002
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001, except 18 and 20 pin minimum body lrngth (Dim A).
D. The 20 pin end lead shoulder width is a vendor option, either half or full width.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MSOI002B – JANUARY 1995 – REVISED SEPTEMBER 2001
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
8 PINS SHOWN
0.020 (0,51)
0.014 (0,35)
0.050 (1,27)
8
0.010 (0,25)
5
0.008 (0,20) NOM
0.244 (6,20)
0.228 (5,80)
0.157 (4,00)
0.150 (3,81)
Gage Plane
1
4
0.010 (0,25)
0°– 8°
A
0.044 (1,12)
0.016 (0,40)
Seating Plane
0.010 (0,25)
0.004 (0,10)
0.069 (1,75) MAX
PINS **
0.004 (0,10)
8
14
16
A MAX
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
A MIN
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
DIM
4040047/E 09/01
NOTES: A.
B.
C.
D.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
Falls within JEDEC MS-012
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
0,15 M
15
0,25
0,09
8,20
7,40
5,60
5,00
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
2,00 MAX
0,10
0,05 MIN
PINS **
14
16
20
24
28
30
38
A MAX
6,50
6,50
7,50
8,50
10,50
10,50
12,90
A MIN
5,90
5,90
6,90
7,90
9,90
9,90
12,30
DIM
4040065 /E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-150
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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