DISCRETE SEMICONDUCTORS DATA SHEET BF904A; BF904AR; BF904AWR N-channel dual gate MOS-FETs Product specification Supersedes data of 1999 Feb 01 1999 May 14 Philips Semiconductors Product specification N-channel dual gate MOS-FETs FEATURES BF904A; BF904AR; BF904AWR PINNING • Specially designed for use at 5 V supply voltage PIN • Short channel transistor with high transfer admittance to input capacitance ratio 1 source 2 drain 3 gate 2 4 gate 1 • Low noise gain controlled amplifier up to 1 GHz DESCRIPTION handbook, 2 columns 4 1 2 Top view • Superior cross-modulation performance during AGC. MSB014 BF904A marking code: M41. Fig.1 APPLICATIONS • VHF and UHF applications with 3 to 7 V supply voltage such as television tuners and professional communications equipment. 3 handbook, 2 columns 3 4 Simplified outline (SOT143B). 3 halfpage 4 DESCRIPTION Enhancement type field-effect transistors. The transistors consist of an amplifier MOS-FET with source and substrate interconnected and an internal bias circuit to ensure good cross-modulation performance during AGC. The BF904A, BF904AR and BF904AWR are encapsulated in the SOT143B, SOT143R and SOT343R plastic packages respectively. 2 1 2 Top view MSB035 BF904AR marking code: M42. Fig.2 Simplified outline (SOT143R). 1 Top view MSB842 BF904AWR marking code: MH. Fig.3 Simplified outline (SOT343R). QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VDS drain-source voltage − − 7 V ID drain current − − 30 mA Ptot total power dissipation − − 200 mW Ts ≤ 110 °C yfs forward transfer admittance 22 25 30 mS Cig1-ss input capacitance at gate 1 − 2.2 2.6 pF Crss reverse transfer capacitance f = 1 MHz − 25 35 fF F noise figure f = 800 MHz − 2 − dB Tj operating junction temperature − − 150 °C CAUTION This product is supplied in anti-static packing to prevent damage caused by electrostatic discharge during transport and handling. For further information, refer to Philips specs.: SNW-EQ-608, SNW-FQ-302A and SNW-FQ-302B. 1999 May 14 2 Philips Semiconductors Product specification N-channel dual gate MOS-FETs BF904A; BF904AR; BF904AWR LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDS drain-source voltage − 7 V ID drain current − 30 mA IG1 gate 1 current − ±10 mA IG2 gate 2 current − ±10 mA Ptot total power dissipation − 200 mW Tstg storage temperature −65 +150 °C Tj operating junction temperature − 150 °C Ts ≤ 110 °C; note 1; see Fig.4 Note 1. Ts is the temperature of the soldering point of the source lead. MGL615 250 handbook, halfpage Ptot (mW) 200 150 100 50 0 0 50 100 150 200 Ts (°C) Fig.4 Power derating curve. 1999 May 14 3 Philips Semiconductors Product specification N-channel dual gate MOS-FETs BF904A; BF904AR; BF904AWR THERMAL CHARACTERISTICS SYMBOL Rth j-s PARAMETER CONDITIONS thermal resistance from junction to soldering point VALUE UNIT 200 K/W note 1 Note 1. Soldering point of the source lead. STATIC CHARACTERISTICS Tj = 25 °C unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT V(BR)G1-SS gate 1-source breakdown voltage VG2-S = VDS = 0; IG1-S = 10 mA 6 15 V V(BR)G2-SS gate 2-source breakdown voltage VG1-S = VDS = 0; IG2-S = 10 mA 6 15 V V(F)S-G1 forward source-gate 1 voltage VG2-S = VDS = 0; IS-G1 = 10 mA 0.5 1.5 V V(F)S-G2 forward source-gate 2 voltage VG1-S = VDS = 0; IS-G2 = 10 mA 0.5 1.5 V VG1-S(th) gate 1-source threshold voltage VG2-S = 4 V; VDS = 5 V; ID = 20 µA 0.3 1 V VG2-S(th) gate 2-source threshold voltage VG1-S = VDS = 5 V; ID = 20 µA 0.3 1.2 V IDSX drain-source current VG2-S = 4 V; VDS = 5 V; RG1 = 120 kΩ; note 1 8 13 mA IG1-SS gate 1 cut-off current VG2-S = VDS = 0; VG1-S = 5 V − 50 nA IG2-SS gate 2 cut-off current VG1-S = VDS = 0; VG2-S = 5 V − 50 nA Note 1. RG1 connects gate 1 to VGG = 5 V; see Fig.21. DYNAMIC CHARACTERISTICS Common source; Tamb = 25 °C; VDS = 5 V; VG2-S = 4 V; ID = 10 mA; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT yfs forward transfer admittance pulsed; Tj = 25 °C 22 25 30 mS Cig1-s input capacitance at gate 1 f = 1 MHz − 2.2 2.6 pF Cig2-s input capacitance at gate 2 f = 1 MHz 1 1.5 2 pF Cos drain-source capacitance f = 1 MHz 1 1.4 1.7 pF Crs reverse transfer capacitance f = 1 MHz − 25 35 fF F noise figure f = 200 MHz; GS = 2 mS; BS = BSopt − 1 1.5 dB f = 800 MHz; GS = GSopt; BS = BSopt − 2 2.8 dB 1999 May 14 4 Philips Semiconductors Product specification N-channel dual gate MOS-FETs BF904A; BF904AR; BF904AWR MLD268 40 MRA769 0 handbook, gain halfpage Y fs (mS) reduction (dB) 10 30 20 20 30 40 10 50 0 50 0 50 100 150 o T j ( C) 0 1 2 3 4 VAGC (V) f = 50 MHz. Fig.5 Transfer admittance as a function of the junction temperature; typical values. Fig.6 Typical gain reduction as a function of the AGC voltage; see Fig.21. MRA771 120 MLD270 20 handbook, halfpage Vunw V G2 S = 4 V ID (dB µV) 3V 2.5 V (mA) 110 15 100 10 2V 1.5 V 90 5 1V 80 0 10 20 30 0 40 50 gain reduction (dB) 0 0.4 0.8 1.2 1.6 2.0 V G1 S (V) VDS = 5 V; VGG = 5 V; fw = 50 MHz. funw = 60 MHz; Tamb = 25 °C; RG1 = 120 kΩ. Fig.7 VDS = 5 V. Tj = 25 °C. Unwanted voltage for 1% cross-modulation as a function of gain reduction; typical values; see Fig.21. 1999 May 14 Fig.8 Transfer characteristics; typical values. 5 Philips Semiconductors Product specification N-channel dual gate MOS-FETs BF904A; BF904AR; BF904AWR MLD269 MLD271 20 150 handbook, halfpage handbook, halfpage V G1 S = 1.4 V ID (mA) 16 V G2 S = 4 V 3.5 V I G1 (µA) 1.3 V 3V 100 1.2 V 12 1.1 V 8 2.5 V 1.0 V 50 2V 0.9 V 4 0 0 0 2 4 6 8 10 V DS (V) 0 0.5 1.0 1.5 2.0 2.5 V G1 S (V) VDS = 5 V. Tj = 25 °C. VG2-S = 4 V. Tj = 25 °C. Fig.10 Gate 1 current as a function of gate 1 voltage; typical values. Fig.9 Output characteristics; typical values. MLD273 MLD272 16 40 handbook, halfpage handbook, halfpage y fs (mS) ID (mA) V G2 S = 4 V 12 30 3.5 V 3V 20 8 2.5 V 4 10 2V 0 0 0 4 8 12 16 0 20 I D (mA) 10 20 30 40 50 I G1 (µA) VDS = 5 V. VDS = 5 V. Tj = 25 °C. VG2-S = 4 V. Tj = 25 °C. Fig.11 Forward transfer admittance as a function of drain current; typical values. 1999 May 14 Fig.12 Drain current as a function of gate 1 current; typical values. 6 Philips Semiconductors Product specification N-channel dual gate MOS-FETs BF904A; BF904AR; BF904AWR MLD274 MLD275 20 12 handbook, halfpage handbook, halfpage R G1 = 47 kΩ ID ID 68 kΩ 82 kΩ (mA) (mA) 15 100 kΩ 8 120 kΩ 150 kΩ 10 180 kΩ 220 kΩ 4 5 0 0 0 1 2 3 4 0 5 2 4 VGG (V) 6 V GG = V DS (V) VG2-S = 4 V; Tj = 25 °C. RG1 connected to VGG; see Fig.21. VDS = 5 V; VG2-S = 4 V; Tj = 25 °C. RG1 = 120 kΩ (connected to VGG); see Fig.21. Fig.14 Drain current as a function of gate 1 (= VGG) and drain supply voltage; typical values. Fig.13 Drain current as a function of gate 1 supply voltage (= VGG); typical values. MLD276 12 MLB945 40 handbook, halfpage handbook, halfpage V GG = 5 V 4.5 V ID I G1 (µA) 4V (mA) V GG = 5 V 30 3.5 V 8 8 4.5 V 3V 4V 3.5 V 20 3V 4 10 0 0 2 4 V G2 S (V) 0 6 0 VDS = 5 V; Tj = 25 °C. RG1 = 120 kΩ (connected to VGG); see Fig.21. 4 V G2 S (V) 6 VDS = 5 V; Tj = 25 °C. RG1 = 120 kΩ (connected to VGG); see Fig.21. Fig.15 Drain current as a function of gate 2 voltage; typical values. 1999 May 14 2 Fig.16 Gate 1 current as a function of gate 2 voltage; typical values. 7 Philips Semiconductors Product specification N-channel dual gate MOS-FETs BF904A; BF904AR; BF904AWR MLD277 10 2 handbook, halfpage MLD278 10 3 y is (mS) 10 3 ϕ rs (deg) y rs (µS) ϕ rs 10 2 10 10 2 y rs b is 1 10 10 g is 10 1 10 102 f (MHz) 1 1 10 3 10 VDS = 5 V; VG2 = 4 V. ID = 10 mA; Tamb = 25 °C. 102 f (MHz) 10 3 VDS = 5 V; VG2 = 4 V. ID = 10 mA; Tamb = 25 °C. Fig.17 Input admittance as a function of frequency; typical values. MLD279 10 2 y fs (mS) Fig.18 Reverse transfer admittance and phase as a function of frequency; typical values. handbook, halfpage yos (mS) ϕ fs (deg) y fs MGL614 10 10 2 bos 1 ϕ fs 10 10 10−1 10−2 10 1 1 10 102 f (MHz) 10 3 VDS = 5 V; VG2 = 4 V. ID = 10 mA; Tamb = 25 °C. 102 f (MHz) 103 VDS = 5 V; VG2 = 4 V. ID = 10 mA; Tamb = 25 °C. Fig.19 Forward transfer admittance and phase as a function of frequency; typical values. 1999 May 14 gos Fig.20 Output admittance as a function of frequency; typical values. 8 Philips Semiconductors Product specification N-channel dual gate MOS-FETs BF904A; BF904AR; BF904AWR VAGC R1 10 k Ω C1 4.7 nF C2 R GEN 50 Ω R2 50 Ω C3 DUT 4.7 nF 12 pF L1 ≈ 450 nH RL 50 Ω C4 R G1 4.7 nF VI VGG V DS Fig.21 Cross-modulation test set-up. 1999 May 14 9 MLD171 Philips Semiconductors Product specification N-channel dual gate MOS-FETs Table 1 f (MHz) BF904A; BF904AR; BF904AWR Scattering parameters: VDS = 5 V; VG2-S = 4 V; ID = 10 mA; Tamb = 25 °C S21 S11 S12 S22 MAGNITUDE (ratio) ANGLE (deg) MAGNITUDE (ratio) ANGLE (deg) MAGNITUDE (ratio) ANGLE (deg) MAGNITUDE (ratio) ANGLE (deg) 40 0.989 −3.2 2.52 175.9 0.001 87.9 0.989 −1.7 100 0.987 −7.9 2.52 169.4 0.001 86.1 0.988 −4.3 200 0.976 −15.7 2.47 159.2 0.003 81.4 0.984 −8.6 300 0.972 −23.3 2.43 150.5 0.004 80.5 0.985 −12.7 400 0.947 −30.6 2.36 139.6 0.005 76.9 0.975 −16.9 500 0.925 −37.6 2.26 130.3 0.005 75.6 0.968 −20.8 600 0.905 −44.4 2.19 121.1 0.005 75.5 0.961 −24.7 700 0.883 −50.9 2.10 112.3 0.006 78.0 0.954 −28.4 800 0.861 −57.0 2.01 103.6 0.006 85.3 0.946 −32.0 900 0.841 −63.0 1.93 95.5 0.006 90.7 0.934 −35.6 1000 0.822 −68.4 1.85 87.8 0.006 102.6 0.931 −39.3 1200 0.787 −78.9 1.71 72.3 0.007 127.1 0.923 −46.7 1400 0.752 −88.1 1.59 57.3 0.011 143.7 0.926 −54.2 1600 0.723 −97.3 1.47 40.1 0.019 150.0 0.935 −62.2 1800 0.685 −106.3 1.36 25.0 0.021 149.4 0.931 −69.3 2000 0.665 −114.0 1.31 7.7 0.026 151.5 0.930 −77.7 2200 0.659 −119.8 1.30 −14.0 0.035 158.2 0.944 −89.1 2400 0.670 −124.2 1.26 −42.2 0.050 163.4 0.941 −103.5 2600 0.700 −129.3 1.10 −78.2 0.076 162.2 0.849 −119.7 2800 0.729 −138.7 0.82 −120.8 0.106 150.5 0.642 −130.9 3000 0.726 −150.1 0.52 −162.8 0.128 137.4 0.480 −130.6 Table 2 Noise data: VDS = 5 V; VG2-S = 4 V; ID = 10 mA; Tamb = 25 °C Γopt f (MHz) Fmin (dB) (ratio) (deg) Rn (Ω) 800 2.0 0.686 49.6 50.4 1999 May 14 10 Philips Semiconductors Product specification N-channel dual gate MOS-FETs BF904A; BF904AR; BF904AWR PACKAGE OUTLINES Plastic surface mounted package; 4 leads SOT143B D B E A X y HE v M A e bp w M B 4 3 Q A A1 c 1 2 Lp b1 e1 detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 max bp b1 c D E e e1 HE Lp Q v w y mm 1.1 0.9 0.1 0.48 0.38 0.88 0.78 0.15 0.09 3.0 2.8 1.4 1.2 1.9 1.7 2.5 2.1 0.45 0.15 0.55 0.45 0.2 0.1 0.1 OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 97-02-28 SOT143B 1999 May 14 EUROPEAN PROJECTION 11 Philips Semiconductors Product specification N-channel dual gate MOS-FETs BF904A; BF904AR; BF904AWR Plastic surface mounted package; reverse pinning; 4 leads D SOT143R B E A X y HE v M A e bp w M B 3 4 Q A A1 c 2 1 Lp b1 e1 detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 max bp b1 c D E e e1 HE Lp Q v w y mm 1.1 0.9 0.1 0.48 0.38 0.88 0.78 0.15 0.09 3.0 2.8 1.4 1.2 1.9 1.7 2.5 2.1 0.55 0.25 0.45 0.25 0.2 0.1 0.1 OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 97-03-10 SOT143R 1999 May 14 EUROPEAN PROJECTION 12 Philips Semiconductors Product specification N-channel dual gate MOS-FETs BF904A; BF904AR; BF904AWR Plastic surface mounted package; reverse pinning; 4 leads D SOT343R E B A X HE y v M A e 3 4 Q A A1 c 2 w M B 1 bp Lp b1 e1 detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 max bp b1 c D E e e1 HE Lp Q v w y mm 1.1 0.8 0.1 0.4 0.3 0.7 0.5 0.25 0.10 2.2 1.8 1.35 1.15 1.3 1.15 2.2 2.0 0.45 0.15 0.23 0.13 0.2 0.2 0.1 OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 97-05-21 SOT343R 1999 May 14 EUROPEAN PROJECTION 13 Philips Semiconductors Product specification N-channel dual gate MOS-FETs BF904A; BF904AR; BF904AWR DEFINITIONS Data Sheet Status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1999 May 14 14 Philips Semiconductors Product specification N-channel dual gate MOS-FETs BF904A; BF904AR; BF904AWR NOTES 1999 May 14 15 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 125004/00/03/pp16 Date of release: 1999 May 14 Document order number: 9397 750 05271