NanoAmp Solutions, Inc. 670 North McCarthy Blvd. Suite 220, Milpitas, CA 95035 ph: 408-935-7777, FAX: 408-935-7770 www.nanoamp.com N08T1630CxB 8Mb Ultra-Low Power Asynchronous CMOS SRAM 512Kx16 bit Features Overview The N08T1630CxB is an integrated memory device containing a low power 8 Mbit SRAM built using a self-refresh DRAM array organized as 512,288 words by 16 bits. It is designed to be identical in operation and interface to standard 6T SRAMS. The device is designed for low standby and operating current and includes a power-down feature to automatically enter standby mode. The device operates with two chip enable (CE1 and CE2) controls and output enable (OE) to allow for easy memory expansion. Byte controls (UB and LB) allow the upper and lower bytes to be accessed independently and can also be used to deselect the device. The N08T1630CxB is optimal for various applications where low-power is critical such as battery backup and hand-held devices. The device can operate over a very wide temperature range of -40oC to +85oC and is available in JEDEC standard BGA and TSOP2 packages compatible with other standard 512Kb x 16 SRAMs. • Single Wide Power Supply Range 2.7 to 3.6 Volts • Very low standby current 70µA at 3.0V (Max) • Very low operating current 2.0mA at 3.0V and 1µs (Typical) • Simple memory control Dual Chip Enables (CE1 and CE2) Byte control for independent byte operation Output Enable (OE) for memory expansion • Very fast access time 55ns address access option 30ns OE access time • Automatic power down to standby mode • TTL compatible three-state output driver • Green package option for TSOP and BGA Product Family Part Number Package Type N08T1630C2BZ 48 - BGA N08T1630C2BZ2 Green 48 - BGA N08T1630C1BT 44- TSOP2 N08T1630C1BT2 Green 44- TSOP2 Operating Temperature Power Supply (Vcc) Speed -40oC to +85oC 2.7V - 3.6V 55/70ns @ 2.7V Pin Configuration (Top View) A4 A3 A2 A1 A0 CE I/O0 I/O1 I/O2 I/O3 VCC VSS I/O4 I/O5 I/O6 I/O7 WE A18 A17 A16 A15 A14 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 Pin TSOP2 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A5 A6 A7 OE UB LB I/O15 I/O14 I/O13 I/O12 VSS VCC I/O11 I/O10 I/O9 I/O8 A8 A9 A10 A11 A12 A13 Standby Operating Current (ISB), Current (Icc), Max Max @ 3.0V 70 µA 3 mA @ 1MHz Pin Descriptions 1 2 3 4 5 6 Pin Name Pin Function A LB OE A0 A1 A2 CE2 A0-A18 Address Inputs B I/O8 UB A3 A4 CE1 I/O0 C I/O9 I/O10 A5 A6 I/O1 I/O2 D VSS I/O11 A17 A7 I/O3 VCC E VCC I/O12 VSS A16 I/O4 VSS F I/O14 I/O13 A14 A15 I/O5 I/O6 Write Enable Input Chip Enable 1 Input Chip Enable 2 Input (BGA only) Output Enable Input Lower Byte Enable Input Upper Byte Enable Input G I/O15 NC A12 A13 WE I/O7 WE CE1 CE2 OE LB UB I/O0-I/O15 H A18 A8 A9 A10 A11 NC VCC Power VSS Ground NC Not Connected 48 Ball BGA 6 x 8 mm Data Inputs/Outputs (DOC# 14-02-004 REV H ECN# 01-1102) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. 1 N08T1630CxB NanoAmp Solutions, Inc. Functional Block Diagram Address Decode Logic Address Inputs A0 - A18 Input/ Output Mux and Buffers 512K x 16 bit RAM Array I/O0 - I/O7 I/O8 - I/O15 CE1 CE2 WE OE UB LB Control Logic Functional Description CE1 CE21 WE OE UB LB I/O0 - I/O152 MODE POWER H X X X X X High Z Standby3 Standby X L X X X X High Z Standby3 Standby L H X X H H High Z Standby3 Standby L H L X4 L2 L2 Data In Write Active L H H L L2 L2 Data Out Read Active H L2 L2 High Z Active Active L H H 1. CE2 only applies to BGA package. 2. When UB and LB are in select mode (low), I/O0 - I/O15 are affected as shown. When LB only is in the select mode only I/O0 - I/O7 are affected as shown. When UB is in the select mode only I/O8 - I/O15 are affected as shown. 3. When the device is in standby mode, control inputs (WE, OE, UB, and LB), address inputs and data input/outputs are internally isolated from any external influence and disabled from exerting any influence externally. 4. When WE is invoked, the OE input is internally disabled and has no effect on the circuit. Capacitance1 Item Symbol Test Condition Input Capacitance CIN I/O Capacitance CI/O Min Max Unit VIN = 0V, f = 1 MHz, TA = 25oC 8 pF VIN = 0V, f = 1 MHz, TA = 25oC 8 pF 1. These parameters are verified in device characterization and are not 100% tested (DOC# 14-02-004 REV H ECN# 01-1102) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. 2 N08T1630CxB NanoAmp Solutions, Inc. Absolute Maximum Ratings1 Item Symbol Rating Unit Voltage on any pin relative to VSS VIN,OUT –0.3 to VCC+0.3 V Voltage on VCC Supply Relative to VSS VCC –0.3 to 4.5 V Power Dissipation PD 500 mW Storage Temperature TSTG –40 to 125 o Operating Temperature TA -40 to +85 o Soldering Temperature and Time TSOLDER 260oC, 10sec o C C C 1. Stresses greater than those listed above may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Operating Characteristics (Over Specified Temperature Range) Min. Typ1 Max Unit VCC 2.7 3.0 3.6 V VIH 2.2 VCC+0.3 V –0.3 0.6 V Item Symbol Supply Voltage Input High Voltage Test Conditions Input Low Voltage VIL Output High Voltage VOH IOH = 0.2mA Output Low Voltage VOL IOL = -0.2mA 0.4 V Input Leakage Current ILI VIN = 0 to VCC 0.5 µA Output Leakage Current ILO OE = VIH or Chip Disabled 0.5 µA Read/Write Operating Supply Current @ 1 µs Cycle Time2 ICC1 VCC=3.6 V, VIN=VIH or VIL Chip Enabled, IOUT = 0 3.0 5.0 mA Read/Write Operating Supply Current @ 70 ns Cycle Time2 ICC2 VCC=3.6 V, VIN=VIH or VIL Chip Enabled, IOUT = 0 12.0 25.0 mA Maximum Standby Current ISB1 VIN = VCC or 0V Chip Disabled tA= 85oC, VCC = 3.0 V 70.0 µA Maximum Standby Current ISB2 VIN = VCC or 0V Chip Disabled tA= 85oC, VCC = 3.6 V 80.0 µA VCC–0.4 V 1. Typical values are measured at Vcc=Vcc Typ., TA=25°C and not 100% tested. 2. This parameter is specified with the outputs disabled to avoid external loading effects. The user must add current required to drive output capacitance expected in the actual system. (DOC# 14-02-004 REV H ECN# 01-1102) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. 3 N08T1630CxB NanoAmp Solutions, Inc. Timing -55 -70 Item Symbol Read Cycle Time tRC Address Access Time tAA 55 70 ns Chip Enable to Valid Output tCO 55 70 ns Output Enable to Valid Output tOE 30 35 ns Byte Select to Valid Output tLB, tUB 55 70 ns Chip Enable to Low-Z output tLZ 5 5 ns Output Enable to Low-Z Output tOLZ 5 5 ns Byte Select to Low-Z Output tBLZ 5 5 ns Chip Disable to High-Z Output tHZ 0 20 0 25 ns Output Disable to High-Z Output tOHZ 0 20 0 25 ns Byte Select Disable to High-Z Output tBHZ 0 20 0 25 ns Output Hold from Address Change tOH 10 10 ns Write Cycle Time tWC 55 70 ns Chip Enable to End of Write tCW 45 55 ns Address Valid to End of Write tAW 45 55 ns Byte Select to End of Write tBW 45 55 ns Write Pulse Width tWP 45 55 ns Address Setup Time tAS 0 0 ns Write Recovery Time tWR 0 0 ns Write to High-Z Output tWHZ Data to Write Time Overlap tDW 40 40 ns Data Hold from Write Time tDH 0 0 ns End Write to Low-Z Output tOW 5 5 ns Min. Max. 55 Min. Max. 70 25 Units ns 25 ns (DOC# 14-02-004 REV H ECN# 01-1102) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. 4 N08T1630CxB NanoAmp Solutions, Inc. Timing of Read Cycle (CE1 = OE = VIL, WE = CE2 = VIH) tRC Address tAA tOH Data Out Previous Data Valid Data Valid Timing Waveform of Read Cycle (WE=VIH) tRC Address tAA tHZ CE1 tCO CE2 tLZ tOHZ tOE OE tOLZ tLB, tUB LB, UB tLBLZ, tUBLZ Data Out High-Z tBHZ Data Valid (DOC# 14-02-004 REV H ECN# 01-1102) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. 5 N08T1630CxB NanoAmp Solutions, Inc. Timing Waveform of Write Cycle (WE control) tWC Address tWR tAW CE1 tCW CE2 tBW LB, UB tAS tWP WE tDW High-Z tDH Data Valid Data In tWHZ tOW High-Z Data Out Timing Waveform of Write Cycle (CE1 Control) tWC Address tAW CE1 (for CE2 Control, use inverted signal) tWR tCW tAS tBW LB, UB tWP WE tDW Data Valid Data In tLZ Data Out tDH tWHZ High-Z (DOC# 14-02-004 REV H ECN# 01-1102) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. 6 N08T1630CxB NanoAmp Solutions, Inc. 44-Lead TSOP II Package (T44) 18.41±0.10 11.76±0.20 10.16±0.10 0.80mm REF DETAIL B 0.396 0.338 SEE DETAIL B 1.20 Max 0o-8o 0.15 0.05 0.80mm REF Note: 1. All dimensions in inches (Millimeters) 2. Package dimensions exclude molding flash (DOC# 14-02-004 REV H ECN# 01-1102) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. 7 N08T1630CxB NanoAmp Solutions, Inc. Ball Grid Array Package 0.23±0.05 0.90±0.10 D A1 BALL PAD CORNER (3) 1. 0.30±0.05 DIA. E 2. SEATING PLANE - Z 0.15 Z 0.08 TOP VIEW Z SIDE VIEW 1. DIMENSION IS MEASURED AT THE A1 BALL PAD MAXIMUM SOLDER BALL DIAMETER. CORNER PARALLEL TO PRIMARY Z. SD e SE 2. PRIMARY DATUM Z AND SEATING PLANE ARE DEFINED BY THE SPHERICAL CROWNS OF THE SOLDER BALLS. 3. A1 BALL PAD CORNER I.D. TO BE MARKED BY INK. K TYP J TYP e BOTTOM VIEW Dimensions (mm) e = 0.75 D 6±0.10 SD SE J K BALL MATRIX TYPE 0.375 0.375 1.125 1.375 FULL E 8±0.10 (DOC# 14-02-004 REV H ECN# 01-1102) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. 8 N08T1630CxB NanoAmp Solutions, Inc. Ordering Information N08T1630CXB X(x) -XXI Performance Package # CE 55 = 55ns 70 = 70ns Z = 48-BGA Z2 = Green 48-BGA (RoHS Compliant) T = 44-TSOP2 T2 = Green 44-TSOP2 (RoHS Compliant) 1 = 1 CE (TSOP) 2 = 2 CE (BGA) Revision History Revision Date Change Description A August 2002 Initial Preliminary Release B Sept 2002 Added TSOP option to ordering information C November 2002 Added 55ns sort D February 2003 Updated BGA package thickness from 1.2mm to 1.0mm E April 2003 Updated for dual CE in BGA only F September 2003 Change ISB @ 3.0v to 60 uA Change tHZ to 20ns for 55ns part Change tDW to 40ns for both 55ns and 70ns part G November 2003 Change ISB @ 3.0v to 70 uA H January 2005 Added Green package offering © 2005 Nanoamp Solutions, Inc. All rights reserved. NanoAmp Solutions, Inc. ("NanoAmp") reserves the right to change or modify the information contained in this data sheet and the products described therein, without prior notice. NanoAmp does not convey any license under its patent rights nor the rights of others. Charts, drawings and schedules contained in this data sheet are provided for illustration purposes only and they vary depending upon specific applications. NanoAmp makes no warranty or guarantee regarding suitability of these products for any particular purpose, nor does NanoAmp assume any liability arising out of the application or use of any product or circuit described herein. NanoAmp does not authorize use of its products as critical components in any application in which the failure of the NanoAmp product may be expected to result in significant injury or death, including life support systems and critical medical instruments. (DOC# 14-02-004 REV H ECN# 01-1102) The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. 9