Cypress CY22M1SCXLGXI-YY Single output, low power programmable clock generator for portable application Datasheet

PRELIMINARY
MoBL® UniClock CY22M1
Single Output, Low Power Programmable Clock
Generator for Portable Applications
Features
Benefits
■
Small Footprint, 8-Pin QFN 1.7 x 1.7 x 0.6 mm3 Package
■
Low Power and Low Jitter Operation
■
Multiple Operating Voltages:
❐ CY22M1S: 2.5V, 3.0V, or 3.3V
❐ CY22M1L: 1.8V
■
Programmable Single Output Clock Generator Frequency
Range:
❐ 1 to 80 MHz
■
Crystal or External Reference Clock Input Frequency Range:
❐ Fundamental Tuned Crystal: 8 to 48 MHz
❐ External Reference Clock: 1 to 80 MHz
■
Programmable Capacitor Tuning Array
■
Programmable PD# or OE Control Pin
■
Programmable Asynchronous or Synchronous OE and PD#
Modes
■
Programmable Output Buffer Drive Strength
■
Services handsets, portable media players, personal
navigation devices, digital cameras, digital camcorders, and
other portable applications.
■
Saves PCB space due to small form factor.
■
Enables quick turnaround as well as flexibility and adaptability
to design changes through programmability.
■
Enables synthesis of highly accurate and stable output clock
frequencies with zero or low PPM error.
■
Enables fine tuning of output clock frequency by adjusting the
crystal load CLoad using programmable internal capacitors.
■
Lowers clock solution cost by pairing a high frequency PLL
programmability with a low cost, low frequency crystal.
■
Enables low power during the power down or output disable
function.
■
Provides flexibility for system applications through selectable
asynchronous or synchronous output enable and disable.
Logic Block Diagram
Cypress Semiconductor Corporation
Document Number: 001-49075 Rev. *C
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised August 20, 2009
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PRELIMINARY
MoBL® UniClock CY22M1
Pin Description
XOUT
VDD
NC
Figure 1. Package Pinout Drawing: CY22M1 8-Pin 1.7 x 1.7 mm2 QFN
8
7
1
6
CLKOUT
5
NC
CY22M1
8-Pin QFN
3
4
GND
2
PD#/OE
XIN/CLKIN
Table 1. Pin Definition: CY22M1 8-Pin 1.7 x 1.7 mm2 QFN
Pin Number
Name
1
XOUT
2
3
IO
Description
Output
Crystal output. Float for external clock input.
XIN/CLKIN
Input
Crystal or external clock input.
PD#/OE
Input
Multifunction pin. Active low power down or active high output enable pin. Has weak
internal pull up.
4
GND
Power
Power supply ground.
5
NC
–
No connect. Pin has no internal connection.
6
CLKOUT
Output
Programmable clock output. Output voltage depends on VDD. Has weak internal
pull down.
7
NC
–
No connect. Pin has no internal connection.
8
VDD
Power
Programmable power supply:
CY22M1S: 2.5V, 3.0V, 3.3V (standard voltage)
CY22M1L: 1.8V (low voltage)
Document Number: 001-49075 Rev. *C
Page 2 of 12
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PRELIMINARY
MoBL® UniClock CY22M1
Functional Description
Power Management Feature
The MoBL® UniClock CY22M1 is a programmable, high
accuracy, PLL-based clock generator device designed for low
power, space constrained applications. The low jitter and
accurate outputs makes this device suitable for handsets,
portable media players, personal navigation devices, digital
cameras, digital camcorders, and other portable applications.
The MoBL® UniClock CY22M1 offers PD# (active LOW) and OE
(active HIGH) functions. When the power down mode is selected
(PD# =0), the oscillator and PLL are placed in a low supply
current standby mode and the output is tristated and weakly
pulled LOW. The oscillator and PLL circuits must relock when the
part exits the power down mode. If the output is disabled (OE=0),
the output is tristated and weakly pulled LOW. In this mode, the
oscillator and PLL circuits continue to operate, which enables a
rapid return to normal operation when the output is enabled.
The device has several programmable options listed in the
section Programmable Features on page 4 of this data sheet.
The entire configuration is one time programmable.
Configurable PLL
The device uses a programmable PLL to generate output
frequencies from 1 to 80 MHz. The high resolution of the PLL and
flexible output dividers provide this flexibility.
Input Reference Clock Option
There is an option of a crystal or clock signal for the input
reference clock. The frequency range for crystal (XIN) is 8 MHz
to 48 MHz, while the range for an external reference clock
(CLKIN) is 1 MHz to 80 MHz. A PLL bypass mode enables this
device to be used as a crystal oscillator.
Multiple VDD Power Supply Option
The device has programmable power supply options. The
operating supply voltages are 2.5V, 3.0V, or 3.3V for CY22M1S
and 1.8V for CY22M1L.
Programmable Output Drive Strength
The DC drive strength of the clock output can be programmed to
one of two settings, enabling control of output rise and fall times.
Table 2 shows the typical rise and fall times for both of the drive
strength settings.
Table 2. Output Drive Strength
Output Drive Strength
In addition, the PD# or OE mode can be programmed to occur
asynchronously or synchronously with respect to the output
signal. When the asynchronous setting is used, entering power
down or disabling the output occurs immediately (enabling logic
delays) regardless of the position in the clock cycle. Similarly,
exiting power down or enabling the output occurs immediately
with no guarantee of full output clock pulses. However, when the
synchronous setting is used, the part waits for a falling edge at
the output before entering power down or disabling the output.
This prevents output glitches. The first output pulse is
guaranteed to be a full clock pulse when enabling outputs with a
synchronous OE pin. The first output pulse is not guaranteed to
be a full clock when exiting power down in synchronous or
asynchronous mode.
Output Frequency Tuning
The MoBL® UniClock CY22M1 contains an on-chip oscillator
with a built-in programmable capacitor array for fine tuning of the
output frequency. The capacitive load seen by the crystal is
adjusted by programming the memory bits. This feature can
compensate for crystal variations or provide a more accurate
synthesized frequency. Figure 2 on page 4 shows the crystal
oscillator tuning circuit block diagram.
Rise/Fall Time (ns)
(Typical Value)
Low
2.0
High
1.0
Document Number: 001-49075 Rev. *C
Page 3 of 12
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PRELIMINARY
MoBL® UniClock CY22M1
Crystal Oscillator Tuning Circuit
Table 3. Crystal Oscillator Tuning Capacitor Values
Cap
Value[1]
Unit
C7
5.000
pF
C6
2.500
pF
C5
1.250
pF
C4
0.625
pF
C3
0.313
pF
C2
0.156
pF
C1
0.078
pF
C0
0.039
pF
Figure 2. Crystal Oscillator Tuning Block Diagram
FXIN, ESR, C0
RF
-R
CPXIN
CXIN
C1
C0
X0
C2
X1
C3
X2
C4
X3
C5
X4
C6
X5
C7
X6
C7
X7
X7
C5
C6
X6
X5
C4
X4
C3
X3
C2
X2
C1
X1
C0
CXOUT
CPXOUT
X0
Programmable Features
Programming Support
The following list of features can be custom configured:
The device is available in factory and field programmable
versions. The CyClockMaker Programming kit along with
CyClockDesigner configuration software is used for field
programming the device. For specific programming needs,
contact your local Cypress field application engineer (FAE) or
sales representative.
■
PLL frequency and output divider value
■
Oscillator tuning (crystal load) capacitance value
■
Direct oscillator output (PLL bypass)
■
High or low power supply voltage operation
■
Power management mode (OE or PD#)
■
Power management timing (synchronous or asynchronous)
■
Programmable output drive strength
Note
1. The capacitor values are nominal.
Document Number: 001-49075 Rev. *C
Page 4 of 12
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PRELIMINARY
MoBL® UniClock CY22M1
Absolute Maximum Ratings
Parameter[2]
VDD
Description
Condition
Min
Max
Unit
Supply voltage, 2.5V/3.0V/3.3V range
–0.5
4.4
V
Supply voltage, 1.8V range
–0.5
2.8
V
VIN
Input voltage
Relative to VSS
–0.5
VDD+0.5
V
TS
Temperature, storage
Non functional
–55
+125
°C
TJ
Temperature, junction
Non functional
–40
+125
°C
ESDHBM
ESD protection (human body model)
JEDEC EIA/JESD22-A114-E
2000
–
Volts
DRET
Data retention at TJ = 125°C
–
Yr.
PRCYCLE
Maximum programming cycle
UL-94
Flammability rating
MSL
Moisture sensitivity level
10
1
V-0 at 1/8 in.
3
Recommended Operating Conditions
Parameter[2]
VDD
Description
Min
Typ
Max
Unit
Supply voltage, 1.8V operating range for CY22M1L
1.6
–
2.0
V
Supply voltage, 2.5V operating range for CY22M1S
2.2
–
2.8
V
Supply voltage, 3.0V operating range for CY22M1S
2.7
–
3.3
V
Supply voltage, 3.3V operating range for CY22M1S
3.0
–
3.6
V
TAC
Commercial ambient temperature
0
–
70
°C
TAI
Industrial ambient temperature
-40
–
85
°C
TPU
Power up time for VDD to reach minimum specified voltage (power ramp
must be monotonic)
0.05
–
500
ms
TPD
Minimum pulse width of PD#/OE input
100
–
–
ns
COUT
Output load capacitance
–
–
15
pF
Note
2. Stresses beyond those listed underAbsolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to Absolute-Maximum-Rated
Conditions for extended periods may affect device reliability or cause permanent device damage.
Document Number: 001-49075 Rev. *C
Page 5 of 12
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PRELIMINARY
MoBL® UniClock CY22M1
DC Electrical Specifications
Parameter[3] Description
VIL1
Input low voltage of PD#/OE
VIH1
Input high voltage of PD#/OE
VIL2
Input low voltage of REFIN
VIH2
Input high voltage of REFIN
Test Conditions
Min
Typ
Max
Unit
–
–
0.2*VDD
V
0.8*VDD
–
–
V
CY22M1S
-0.2
–
0.4
V
CY22M1L
-0.2
–
0.4
V
CY22M1S
1.2
–
2.1
CY22M1L
V
[4]
VDD+0.3
V
1.2
–
VOL1
Output low voltage
IOL = 8 mA, VDD = 3.0/3.3V
–
–
0.4
V
VOH1
Output high voltage
IOH = 8 mA, VDD = 3.0/3.3V
VDD–0.4
–
–
V
VOL2
Output low voltage
IOL = 4 mA, VDD = 1.8/2.5V
–
–
0.1*VDD
V
VOH2
Output high voltage
IOH = 4 mA, VDD = 1.8/2.5V
0.9*VDD
–
–
V
IIL
Input low current
Input = VSS
–
<1
10
μA
IIH
Input high current
Input = VDD
–
<1
10
μA
IOZL
Output leakage current
Output = VSS, Tj = 85°C
–
<1
5
μA
IOZH
Output leakage current
Output = VDD
–
–
50
μA
IDD
Power supply current for CY22M1L
FOUT = 12 MHz, no load
FOUT = 12 MHz, 15 pF load
FOUT = 48 MHz, no load
FOUT = 48 MHz, 15 pF load
–
–
–
–
1.0
1.2
1.6
2.8
–
–
–
–
mA
mA
mA
mA
Power supply current for CY22M1S
FOUT = 12 MHz, no load
FOUT = 12 MHz, 15 pF load
FOUT = 48 MHz, no load
FOUT = 48 MHz, 15 pF load
–
–
–
–
1.5
3.3
2.5
6.5
–
–
–
–
mA
mA
mA
mA
IPD
Power down current
Tj = 85°C
–
25
50
μA
RUP
Input pull up resistors
PD#/OE = low
PD#/OE = high
1
100
–
–
6
250
MΩ
kΩ
RDN
Output pull down resistors
500
–
1500
kΩ
CIN
Input capacitance of PD#/OE pin
–
–
7
pF
Notes
3. Parameters are guaranteed by design and characterization. Not 100% tested in production.
4. VIH2 absolute maximum value is 2.1V. For VDD = 1.6V to 1.8V, the maximum VIH2 is VDD + 0.3V.
Document Number: 001-49075 Rev. *C
Page 6 of 12
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PRELIMINARY
MoBL® UniClock CY22M1
AC Electrical Specifications
Parameter[6]
Min
Typ
Max
Unit
FIN (Crystal)
Crystal frequency range (XIN)
Description
Test Conditions
8
–
48
MHz
FIN (Clock)
Clock frequency range (REFIN)
1
–
80
MHz
FCLK
Output frequency
1
–
80
MHz
TR
Output rise time
Measured from 20% to 80% VDD,
COUT = 15 pF, drive strength set to
high
–
–
1.5
ns
TF
Output fall time
Measured from 80% to 20% VDD,
COUT = 15 pF, drive strength set to
high
–
–
1.5
ns
DC
Output clock duty cycle
Using PLL as a source
45
50
55
%
TCCJ
Cycle-to-cycle jitter of CLKOUT using 80 MHz > FOUT > 50 MHz
PLL
FOUT < 50 MHz
–
–
150
–
200
1
ps
%TOUT[5]
TP
Period jitter of CLKOUT using PLL
–
–
150
–
200
1
ps
%TOUT[5]
TPO,CLK
Power on time for output clock
–
–
5
ms
TPU,CLK
Power up time from power down for
output clock
–
–
5
ms
TPD,ASYNC
Time from falling edge of PD# to
stopped outputs, asynchronous mode
–
–
100
ns
TPD,SYNC
Time from falling edge of PD# to
stopped outputs, synchronous mode
–
–
1.5T + 100
ns
TOD,ASYNC
Time from falling edge of OE to
stopped outputs, asynchronous mode
–
–
100
ns
TOD,SYNC
Time from falling edge of OE to
stopped outputs, synchronous mode
–
–
1.5T + 100
ns
TOE,ASYNC
Time from rising edge of OE to running
outputs, asynchronous mode
–
–
100
ns
80 MHz > FOUT > 50 MHz
FOUT < 50 MHz
Notes
5. %TOUT is the percentage of the output clock period.
6. Parameters are guaranteed by design and characterization. Not 100% tested in production.
Document Number: 001-49075 Rev. *C
Page 7 of 12
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PRELIMINARY
MoBL® UniClock CY22M1
Recommended Crystal Specifications for SMD Package
Parameter
Description
Range 1 Range 2 Range 3
Unit
FMIN
Minimum frequency
8
14
28
MHz
FMAX
Maximum frequency
14
28
48
MHz
R1
Maximum motional resistance (ESR)
135
50
30
Ω
C0
Nominal shunt capacitance
4
4
2
pF
CL
Nominal load capacitance
18
14
12
pF
DL
Maximum crystal drive level
300
300
300
μW
Switching Waveforms
Figure 3. CLKOUT Rise and Fall Time
VDD
80%
20%
CLKOUT
TR
0V
TF
Figure 4. Duty Cycle Timing (DC)
DC =T1A/T1B
T1B
T1A
VDD/2
CLKOUT
Figure 5. Period Jitter
VDD
VDD/2
CLKOUT
0V
J
P
CLKOUT
–3σ
+1σ +3σ
Figure 6. Cycle to Cycle Jitter
T CCJ = Max(T2-T1, T3-T2, T4-T3, …, T1000-T999)
T1
CLKOUT
Document Number: 001-49075 Rev. *C
T2
T3
T4
T5
T998
T999 T1000
VDD
0V
Page 8 of 12
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PRELIMINARY
MoBL® UniClock CY22M1
Figure 7. Power On Timing
VDD
VDD
0V
TRAMP
TPO,OUT
CLKOUT
VDD
Clock
Startup
0V
Figure 8. Power Down Timing (Synchronous and Asynchronous Modes) and Power Up Timing
PD#
VDD
0V
1/f
Internal
Clock
Clock
Startup
TPD,SYNC
CLKOUT
(SYNC)
CLKOUT
(ASYNC)
VDD
0V
TPU,OUT
Clock
Weakly Pulled Low Startup
VDD
TPU,OUT
Clock
Startup
VDD
TPD,ASYNC
Weakly Pulled Low
0V
0V
Figure 9. CLKOUT Enable (Synchronous and Asynchronous Modes) and CLKOUT DisableTiming
VDD
0V
OE
Internal
Clock
CLKOUT
(SYNC)
CLKOUT
(ASYNC)
Document Number: 001-49075 Rev. *C
TOD,SYNC
TOE,SYNC
Weakly Pulled Low
TOD,ASYNC
TOE,ASYNC
Weakly Pulled Low
VDD
0V
VDD
0V
VDD
0V
Page 9 of 12
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PRELIMINARY
MoBL® UniClock CY22M1
Ordering Information
Part Number[7],[8]
Type
VDD(V)
Production Flow
Pb-free
CY22M1SCALGXC-00
8-pin QFN, Field Programmable
Supply voltage: 2.5V, 3.0V, or 3.3V Commercial, 0°C to 70°C
CY22M1SCALGXC-00T 8-pin QFN, Field Programmable tape and reel
Supply voltage: 2.5V, 3.0V, or 3.3V Commercial, 0°C to 70°C
CY22M1LCALGXC-00
Supply voltage: 1.8V
Commercial, 0°C to 70°C
CY22M1LCALGXC-00T 8-pin QFN, Field Programmable tape and reel
8-pin QFN, Field Programmable
Supply voltage: 1.8V
Commercial, 0°C to 70°C
CY22M1SCALGXI-00
Supply voltage: 2.5V, 3.0V, or 3.3V Industrial, -40°C to +85°C
8-pin QFN, Field Programmable
CY22M1SCALGXI-00T 8-pin QFN, Field Programmable tape and reel
Supply voltage: 2.5V, 3.0V, or 3.3V Industrial, -40°C to +85°C
CY22M1LCALGXI-00
8-pin QFN, Field Programmable
Supply voltage: 1.8V
Industrial, -40°C to +85°C
CY22M1LCALGXI-00T
8-pin QFN, Field Programmable tape and reel
Supply voltage: 1.8V
Industrial, -40°C to +85°C
CY22M1SCxLGXC-yy
8-pin QFN
Supply voltage: 2.5V, 3.0V, or 3.3V Commercial, 0°C to 70°C
CY22M1SCxLGXC-yyT 8-pin QFN - tape and reel
Supply voltage: 2.5V, 3.0V, or 3.3V Commercial, 0°C to 70°C
CY22M1LCxLGXC-yy
Supply voltage: 1.8V
Commercial, 0°C to 70°C
CY22M1LCxLGXC-yyT 8-pin QFN - tape and reel
Supply voltage: 1.8V
Commercial, 0°C to 70°C
CY22M1SCxLGXI-yy
Supply voltage: 2.5V, 3.0V, or 3.3V Industrial, -40°C to +85°C
8-pin QFN
8-pin QFN
CY22M1SCxLGXI-yyT
8-pin QFN - tape and reel
Supply voltage: 2.5V, 3.0V, or 3.3V Industrial, -40°C to +85°C
CY22M1LCxLGXI-yy
8-pin QFN
Supply voltage: 1.8V
Industrial, -40°C to +85°C
CY22M1LCxLGXI-yyT
8-pin QFN - tape and reel
Supply voltage: 1.8V
Industrial, -40°C to +85°C
Figure 10. Actual Marking
Pin 1 indicator
MM M
N N N
(MMM) = 7th, 8th and 9th characters of marketing part number
(NNN) = Last 3 digits of assembly lot number
Notes
7. x indicates a part marking placeholder to distinguish different configurations for the same customer, beginning alphabetically from “A”.
8. yy indicates “Factory Programmable” and are factory programmed configurations. For more details, contact your local Cypress FAE or Cypress Sales Representative.
Document Number: 001-49075 Rev. *C
Page 10 of 12
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PRELIMINARY
MoBL® UniClock CY22M1
Package Drawing and Dimensions
Figure 11. Package Outline Drawing: CY22M1 8-Pin 1.7 x 1.7 x 0.6 mm3 QFN
001-49591 **
Document Number: 001-49075 Rev. *C
Page 11 of 12
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MoBL® UniClock CY22M1
PRELIMINARY
Document History Page
Document Title: MoBL® UniClock CY22M1 Single Output, Low Power Programmable Clock Generator for
Portable Applications
Document Number: 001-49075
Rev
ECN
Orig. of
Change
Submission
Date
Description of Change
**
2571065
DPF/CXQ/AESA
09/23/08
New Data Sheet
*A
2636981
CXQ/PYRS
01/15/09
Changed max output frequency to 80 MHz
Changed min input reference frequency to 1 MHz
Changed max input reference frequency to 80 MHz
Changed Idd max conditions and specs
Updated VIH/VIL specs for REFIN
Added typical IPD value of 25uA
Added period jitter spec
Removed maximum frequency from Output Drive Strength table
Updated part numbers in Ordering Information
Replaced CyberClocksOnline and CY3672 programmer kit reference
with CyClockMaker and CyClockDesigner reference
Added marking format information
Updated package drawing to spec 001-49591
*B
2673516
CXQ/PYRS
03/13/09
Changed from Advanced to Preliminary datasheet
Deleted “1.8V” when referring to external reference
Updated VIH2 maximum for CY22M1L and added note 4
Added IDD values to DC Electrical Specifications table
*C
2756169
TSAI
08/20/2009 Post to external web
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for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use
as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support
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Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not
assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where
a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer
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Use may be limited by and subject to the applicable Cypress software license agreement.
Document Number: 001-49075 Rev. *C
Revised August 20, 2009
Page 12 of 12
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