Protection of Lithium Ion Batteries (two cells in series) MM1292 MITSUMI Protection of Lithium Ion Batteries (two cells in series) Monolithic IC MM1292 Outline This IC is for protecting a lithium ion battery from overcharging, excess discharging, and overcurrent. If abnormalities occur during charging and excess voltage is applied, it has a function that turns off the external FET switch when voltage is applied to each battery beyond a specified time (overcharging detection). It also has a function that turns off the external FET switch when the voltage for each battery falls below a set voltage, to prevent excess discharge when discharging the battery (discharging detection). At that time, the IC is switched to low current consumption mode. Also, when there is a large current flow due to shorting or other reasons, there is a function for turning off the external FET switch (overcurrent detection). These functions comprise a protection circuit, with few external parts, for lithium ion batteries. 2-Cell Protection ICs Model name MM1302A MM1292C MM1292D MM1302E MM1302F MM1302G MM1292H MM1292J MM1292K MM1292L Overcharge protection Detection voltage Hysteresis 4.25±0.05V 10mV 4.25±0.05V 200mV 4.35±0.05V 200mV 4.10±0.05V 10mV 4.35±0.05V 10mV 4.215±35V 10mV 4.30±0.05V 220mV 4.25±0.05V 220mV 4.25±0.05V 220mV 4.25±0.05V 220mV Overdischarge protection Detection voltage Hysteresis 2.3V±0.1V 700mV 2.4V±0.1V 600mV 2.4V±0.1V 600mV 2.4V±0.1V 600mV None 2.3V±0.1V 700mV 2.05V±0.1V 950mV 2.4V±0.1V 600mV 2.4V±0.1V 600mV 2.2V±0.1V 800mV Overcurrent Detection voltage 220±20mV 150±15mV 150±15mV 150±15mV None 220±20mV 170±15mV 150±15mV 150±15mV 100±10mV Features 1. Current consumption (during overcharging) 2. Current consumption (normal) 3. Current consumption (during excess discharging) 4. Current consumption (during excess discharging) 5. Overcharge detection voltage (Ta=-20°C~+70°C) 6. Hysteresis voltage 7. Excess discharge detection voltage 8. Discharge resumption voltage 9. Overcurrent detection voltage 10.Reset after overcurrent detection 11.Operating limit voltage VCELL=4.5V VCELL=3.5V VCELL=1.9V VCELL=1.0V 80µA typ. 13µA typ. 0.5µA typ. 0.1µA max. 4.25V±50mV (detection for each cell) 200mV±60mV (detection for each cell) 2.4V±0.1V (detection for each cell) 3.0V±0.1V (detection for each cell) 150mV±15mV load release 0.9V max. Package SOP-8C, SOP-8D(MM1292 F) The box represents the rank resulting from the combination of protection functions. * Protection of Lithium Ion Batteries (two cells in series) MM1292 MITSUMI Applications 1. Cellular phones 2. Movies Pin Assignment 8 1 7 2 6 3 5 4 SOP-8C/SOP-8D 1 OC 2 GD 3 N.C 4 GND 5 TD 6 VL 7 CS 8 VH Pin Description Pin No. Pin Output Function Output pin for control of the charging control FET. When voltage detected between VH-VL or VL-GND goes over overcharge detection voltage (VALM), the output PNP- 1 OC Output TR (open collector output) is switched ON, and charging is prohibited by activating the element (NPN-TR, or N-ch FET) that switches the charging control FET to OFF. This operation continues until the voltage falls below VALM. Output pin for driving the discharge control FET. When voltage detected between VH- 2 GD Output VL and VL-GND goes over excess discharge voltage (VS), this pin goes H. When voltage detected between VH-VL and VL-GND falls below VS and the voltage between CS-GND is more than the voltage detected for an overcurrent (VCS), it goes L. Input pin for discharge detection. When voltage between DS-GND during charge 3 DS Input detection exceeds discharge detection voltage (VDS), OC output is switched OFF and charge control FET is switched ON. 4 GND Input Negative connection pin for the low side battery. It is also the GND pin for this IC. (The IC's reference power supply pin.) Over charge detection output non-induction time setting pin. The capacitor connected 5 TD Input between TD-GND is charged with constant current (ITC) during over charging. When TC pin voltage exceeds the threshold value (VTC), OC output is switched ON. 6 VL Input Positive connection pin for the low side battery, and negative connection pin for the high side battery. Overcurrent detection pin during discharge, and charging detection pin during power down. It detects discharge current using the source drain voltage (voltage 7 CS Input between CS-GND) of discharge control FET. Also, when the battery is charged with a current whose CS-GND voltage after power down exceeds the start-up voltage (VST), the bias current is drained to the interior circuit and operating status results. 8 VH Input Positive connection pin for the high side battery, and the IC's current input pin. Protection of Lithium Ion Batteries (two cells in series) MM1292 MITSUMI Block Diagram Note 1. 45µA max. (current consumption during operation of overcharge detection section) flows to input protection resistor R1. Note 2. 0.3µA max. (when cells are balanced) flows to input protection resistor R2. When the cells are not balanced, the current increases to wards correction. tOP Operating interval tST waiting interval t1 Data intake prohibition interval 30µA tOP Data intake prohibition interval t2 tST Current consumption Current consumption Average current 5µA Time Timing for setting non-induction time VCELL>4.25V Data processing VCELL<4.25V section Reset Non-induction time Overcharging identification VH GC VCS (battery-) Protection of Lithium Ion Batteries (two cells in series) MM1292 MITSUMI Timing Chart VALM VH VALM VALM VS VS VALM VALM VS VL VS Discharging Discharging state GD prohibited OR processing AND process Start-up signal generation timing operation stop operation starts Overcharging detection output Hold untill t (N+1) Overcharging identification Data latch TD OC unsettled (High impedance) Charging prohibited, constant current output (source current) unsettled Current consumption Absolute Maximum Ratings Item Storage temperature Operating temperature Power supply voltage OC pin applied voltage CS pin applied voltage Allowable power dissipation Symbol TSTG TOPR VOC max. VOVOUT VDCOUT Pd Rating -40~+125 -20~+70 -0.3~18 -10~VH -0.6~VH 300 Units °C °C V V V mA Protection of Lithium Ion Batteries (two cells in series) MM1292 MITSUMI Electrical Characteristics (unless otherwise specified, Ta=25°C) Item Current consumption 1 Current consumption 2 Current consumption 3 Current consumption 4 VL pin input voltage Overcurrent detection voltage Hysteresis voltage Overcharge detection voltage Discharge resumption voltage Starting voltage GD pin output voltage H GD pin output voltage L OC pin output current Overcurrent detection voltage Reset by overcurrent Overcurrent detection delay 1 Overcurrent detection delay 2 Excess discharge detection delay TC pin charge current Symbol IVH1 IVH2 IVH3 IVH4 IVL VALM VAL VS VDF VST VGDH VGDL IOCH VCS TC pin threshold value VTC Non-induction time for overcharge Operating limit voltage TOC VOPL TOC1 TOC2 TOD ITC1 Measurement Conditions Min. Typ. Max. Units VCELL=4.5V, ROC=270kΩ 80 100 µA VCELL=3.5V (normal) 13.0 20.0 µA VCELL=1.9V (During excess discharge) 0.5 0.8 µA VCELL=1.0V (During excess discharge) 0.1 µA VH=VL -0.3 0 0.3 µA Ta=-20°C~70°C 4.20 4.25 4.30 V VAL=VALMH-VALML 140 200 260 mV 2.30 2.40 2.50 V Discharge resumed through voltage rise 2.90 3.00 3.10 V Voltage applied between GND-CS pins -0.6 -0.5 V VCELL=3.5V, IL=10µA VH-0.3 VH-0.2 V VCELL=3.5V, IL=10µA, VCS=1V 0.2 0.3 V VCELL=4.5V 20 150 µA 135 150 165 mV load release 10 20 mS between CS-GND pins > 0.8V 30 100 µS 10 20 mS 30 50 80 nA VCELL=4.5V, VTC=0 5V 3.65 3.90 4.15 V VOC=L H CTC=0.012µF 0.5 1.0 1.5 S 0.9 V Note 1. For current consumption, it is assumed that high side cell voltage and low side cell voltage are identical. When the cell voltages differ, it is set by the higher voltage. 2. GD pin are high impedance when the current consumption is below the operating limit voltage. 3. When the circuit configuration calls for discharge resumption through charging, the discharge resumption voltage is 2.4V typ. Description of Operation [Outline] This IC is used for protecting lithium ion batteries (two cell series connection type). Overcharge detection, excess discharge detection, and overcurrent detection are built into each circuit. It controls the FET for discharge control and charge control (external N-MOS FET). There are four major operating modes. 1. Overcharge mode When the voltage between Vh-VI and VI-GND exceeds the overcharge voltage (VALM). 2. Normal mode When the voltage between Vh-VI and VI-GND exceeds the excess discharge voltage (VS) and is less than the over charge voltage (VALM). 3. Excess discharge mode When the voltage between Vh-VI and VI-GND is less than the excess discharge voltage (VS). 4. Overcurrent mode When the voltage between CS-GND is less than the overcurrent voltage (VCS). MITSUMI Protection of Lithium Ion Batteries (two cells in series) MM1292 [Operation] 1. Excess discharge detection circuit The H cell excess discharge detection circuit monitors the voltage between VH-VL, while the L cell excess discharge detection circuit monitors the voltage between VL-GND. When the voltage between VH-VL and VLGND exceeds VS, the operating state is maintained with bias current supplied from the bias circuit to the delay circuit, the output control circuit, the overcurrent detection circuit, and the overcharge detection circuit. When the battery current for either the H or L cell falls below VS, the current from the excess discharge detection circuit to the bias circuit is switched off. Also, the capacitor connected to the delay circuit's comparator (COD) input pin is charged using constant current. When this falls below the COD's reference input potential, the bias current to output control and current to the bias circuit are switched off. The excess discharge delay time (tOD) is set by the delay circuit and cannot be modified externally. When the bias circuit is in waiting mode, the hysteresis loop to the excess discharge detection circuit is switched off, and the detection voltage of the excess discharge detection circuit becomes discharge resumption voltage (VDCH). When the battery is being charged and the voltage between CS-GND during excess discharge mode falls below VST, however, start-up current is supplied to the bias circuit, and the hysteresis loop of the excess discharge detection circuit is connected. Therefore, the excess discharge detection circuit detection voltage becomes VS. Also, the overcharging detection circuit goes into waiting mode, so overcharging detection does not occur in overcharging mode. When the cell voltage of either the H or L cell exceeds VALM (one is excess discharging and the other is overcharging), the bias current is maintained in the overcharging detection circuit. Therefore, the overcharging is maintained until the current falls below VALM. 2. Overcharging Detection Circuit The timing (clock) for the waiting interval and operating interval is created by the timing generation circuit. In normal mode, the only blocks operating during the waiting interval are the input stages for the timing generation circuit and the data intake section. Other blocks operate only during the operation interval. The operation interval and the waiting interval are set at a ratio of 1:10, reducing power consumption. The voltage detection resistance of the overcharge detection circuit is switched on and off by the detection section's SW circuit. Therefore, current does not flow to detection resistors during waiting time, resulting in low current consumption during excess discharge mode. (Operating sequence) Bias current is supplied to the timing generation circuit and data intake section by the bias circuit of the excess discharge detection section during normal mode. The operation interval and the waiting interval are created by the timing generation circuit. During the operation interval, bias current is supplied to the excess charging detection circuit, and cell voltages of both the H and L cells are monitored. MITSUMI Protection of Lithium Ion Batteries (two cells in series) MM1292 When the cell voltage of either the H or L cell exceeds VALM, an overcharge detection signal is output to the data intake section, and a reset signal is prohibited from going to the data processing section. When more than two consecutive clocks of the excess charging detection signal are input to the data intake section, a determination is made that the overcharging detection signal has been properly input, and it is output to the next stage. This prevents noise and mistaken determinations of overcharging caused by excess cell voltage fluctuation. When the date intake section outputs the overcharging detection signal, the data charge section goes into operation. When more than two clocks of overcharging signals are input, this activates the latch on the overcharging signal. When the overcharging signal latch in the date latch section is activated, the next non-induction time circuit goes into operation. When this operates, the TD pin is charged by constant current (ITC). The TD pin potential and the threshold value (VTC) are compared by the non-induction time circuit comparator. When TD pin voltage exceeds VTC, the OC pin output stage becomes operable and OC pin output PNP-TR (open collector) is switched on. Also, bias current is supplied to the timing generation circuit and the operation of the overcharging detection circuit is maintained. When discharge occurs during overcharge mode (GND < DS pin), the discharge detection circuit charges the TD pin and non-induction time is reset. When cell voltage falls below VALM and the overcharging detection circuit signal is off, the reset prohibition is lifted. The reset signal is sent to the data intake and data latch sections and the non-induction time circuit, and normal mode is reinstated. A diode is built in between the OC pin and GND. When OC pin potential falls below GND terminal VF, current flows from the OC pin. Therefore, when battery pack voltage <<charging voltage (charging device), charging is immediately prohibited. (Generation conditions for the above mode vary depending on the external constant.) 3. Overcurrent Detection Circuit CS-GND Voltage Mode Delay Time Below VCS Normal Mode - VCS~VF Overcurrent Mode (Normal) tOC1 Above VF Overcurrent Mode (Short) tOC2 (VF : Voltage between built-in NPN-TR and base emitter) The overcurrent detection circuit operates during overcharging. Load current detects current flowing on FET equivalently, by monitoring the voltage between discharge control FET drain sources using the voltage between CS-GND. (Monitoring of voltage drop using FET ON resistor load current.) There are two modes for overcurrent detection : the normal mode and the short mode. In normal mode, when voltage between CS-GND is equal to that between VCS-Vf, overcharging detection output at this time is input to the internal delay circuit. When overcurrent detection continues for longer than overcurrent delay time 1 (tOC1), overcurrent mode is activated, and GD pin output goes L. (Discharge control FET ON) In short mode, when the voltage between CS-GND exceeds VF, the overcurrent mode operates without going through the delay circuit. The delay time is determined by the internal circuit operating speed (Overcurrent delay time 2 [tOC2], so the flow of overcurrent to the discharge control FET is for a short duration, limiting stress on the FET.) The VF has a temperature factor of-2mV/(C, so the switching level between normal and short mode varies with the ambient temperature. The overcurrent detection voltage (VCS) is fixed, so the current value for overcurrent detection changes according to discharge control FET ON resistance. Therefore, select an FET that conforms to the detection current. FET ON resistance is highly sensitive to temperature, due to overcurrent detection voltage, and the detection current changes due to FET heat emission resulting from ambient temperature and load current. In addition, users should be aware that FET ON resistance also changes due to the voltage between FET gate sources. (ON resistance rises when the voltage between gate sources falls.) Load release resets from overcurrent mode.