PD - 95444
Advanced Process Technology
l Surface Mount (IRF1010ES)
l Low-profile through-hole (IRF1010EL)
l 175°C Operating Temperature
l Fast Switching
l Fully Avalanche Rated
l Lead-Free
Description
IRF1010ESPbF
IRF1010ELPbF
l
HEXFET® Power MOSFET
D
VDSS = 60V
RDS(on) = 12mΩ
G
Advanced HEXFET® Power MOSFETs from International
Rectifier utilize advanced processing techniques to
achieve extremely low on-resistance per silicon area.
This benefit, combined with the fast switching speed and
ruggedized device design that HEXFET power MOSFETs
are well known for, provides the designer with an
extremely efficient and reliable device for use in a wide
variety of applications.
ID = 84A
S
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible onresistance in any existing surface mount package. The
D2Pak is suitable for high current applications because of its
low internal connection resistance and can dissipate up to
2.0W in a typical surface mount application.
The through-hole version (IRF1010EL) is available for lowprofile applications.
D2Pak
IRF1010ES
TO-262
IRF1010EL
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
IAR
EAR
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 srew
Max.
84
Units
59
330
200
1.4
± 20
50
17
4.0
-55 to + 175
A
W
W/°C
V
A
mJ
V/ns
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθJA
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Junction-to-Case
Junction-to-Ambient (PCB mount)**
Typ.
Max.
Units
–––
–––
0.75
40
°C/W
1
06/29/04
IRF1010ES/LPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
RDS(on)
VGS(th)
gfs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
60
–––
–––
2.0
69
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.064
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
12
78
48
53
IDSS
Drain-to-Source Leakage Current
LD
Internal Drain Inductance
–––
4.5
LS
Internal Source Inductance
–––
7.5
Ciss
Coss
Crss
EAS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Single Pulse Avalanche Energy
––– 3210
––– 690
––– 140
––– 1180
V(BR)DSS
∆V(BR)DSS/∆TJ
IGSS
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
12
mΩ VGS = 10V, ID = 50A
4.0
V
VDS = VGS, ID = 250µA
–––
S
VDS = 25V, ID = 50A
25
VDS = 60V, VGS = 0V
µA
250
VDS = 48V, VGS = 0V, TJ = 150°C
100
VGS = 20V
nA
-100
VGS = -20V
130
ID = 50A
28
nC
VDS = 48V
44
VGS = 10V, See Fig. 6 and 13
–––
VDD = 30V
–––
ID = 50A
ns
–––
RG = 3.6Ω
–––
VGS = 10V, See Fig. 10
Between lead,
–––
6mm (0.25in.)
nH
G
from package
–––
and center of die contact
–––
VGS = 0V
–––
VDS = 25V
–––
pF
ƒ = 1.0MHz, See Fig. 5
320 mJ IAS = 50A, L = 260µH
D
S
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– 84
showing the
A
G
integral reverse
––– ––– 330
S
p-n junction diode.
––– ––– 1.3
V
TJ = 25°C, IS = 50A, VGS = 0V
––– 73 110
ns
TJ = 25°C, IF = 50A
––– 220 330
nC
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11)
Starting TJ = 25°C, L = 260µH
RG = 25Ω, IAS = 50A, VGS =10V
(See Figure 12)
ISD ≤ 50A, di/dt ≤ 230A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
Pulse width ≤ 400µs; duty cycle ≤ 2%.
2
This is a typical value at device destruction and represents
operation outside rated limits.
This is a calculated value limited to TJ = 175°C .
Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 75A.
**When mounted on 1" square PCB (FR-4 or G-10 Material). For
recommended footprint and soldering techniques refer to application
note #AN-994
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IRF1010ES/LPbF
1000
1000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
100
4.5V
10
100
20µs PULSE WIDTH
TJ = 25 °C
1
0.1
1
10
4.5V
10
0.1
100
Fig 1. Typical Output Characteristics
RDS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
3.0
TJ = 25 ° C
TJ = 175 ° C
100
V DS = 25V
20µs PULSE WIDTH
5
6
7
8
9
10
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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10
100
Fig 2. Typical Output Characteristics
1000
4
1
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
10
20µs PULSE WIDTH
TJ = 175 ° C
11
ID = 84A
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20 0
VGS = 10V
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature ( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRF1010ES/LPbF
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
5000
Ciss
4000
3000
Coss
2000
Crss
1000
0
1
10
ID = 50A
VDS = 48V
VDS = 30V
VDS = 12V
16
12
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
100
0
40
60
80
100
120
140
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
1000
ID, Drain-to-Source Current (A)
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
TJ = 175 ° C
100
10
TJ = 25 ° C
1
0.1
0.0
V GS = 0 V
0.6
1.2
1.8
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
20
QG , Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
ISD , Reverse Drain Current (A)
C, Capacitance(pF)
Coss = Cds + Cgd
VGS , Gate-to-Source Voltage (V)
20
6000
2.4
100µsec
1msec
10
Tc = 25°C
Tj = 175°C
Single Pulse
1
1
10msec
10
100
1000
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRF1010ES/LPbF
100
VDS
LIMITED BY PACKAGE
VGS
ID , Drain Current (A)
80
D.U.T.
RG
60
RD
+
-VDD
V GS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
40
Fig 10a. Switching Time Test Circuit
20
VDS
90%
0
25
50
75
100
125
150
175
TC , Case Temperature ( °C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
1
D = 0.50
0.20
0.1
0.10
PDM
0.05
0.02
0.01
0.01
0.00001
t1
SINGLE PULSE
(THERMAL RESPONSE)
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.0001
0.001
0.01
0.1
t1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
15V
L
VDS
D.U.T
RG
IAS
20V
VGS
tp
DRIVER
+
V
- DD
A
0.01Ω
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
EAS , Single Pulse Avalanche Energy (mJ)
IRF1010ES/LPbF
800
ID
20A
35A
50A
TOP
BOTTOM
600
400
200
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature ( °C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.2µF
.3µF
VGS
QGS
D.U.T.
QGD
+
V
- DS
VGS
VG
3mA
IG
Charge
Fig 13a. Basic Gate Charge Waveform
6
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRF1010ES/LPbF
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T*
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
RG
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VGS
*
+
-
VDD
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
D=
P.W.
Period
[VGS=10V ] ***
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
[VDD]
Forward Drop
Inductor Curent
Ripple ≤ 5%
[ISD ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices
Fig 14. For N-channel HEXFET® power MOSFETs
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7
IRF1010ES/LPbF
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information
T HIS IS AN IRF530S WIT H
LOT CODE 8024
AS S EMBLED ON WW 02, 2000
IN T HE AS S EMBLY LINE "L"
INT ERNAT IONAL
RECT IFIER
LOGO
Note: "P" in as sembly line
pos ition indicates "Lead-Free"
PART NUMB ER
F530S
AS S EMBLY
LOT CODE
DAT E CODE
YEAR 0 = 2000
WEEK 02
L INE L
OR
INT E RNAT IONAL
RECT IF IER
LOGO
AS S E MB LY
LOT CODE
8
PART NUMBE R
F530S
DAT E CODE
P = DE S IGNAT ES LEAD-FRE E
PRODUCT (OPT IONAL)
YE AR 0 = 2000
WE EK 02
A = AS S E MB LY S IT E CODE
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IRF1010ES/LPbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
EXAMPLE: T HIS IS AN IRL 3103L
LOT CODE 1789
AS S EMB LED ON WW 19, 1997
IN T HE AS S EMB LY LINE "C"
Note: "P" in as s embly line
pos ition indicates "L ead-F ree"
INT ER NAT IONAL
RECT IF IER
LOGO
AS S EMBLY
LOT CODE
PART NU MBER
DAT E CODE
YEAR 7 = 1997
WEE K 19
LINE C
OR
INT E RNAT IONAL
RECT IFIER
L OGO
AS S EMBL Y
LOT CODE
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PART NU MBER
DAT E CODE
P = DES IGNAT ES LEAD-FREE
PRODUCT (OPT IONAL)
YEAR 7 = 1997
WEEK 19
A = AS S EMBL Y S IT E CODE
9
IRF1010ES/LPbF
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
11.60 (.457)
11.40 (.449)
0.368 (.0145)
0.342 (.0135)
15.42 (.609)
15.22 (.601)
24.30 (.957)
23.90 (.941)
TRL
10.90 (.429)
10.70 (.421)
1.75 (.069)
1.25 (.049)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039)
24.40 (.961)
3
30.40 (1.197)
MAX.
4
Data and specifications subject to change without notice.
This product has been designed and qualified for the industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 06/04
10
www.irf.com
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/