Sample & Buy Product Folder Support & Community Tools & Software Technical Documents CSD13306W SLPS537 – MARCH 2015 CSD13306W 12 V N Channel NexFET™ Power MOSFET 1 Features • • • • • • • 1 Product Summary Ultra Low on Resistance Low Qg and Qgd Small Footprint 1 × 1.5 mm Low Profile 0.62 mm Height Pb Free RoHS Compliant Halogen Free TA = 25°C TYPICAL VALUE Drain-to-Source Voltage 12 V Qg Gate Charge Total (4.5 V) 8.6 nC Qgd Gate Charge Gate-to-Drain RDS(on) Drain-to-Source On-Resistance VGS(th) Voltage Threshold Battery Management Load Switch Battery Protection This 8.8 mΩ, 12 V, N-Channel device is designed to deliver the lowest on resistance and gate charge in a small 1 x 1.5 mm outline with excellent thermal characteristics and an ultra low profile. Top View D mΩ VGS = 4.5 V 8.8 mΩ 1.0 V Device Qty Media Package Ship CSD13306W 3000 7-Inch Reel CSD13306WT 250 7-Inch Reel 1.0 mm × 1.5 mm Wafer Level Package Tape and Reel S S D Absolute Maximum Ratings TA = 25°C VALUE UNIT VDS Drain-to-Source Voltage 12 V VGS Gate-to-Source Voltage ±10 V ID Continuous Drain Current(1) 3.5 A IDM Pulsed Drain Current (2) 44 A PD Power Dissipation(3) 1.9 W Tstg Storage Temperature Range TJ Operating Junction Temperature Range –55 to 150 °C (1) Device Operating at a temperature of 105ºC (2) Min Cu Typ RθJA = 230ºC/W, Pulse width ≤100 μs, duty cycle ≤1% (3) Max Cu Typ RθJA = 65ºC/W D RDS(on) vs VGS Gate Charge 40 4.5 TC = 25° C, I D = 1.5 A TC = 125° C, I D = 1.5 A 35 VGS - Gate-to-Source Voltage (V) RDS(on) - On-State Resistance (m:) nC 12.9 (1) For all available packages, see the orderable addendum at the end of the data sheet. 3 Description G 3.0 VGS = 2.5 V Ordering Information(1) 2 Applications • • • UNIT VDS 30 25 20 15 10 5 0 ID = 1.5 A VDS = 6 V 4 3.5 3 2.5 2 1.5 1 0.5 0 0 1 2 3 4 5 6 7 8 VGS - Gate-To-Source Voltage (V) 9 10 D007 0 1 2 3 4 5 6 Qg - Gate Charge (nC) 7 8 9 D004 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. CSD13306W SLPS537 – MARCH 2015 www.ti.com Table of Contents 1 2 3 4 5 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Specifications......................................................... 1 1 1 2 3 6 Device and Documentation Support.................... 7 6.1 Trademarks ............................................................... 7 6.2 Electrostatic Discharge Caution ................................ 7 6.3 Glossary .................................................................... 7 7 5.1 Electrical Characteristics........................................... 3 5.2 Thermal Information .................................................. 3 5.3 Typical MOSFET Characteristics.............................. 4 Mechanical, Packaging, and Orderable Information ............................................................. 8 7.1 CSD13306W Package Dimensions .......................... 8 7.2 Tape and Reel Information ....................................... 9 4 Revision History 2 DATE REVISION NOTES March 2015 * Initial release. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated CSD13306W www.ti.com SLPS537 – MARCH 2015 5 Specifications 5.1 Electrical Characteristics (TA = 25°C unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT STATIC CHARACTERISTICS BVDSS Drain-to-Source Voltage VGS = 0 V, ID = 250 μA IDSS Drain-to-Source Leakage Current VGS = 0 V, VDS = 9.6 V 1 μA IGSS Gate-to-Source Leakage Current VDS = 0 V, VGS = 10 V 100 nA VGS(th) Gate-to-Source Threshold Voltage VDS = VGS, ID = 250 μA RDS(on) Drain-to-Source On-Resistance gƒs Transconductance 12 0.7 V 1.0 1.3 V VGS = 2.5 V, ID = 1.5 A 12.9 15.5 mΩ VGS = 4.5 V, ID = 1.5 A 8.8 10.2 mΩ VDS = 1.2 V, ID =1.5 A 15 S DYNAMIC CHARACTERISTICS CISS Input Capacitance COSS Output Capacitance CRSS Reverse Transfer Capacitance VGS = 0 V, VDS = 6 V, ƒ = 1 MHz Rg Qg Gate Charge Total (4.5V) Qgd Gate Charge Gate-to-Drain Qgs Gate Charge Gate-to-Source Qg(th) Gate Charge at Vth QOSS Output Charge td(on) Turn On Delay Time tr Rise Time td(off) Turn Off Delay Time tƒ Fall Time VDS = 6 V, ID = 1.5 A VDS = 6 V, VGS = 0 V VDS = 6 V, VGS = 4.5 V, ID = 1.5 A RG = 4 Ω 1050 1370 pF 324 421 pF 226 294 pF 4.2 8.4 Ω 8.6 11.2 nC 3.0 nC 1.1 nC 1.2 nC 3.3 nC 7 ns 11 ns 20 ns 8 ns DIODE CHARACTERISTICS VSD Diode Forward Voltage IS = 1.5 A, VGS = 0 V Qrr Reverse Recovery Charge trr Reverse Recovery Time 0.7 VDS= 6 V, IF = 1.5 A, di/dt = 200 A/μs 1.0 V 14.8 nC 23 ns 5.2 Thermal Information TA = 25°C unless otherwise stated THERMAL METRIC RθJA (1) (2) MIN TYP Junction-to-Ambient Thermal Resistance (1) 230 Junction-to-Ambient Thermal Resistance (2) 65 MAX UNIT °C/W Device mounted on FR4 material with minimum Cu mounting area Device mounted on FR4 material with 1 inch2 (6.45 cm2), 2 oz. (0.071 mm thick) Cu. Typ RθJA = 65°C/W when mounted on 1 inch2 of 2 oz. Cu. Copyright © 2015, Texas Instruments Incorporated Typ RθJA = 230°C/W when mounted on minimum pad area of 2 oz. Cu. Submit Documentation Feedback 3 CSD13306W SLPS537 – MARCH 2015 www.ti.com 5.3 Typical MOSFET Characteristics (TA = 25°C unless otherwise stated) Figure 1. Transient Thermal Impedance 4 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated CSD13306W www.ti.com SLPS537 – MARCH 2015 Typical MOSFET Characteristics (continued) (TA = 25°C unless otherwise stated) 25 IDS - Drain-To-Source Current (A) IDS - Drain-to-Source Current (A) 28 24 20 16 12 8 VGS = 2.5 V VGS = 3.8 V VGS = 4.5 V 4 0 0 0.1 0.2 0.3 0.4 VDS - Drain-to-Source Voltage (V) TC = 125° C TC = 25° C TC = -55° C 20 15 10 5 0 0.6 0.5 0.8 1 1.2 1.4 1.6 1.8 VGS - Gate-To-Source Voltage (V) D002 2 2.2 D003 VDS = 5 V Figure 2. Saturation Characteristics Figure 3. Transfer Characteristics 10000 Ciss = Cgd + Cgs Coss = Cds + Cgd Crss = Cgd 4 3.5 C - Capacitance (pF) VGS - Gate-to-Source Voltage (V) 4.5 3 2.5 2 1.5 1000 1 0.5 0 100 0 1 2 ID = 1.5 A 3 4 5 6 Qg - Gate Charge (nC) 7 8 9 0 2 D004 Figure 4. Gate Charge D005 Figure 5. Capacitance 24 RDS(on) - On-State Resistance (m:) VGS(th) - Threshold Voltage (V) 12 VDS = 6 V 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 -75 4 6 8 10 VDS - Drain-to-Source Voltage (V) TC = 25° C, I D = 1.5 A TC = 125° C, I D = 1.5 A 21 18 15 12 9 6 3 0 -50 -25 0 25 50 75 100 TC - Case Temperature (qC) 125 150 175 D006 0 1 2 3 4 5 6 7 8 VGS - Gate-To-Source Voltage (V) 9 10 D007 ID = 250 µA Figure 6. Threshold Voltage vs Temperature Copyright © 2015, Texas Instruments Incorporated Figure 7. On-State Resistance vs Gate-to-Source Voltage Submit Documentation Feedback 5 CSD13306W SLPS537 – MARCH 2015 www.ti.com Typical MOSFET Characteristics (continued) (TA = 25°C unless otherwise stated) 10 1.3 VGS = 2.5 V VGS = 4.5 V 1.2 1.1 1 0.9 0.8 0.7 -75 TC = 25qC TC = 125qC ISD - Source-To-Drain Current (A) Normalized On-State Resistance 1.4 1 0.1 0.01 0.001 0.0001 -50 -25 0 25 50 75 100 TC - Case Temperature (qC) 125 150 0 175 0.2 0.4 0.6 0.8 VSD - Source-To-Drain Voltage (V) D008 1 D009 ID = 1.5 A Figure 8. Normalized On-State Resistance vs Temperature Figure 9. Typical Diode Forward Voltage 4.5 IDS - Drain-to-Source Current (A) IDS - Drain-To-Source Current (A) 100 10 1 100 ms 10 ms 0.1 0.1 1 ms 100 µs 10 µs 1 10 VDS - Drain-To-Source Voltage (V) 50 D010 4 3.5 3 2.5 2 1.5 1 0.5 0 -45 -20 5 30 55 80 105 130 TC - Case Temperature (qC) 155 180 D011 Single Pulse, Max RθJA = 230°C/W Figure 10. Maximum Safe Operating Area 6 Submit Documentation Feedback Figure 11. Maximum Drain Current vs Temperature Copyright © 2015, Texas Instruments Incorporated CSD13306W www.ti.com SLPS537 – MARCH 2015 6 Device and Documentation Support 6.1 Trademarks NexFET is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 6.2 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 6.3 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 7 CSD13306W SLPS537 – MARCH 2015 www.ti.com 7 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 7.1 CSD13306W Package Dimensions NOTE: All dimensions are in mm (unless otherwise specified) Pinout 8 POSITION DESIGNATION C2, B2 Source A2 Gate A1, B1, C1 Drain Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated CSD13306W www.ti.com SLPS537 – MARCH 2015 Land Pattern Recommendation Ø 0.25 1 2 1.00 0.50 A B C 0.50 M0158-01 NOTE: All dimensions are in mm (unless otherwise specified) 7.2 Tape and Reel Information NOTE: All dimensions are in mm (unless otherwise specified) Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 9 PACKAGE OPTION ADDENDUM www.ti.com 19-Mar-2015 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) CSD13306W ACTIVE DSBGA YZC 6 3000 Green (RoHS & no Sb/Br) Call TI | SNAGCU Level-1-260C-UNLIM 13306 CSD13306WT ACTIVE DSBGA YZC 6 250 Green (RoHS & no Sb/Br) Call TI | SNAGCU Level-1-260C-UNLIM 13306 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 19-Mar-2015 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2015 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) CSD13306W DSBGA YZC 6 3000 178.0 8.4 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 1.1 1.6 0.72 4.0 8.0 Q2 CSD13306W DSBGA YZC 6 3000 180.0 8.4 1.18 1.68 0.83 4.0 8.0 Q2 CSD13306WT DSBGA YZC 6 250 180.0 8.4 1.18 1.68 0.83 4.0 8.0 Q2 CSD13306WT DSBGA YZC 6 250 178.0 8.4 1.1 1.6 0.72 4.0 8.0 Q2 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2015 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CSD13306W DSBGA YZC 6 3000 220.0 220.0 35.0 CSD13306W DSBGA YZC 6 3000 182.0 182.0 20.0 CSD13306WT DSBGA YZC 6 250 182.0 182.0 20.0 CSD13306WT DSBGA YZC 6 250 220.0 220.0 35.0 Pack Materials-Page 2 PACKAGE OUTLINE YZC0006 DSBGA - 0.625 mm max height SCALE 9.000 DIE SIZE BALL GRID ARRAY B A E BALL A1 CORNER D 0.625 MAX C SEATING PLANE 0.35 0.15 BALL TYP 0.08 C 0.5 TYP 0.25 TYP C SYMM 1 TYP B 0.5 TYP D: Max = 1.49 mm, Min = 1.43 mm E: Max = 0.996 mm, Min =0.936 mm A 6X 0.015 0.35 0.25 C A 1 2 SYMM B 4219522/A 02/2015 NanoFree Is a trademark of Texas Instruments. NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. TM 3. NanoFree package configuration. www.ti.com EXAMPLE BOARD LAYOUT YZC0006 DSBGA - 0.625 mm max height DIE SIZE BALL GRID ARRAY (0.5) TYP 6X ( 0.265) 2 1 A (0.5) TYP SYMM B C SYMM LAND PATTERN EXAMPLE SCALE:30X 0.05 MAX ( 0.265) METAL METAL UNDER SOLDER MASK 0.05 MIN ( 0.265) SOLDER MASK OPENING SOLDER MASK OPENING NON-SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED SOLDER MASK DETAILS NOT TO SCALE 4219522/A 02/2015 NOTES: (continued) 4. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints. For more information, see Texas Instruments literature number SNVA009 (www.ti.com/lit/snva009). www.ti.com EXAMPLE STENCIL DESIGN YZC0006 DSBGA - 0.625 mm max height DIE SIZE BALL GRID ARRAY (0.5) TYP 6X ( 0.25) 2 1 (R0.05) TYP A (0.5) TYP SYMM B METAL TYP C SYMM SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL SCALE:40X 4219522/A 02/2015 NOTES: (continued) 5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily performed. TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional restrictions. Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components in safety-critical applications. In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and requirements. Nonetheless, such components are subject to these terms. No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties have executed a special agreement specifically governing such use. Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of non-designated products, TI will not be responsible for any failure to meet ISO/TS16949. Products Applications Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energy and Lighting www.ti.com/energy Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video RFID www.ti-rfid.com OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com Wireless Connectivity www.ti.com/wirelessconnectivity Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2015, Texas Instruments Incorporated