ACE306A Low Voltage Detector with Built-in Delay Circuit Description The ACE306A Series is a series of high-precision voltage detectors with a built-in delay time generator of fixed time. developed using CMOS process. The detection voltage is fixed internally, with an accuracy of ±2.0%. Internal oscillator and counter timer can delay the release signal without external parts, delay times 210 ms Two output forms, NMOS open-drain and CMOS output are available. Features High-precision detection Voltage：2% Detection Voltage：1.5V~6.0V (10mV steps) Operating Voltage range：0.95V~7.0V Ultra-low current consumption：0.9μ[email protected](Typ.) Two Output forms: CMOS and N-channel open-drain (Active Low) Hysteresis characteristics:-VDET*5%(Typ.) Delay time:210 ms(Typ.) Application Memory battery back-up circuits Power-on reset circuits Power failure detection Power monitor for portable equipment such as notebook computers, digital cameras, PDA, and cellular phones. Constant voltage power monitors for cameras, video equipment and communication devices Power monitor for microcomputers and reset for CPUs Absolute Maximum Ratings (Ta=25°C, unless otherwise specified) Parameter Max Unit VSS－0.3 ~ VSS＋8 V VSS－0.3 ~ VSS＋8 V 250 250 mW 500 500 mW 500 500 mW 250 250 mW －40 ~＋85 °C －40 ~＋125 °C Power supply voltage(VDD) Output voltage(VOUT) Power dissipation(PD) Operating ambient temperature(Topr) Storage temperature(Tstg) Soldering Temperature & Time(Tsolder) 260℃, 10s VER 1.1 1 ACE306A Low Voltage Detector with Built-in Delay Circuit Packaging Type SOT-23-3L 3 1 2 SOT-23-3 Description V DD 3 1 2 VOUT V SS Function Voltage input Pin Voltage detection output pin GND Pin Ordering information ACE306A X XXX XX + H Halogen - free Pb - free Package type BM: SOT-23-3L Detector Voltage: 090…0.9V / 100…1.0V / 263…2.63V / 300…3.0V / 465…4.65V…..600…6.0V (In 0.1V step) Output type: N: Nch C: CMOS VER 1.1 2 ACE306A Low Voltage Detector with Built-in Delay Circuit Block diagram N channel open-drain CMOS output Electrical Characteristics (Ta=25°C, unless otherwise specified) Reference data Min. Typ. Max. Symbol Parameter Conditions -VDET Detection Voltage*1 - −VDET(S) ×0.98 −VDET(S) −VDET(S) ×1.02 V VHYS Hysteresis Width - 0.02× −VDET(S) 0.05× −VDET(S) 0.08× −VDET(S) V ACE306A C/N20~26 - 1.0 3.0 μA Lss Current Consumpti ACE306A C/N26~39 - 1.2 3.2 μA ACE306A C/N39~60 - 1.5 3.5 μA 0.95 - 7 V VDD LOUT VDD=-VDET+ 0.5V Operating Voltage Output current - Unit NMOS: VOUT =0.5 V VDD=- VDET0.5 V ACE306A C/N20~26 3.0 13.0 - mA ACE306A C/N26~39 3.0 15.0 - mA ACE306A C/N39~60 3.0 18.0 - mA PMOS： VDD-VOUT= ACE306A C/N20~26 1.5 4.0 - mA ACE306A C/N26~39 1.5 - mA 6.0 VER 1.1 3 ACE306A Low Voltage Detector with Built-in Delay Circuit 0.5V VDD=-VDET +0.5V ILEAK TPLH Leakage Current Temperature Coefficient Delay time ACE306A C/N39~60 1.5 Only for NMOS open-drain output products, VDD =8.0 V, VOUT =8.0 V 8.0 - mA - 1.0 μA Ta=−40°C ~+85°C - ±120 ±360 ppm/°C Vin=Vdet+0.5V 130 210 290 ms *1. −VDET: Actual detection voltage value, −VDET(S): Specified detection voltage value Function description When a voltage higher than the release voltage (+VDET) is applied to the voltage input pin (VDD), the voltage will gradually fall. When a voltage higher than the detect voltage(-VDET) is applied to VDD, output (VOUT) will be equal to the input at VDD.Note that high impedance exists at VOUT with the N-channel open drain configuration. If the pin is pulled up, VOUT T will be equal to the pull up voltage. When VDD falls below -VDET, VOUT will be equal to the ground voltage (VSS) level (detect state). Note that this also applies to N-channel open drain configurations. When VDD falls to a level below that of the minimum operating voltage (VMIN) output will become unstable. Because the output pin is generally pulled up with N-channel open drain configurations, output will be equal to pull up voltage. When VDD rises above the VSS level (excepting levels lower than minimum operating voltage), VOUT will be equal to VSS until VDD reaches the +VDET level. Although VDD will rise to a level higher than +VDET, VOUT maintains ground voltage level via the delay circuit. Following transient delay time, VDD will be output at VOUT. Note that high impedance exists with the N-channel open drain configuration and that voltage will be dependent on pull up VER 1.1 4 ACE306A Low Voltage Detector with Built-in Delay Circuit Typical application Circuits C:CMOS output： VDD ACE306A CMOS CPU OUT VSS NMOS open-drain: ACE306A ACE306A Forbidden Circuits VER 1.1 5 ACE306A Low Voltage Detector with Built-in Delay Circuit ACE306A Packing Information SOT-23-3L Symbol A A1 Dimensions ln Millimeters Dimensions ln Inches Min Max Min Max 1.050 1.250 0.041 0.049 0.000 0.100 0.000 0.004 VER 1.1 6 ACE306A Low Voltage Detector with Built-in Delay Circuit A2 b c D E E1 e e1 L Θ 1.050 1.150 0.300 0.500 0.100 0.200 2.820 3.020 1.500 1.700 2.650 2.950 0.950(BSC) 1.800 2.000 0.300 0.600 。 。 0 8 0.041 0.045 0.012 0.020 0.004 0.008 0.111 0.119 0.059 0.067 0.104 0.116 0.037(BSC) 0.071 0.079 0.012 0.024 。 。 0 8 VER 1.1 7 ACE306A Low Voltage Detector with Built-in Delay Circuit Notes ACE does not assume any responsibility for use as critical components in life support devices or systems without the express written approval of the president and general counsel of ACE Electronics Co., LTD. As sued herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and shoes failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. ACE Technology Co., LTD. http://www.ace-ele.com/ VER 1.1 8