Rohm BD18377EFV-ME2 12 channel constant current led driver ic Datasheet

12 Channel Constant Current
LED Driver IC
BD18377EFV-M
●General Description
The BD18377EFV-M is a serial input controlled
constant-current LED driver with 10V output rating. 6 bit
current calibration is available for each output while a
global PWM performs dimming on all outputs
simultaneously. The BD18377EFV-M is able to perform
diagnostic (open / short load / temperature) checks to
detect LED failure and over temperature on chip. The
settings of all internal registers can be read out to verify
written information at any time.
●Key Specifications
Input voltage range:
3.0V to 5.5V
Output voltage range:
0.5V to 10V
Output Current range/channel:
15mA to 50mA
Output Current accuracy at 30mA:
3.5% (Typ.)
Min PWM ON Time:
5uS
Maximum circuit current:
5mA
Maximum clock frequency:
1250KHz
Operating temperature range:
-40℃ to +105℃
●Features
(Note1)
AEC-Q100 Qualified
Constant current output of up to 50mA per
output channel.
4-line Serial Control + Enable Signal.
PWM dimming 0.1-100% global.
6 Bit LED brightness adjustment on each channel.
Diagnostic output on LED OPEN and SHORT for
each channel.
Over Temperature Protection and thermal
feedback.
Read-back of all register settings.
Outputs may be connected in parallel to achieve
more than 50mA into the load.
Slew limited switching reduces conducted and
radiated Noise (EMI).
Daisy chain compatible with BD18377EFV-M
and/or BD8377FV-M (12ch LED driver IC).
●Package
HTSSOP-B20
W(Typ.) x D(Typ.) x H(Max.)
6.50mm x 6.40mm x 1.00mm
(Note1: Operating Temperature Grade 2)
Figure 1. HTSSOP-B20 Package
●Applications
Automotive illumination
Consumer electronics illumination
○Product structure:
:Silicon monolithic integrated circuit
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○This product is not designed protection against radioactive rays
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●Typical Application Diagram
Figure 2. Application diagram for BD18377EFV-M
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●Pin Configuration
(TOP VIEW)
Figure 3. Pin configuration
●Pin Description
Pin
Number
1
Terminal name
2
SERIN
3
D0
Output terminal 0
4
D1
Output terminal 1
5
D2
Output terminal 2
6
D3
Output terminal 3
7
D4
Output terminal 4
8
D5
Output terminal 5
9
IREF
10
PWM_B/OEN_B
11
SEROUT
Serial data output terminal
12
LATCH
Latch signal input terminal
13
D6
Output terminal 6
14
D7
Output terminal 7
15
D8
Output terminal 8
16
D9
Output terminal 9
17
D10
Output terminal 10
18
D11
Output terminal 11
19
CLK
Serial communication clock
20
GND
GND terminal
VCC
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Function
Power supply voltage input terminal
Serial data input terminal
Set nominal output current via external resistor
PWM dimming/output enable (active low)
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●Block Diagram
Figure 4. Block Diagram of BD18377EFV-M
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●Absolute Maximum Ratings
Item
Power Supply Voltage
Output Voltage (Pin No: 3~8, 13~18)
Input Voltage (Pin No: 2, 9, 10, 12, 19)
Operating Temperature Range
Storage Temperature Range
Junction Temperature
Drive Current
Electrostatic-Discharge Capability Human
Model
Body
Electrostatic-Discharge Capability Machine Model
Symbol
VCC
VDmax
VIN
TOPR
TSTG
TJmax
IDmax
Value
7
10
-0.3 to VCC
-40 to +105
-55 to +150
150
60
Unit
V
V
V
°C
°C
°C
mA
ESDHBM
2000
V
ESDMM
200
V
●Recommended Operating Ratings (Ta = 25°C)
Item
Power Supply Voltage
Drive Current at 100% brightness
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Symbol
Min
3.0
15
VCC
ID
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Standard Value
Typ
30
Max
5.5
50
Unit
V
mA
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●Electrical Characteristic(s)
(Unless otherwise specified, Ta=-40~105°C VCC=3.0~5.5V)
Standard Value
Item
Symbol
Min
Typ
Max
[Output D0~D11] (Pin No: 3~8, 13~18)
Output current
1
accuracy
RDIO
(Relative)
Output current
accuracy absolute,
2
Device to Device
AD2DIO
Output current
accuracy relative,
2
Channel to Channel
RC2CDIO
Output current
temperature shift
DTIO
Output current supply
voltage shift
DVIO
Output leakage
Current
Minimum output
voltage level
Dynamic settling time
of ID
Ton error
3
(Absolute)
(Relative)
4.0
1.6
2.1
-8.8
-2.3
-4.0
-
8.9
2.5
4.3
-
-
1.5
%
%
%
%
IDLeak
-
-
0.1
uA
VDmin
-
0.44
0.40
0.65
0.51
V
0.3
0.5
2
us
-1
-
0
us
-
0.26
-
us
ST
Ta = 25°C
ID = 30 mA
Calibration = 63
VCC = 3.0V-3.6V/4.5V-5.5V
VD=10V
Ta=25°C
VCC=3.3V
VCC=5V
From 10% to 90% of ID
max.
From PWM_B=10%VCC to
ID=10%IDmax
VHYS
-
0.1 x
VCC
-
V
Serial clock
frequency
fCLK
-
-
1250
kHz
tON
5
-
-
us
-
-
1
uA
Minimum requirement for
OPEN/SHORT detection.
For pins 2,10,12,19
0.9 x
VCC
0.95 x
VCC
0.05 x
VCC
1 x VCC
V
ISEROUT=-4mA
0.1 x
VCC
V
ISEROUT=4mA
Output voltage Low
VOH
VOL
0
-
VCC x
0.45
VCC x
0.35
VCC=3.0V
ID = 30 mA
Calibration = 63
Hysteresis width
VTL
VCC x
0.35
VCC x
0.25
Ta = 25°C
VCC = 3.3V
Calibration = 63
ID = 15 mA
ID = 30 mA
ID = 50 mA
Ta = 25°C
VCC = 3.3V
Calibration = 63
ID = 15 mA
ID = 30 mA
ID = 50 mA
Ta = 25°C
VCC = 3.3V
Calibration = 63
ID = 15 mA
ID = 30 mA
ID = 50 mA
VTH
Output Voltage high
5
-
1.76
Input leakage current
IINLeak
[Logic output] (Pin No: 11)
4
-4.2
-1.7
-2.5
%
Conditions
High going threshold
voltage
Low going threshold
voltage
4,5
3
9.8
4.7
7
-
RT
PWM ON Time
2
-
-
Delay time PWM_B
DT1
to ID
[Logic input] (Pin No: 2, 10, 12, 19)
1
-
Unit
V
V
This is duplicate information with respect to AD2DIO and RC2CDIO.
This parameter is guaranteed by design.
∆t between tRISE and tFALL of ID relative to the pulse width of PWM.
Please note that the PWM signal is active LOW therefore, the tON time denotes the period when the signal is at LOW level.
This period is derived from a PWM frequency of 200Hz and a minimum duty cycle of 0.1%.
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Item
Symbol
Min
Standard Value
Typ
Max
Unit
Conditions
Serial Data Input,
fCLK=1.25MHz,
SEROUT=OPEN,
[DEVICE]
6
Circuit Current
ICC
-
-
5.0
mA
Under voltage lock out
Minimum glitch
2,6
Reject
SHORT detection
threshold
SHORT detection
bypass current
OPEN detection
threshold
Reference Voltage
Temperature
monitoring accuracy
Temperature
2
hysteresis
UVLO
2.4
-
2.7
V
tglitch_reject
-
3
-
us
VSCth
3.9
-
4.3
V
ISC
5
6.3
10
uA
VOCth
110
-
390
mV
VREF
1.1
1.2
1.23
V
For OPEN / SHORT
detection.
PWM_B=”LOW” AND
channel is enabled
Channel is enabled,
VD≤4.3V.
PWM_B=”LOW”, channel is
enabled
REXT connected to IREF pin.
TMON
-
±10
-
%
At 125°C and 150°C
Thyst
-
10
-
°C
At 125°C and 150°C
An OPEN or SHORT that lasts for less than this time will be rejected.
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●Typical Performance Curves
4.0
55.00
50.00
45.00
Output Current: ID [mA]
Circuit Current: Icc [mA]
Temp = 105°C
3.0
Temp = -40°C
2.0
1.0
Temp = 25°C
40.00
35.00
30.00
25.00
20.00
15.00
10.00
5.00
0.00
0.0
3.00
0
3.50
4.00
4.50
Supply Voltage: Vcc[V]
5.00
5.50
Figure 5. ICC vs. VCC over Temp
8
16
24
C li r ti
32
40
48
56
64
C
Figure 6. ID vs. Cal over at VCC = 5.0V
55.0
VCC = 5.0V
Output Current: ID [mA]
50.0
VCC = 3.3V
45.0
40.0
35.0
30.0
-50
-30
-10
10 30
Ta [℃]
50
70
90
110
Figure 7. ID Vs Temp over VCC
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●Functional Description
Constant current driver block
The BD18377EFV-M uses a constant current output driver with a provision for dot calibration per channel. The constant
current ID is derived from referring an internal reference voltage over the external resistor REXT, see Equation 1. Reference
current. The external resistor is chosen to set a reference current IREF, in the range of 30~100uA. In operating conditions
the resistor value is in the range of 12k-40kΩ. The maximum output current IDmax is 500 x IREF, see Equation 2.
The external resistor value, the 6 bit current calibration (CAL) and output current relate as follows: see Equation 3.
I REF =
VREF
REXT
Equation 1. Reference current
I D max = I REF ⋅ 500
Equation 2. Maximum output current
ID =
I D max ⋅ (CAL + 1)
64
Equation 3. Output current as function of CAL value
I LED = I D + I SC , where I SC ≤
VD
430kΩ
Equation 4. Total LED current.
Finally the total LED current, including the offset current due to the SHORT detection is shown in Equation 4. Note that the
short detection current flows at all times when the channel is enabled.
For example in case of a maximum output current of 20mA REXT shall be 30kΩ.
See Figure 8 the global reference current, IREF, is mirrored into the channel current to generate a local reference voltage.
The error amplifier A1 forces the voltage across the LED current sense resistor to match the local reference voltage. The
output device is scaled to give 6 bit output range. Thus a factor IDmax/ID can be achieved in the range from 0 to 63 in 64 steps.
The output devices driving analog current amplitude are timed by the global PWM.
The active drivers have a low leakage current to keep the LED in firm OFF condition when the channel is not active. To
ensure low leakage current ( IDLeak ), the gate voltage of the output transistors will be pulled low during MASK = LOW or
PWM_B = HIGH or when the device is not required by the CAL setting.
When there is an open load, half open load or a weak battery supply, the channel will be unable to sink enough current. In
this case the output of error amplifier A1 will latch to maximum voltage pulling the output voltage VD below VOCth. This is
detected by comparator A2 as an OPEN event. There is a glitch reject filter that will reject any OPEN that is < tglitch_reject.
The voltage VD at pin DN (Figure 8) is divided by a high ohmic voltage divider and compared to a reference voltage in order
to detect the short circuit. When comparator A3 detects a voltage at pin Dn > VSCth this indicates a LED SHORT circuit
condition. SHORT detection requires a minimum PWM ON time > tON. This is because the glitch reject filter will reject any
SHORT that is < tglitch_reject. The same circuit is used for both OPEN and SHORT rejection and therefore the period is the
same.
Both the OPEN and SHORT detection circuits are disconnected during PWM_B = “HIGH” or MASK = LOW, but the SHORT
detection bypass current will flow when MASK _ HIGH.
The status of OPEN, SHORT for each channel can be read out from the OPEN / SHORT registers using the command
[READ OPEN] and [READ SHORT].
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Figure 8. Block diagram of global VREF and per-channel regulation loop
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Protection Circuitry
Types of POR
In the BD18377 a POR event can occur for one of three reasons:
•
•
•
Low supply voltage which will occur due to either startup or UVLO.
When the die temperature exceeds 150°C
When the controller sends a command
These three situations are discussed below.
POR at Startup or UVLO
At startup, which is defined here as first application of supply voltage VCC, or when VCC < UVLO (UVLO refers to Under
Voltage Lock Out), a POR event (Power ON Reset) will occur. The expected behavior is shown in Table 1.
In this case the analog circuits are UNDEFINED and therefore the reported status of the diagnostics registers (TSD150,
TSD125, SHORT_FLAG, OPEN_FLAG, SHORT and OPEN) is UNDEFINED. It is mandatory to use the command
[SOFTWARE RESET].
During RESET:
•
The device cannot receive data
•
The SEROUT is held active LOW, so the device cannot transmit data
Therefore communication between the controller and the device is lost during a POR. Any data transmitted during this period
will be lost. Since SEROUT is held low, the controller must send, and receive, any command that is NOT 0000 to confirm
communication is active.
The state machine inside the digital is undefined and the device will recognize the first two bits it receives as “00”. It is
therefore recommended to send a dummy byte or a dummy command at startup to put the device into a known state before
beginning of programming.
When the POR is released, the MASK, CAL, MASK LOCK, CAL LOCK and SHORT_MASK registers will have their default
values as shown in Table 1. These values will put the device into a safe state.
The POR flag in the STATUS register is set HIGH, so the event is visible to the controller on the next [READ STATUS]
command. The POR flag can be reset by the command [RESET_POR].
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STATUS Register
Table 1. Default registers values
Register
STARTUP / UVLO
TSD150
SOFTWARE
CALIBRATION<5:0>
<000000>
<000000>
<000000>
MASK<11:0>
<000000000000>
<000000000000>
<000000000000>
0
TSD125
UNDEFINED.
<1>
depends upon Die
temp
1
TSD150
UNDEFINED.
<1>
depends upon Die
temp
2
CALIBRATION LOCK
<0>
<0>
<0>
3
MASK LOCK
<0>
<0>
<0>
4
ANY-SHORT-FLAG
UNDEFINED.
5
ANY-OPEN-FLAG
UNDEFINED.
6
POR-FLAG
SHORT MASK<11:0>
<1>
<1>
<1>
<111111111111>
<111111111111>
<111111111111>
SHORT<11:0>
UNDEFINED.
OPEN<11:0>
UNDEFINED.
COMMUNICATION INTERRUPT?
YES
YES
NO
DIAGNOSTIC RESET?
MANDATORY
RECOMMENDED
AUTOMATIC
Die Temp < 150°C
end of command
RELEASE CONDITION
VCC > UVLO
threshold
When the controller detects an unexpected POR flag it is recommended to start a defined start up sequence.
Check for OTP anywhere else. Degrees Celsius
POR (due to TSD)
A POR event (Power ON Reset) can occur due to die temperature over 150°C (TSD150). This is referred to as TSD150
(Thermal Shut Down at 150°C). The conditions are as shown in Table 1. If the die temperature is > 150°C, the TSD150 and
POR flag will be set HIGH.
The channel diagnostics (OPEN and SHORT) will be UNDEFINED.
The TSD125, TSD150 and POR flags are held unchanged until cleared explicitly by command [RESET STATUS]. This is to
ensure that a POR due to temperature is always visible to the controller. The circuit will then report the current die
temperature.
After a POR due to TSD150, the delay until POR release will depend upon the time required for the die temperature to drop
below 150°C.
The device monitors its own die temperature and stores it internally (see Table 2). When the die temperature exceeds 125°C
the TSD125 bit will set high. This bit can be read by the controller. In this case the controller can take steps to reduce power
dissipation such as to reduce PWM duty, reduce CAL settings or MASK channels to prevent thermal shutdown. At
temperatures between 125°C and 150°C there is no limitation or change to the functionality of BD18377EFV-M.
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Table 2. Coding of temperature monitoring
Name
TDS150
TSD125
Bit
STATUS<1>
STATUS<0>
0
0
Die temperature < 125°C
0
1
125°C < die temperature < 150°C
1
0
reserved
1
1
OTP active, die temperature > 150°C
Comment
The accuracy of temperature monitoring is TMON, while the variation at 125°C threshold is correlated to the one at 150°C. The
hysteresis is Thyst.
De-activation of shutdown at TSD150
The following commands disable the shutdown at TSD150:
Hex
[F832]
[FD04]
Bit
1111 1000 0011 0010
1111 1101 0000 0100
[UNLOCK]
[TSD SHUTDOWN]
In this setting the TSD150 flag can be set but no shutdown will occur.
•
•
•
•
This setting is reset by POR, and must be set again AFTER any POR event.
It is recommended that when detecting TSD125 the controller should immediately take steps to reduce power
dissipation to avoid damage.
When TSD150 is detected it is mandatory to take action to reduce power dissipation to avoid damage because
the device may continue to heat up and has no self-protection.
The first command [F832] unlocks the register for ONE command only. This command must be followed by the correct
TSD_SHUTDOWN command [FC04].
This setting can be used to maintain communication continuity during a TSD150 in a daisy chain application.
POR (due to command [SOFTWARE RESET])
The controller can send a command [SOFTWARE RESET]. The command is executed on the latch edge. The command
[SOFTWARE RESET] also executes the command [STATUS RESET]. Communication between the controller and the
device is not lost due to a POR command. The POR flag in the STATUS register is set HIGH.
The channel diagnostics (OPEN and SHORT) will be UNDEFINED.
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LED Short Detection
A SHORT is detected when voltage VD at the output pin rises above VSCth for a period greater than tglitch_reject. This time is
short enough to allow SHORT detection at minimum tON. This voltage is based upon the assumption of a LED forward
voltage drop below VLED (5V±4%). If a higher VLED or more than one LED per channel is used this SHORT detection
threshold is inappropriate and can be either ignored by the controller or can be MASK’ed for ANY-SHORT detection. This
functionality is therefore application dependent. The SHORT flag for the channel will be always set when VD at the output pin
rises above VSCth, It is only ANY-SHORT flag for which the shorts can be masked. The SHORT detection bypass current, ISC,
is flowing whenever the channel is enabled (independent of PWM), and will cause a maximum output current offset of about
10µA, and is given by Equation 5. Current offset when short detection active:
I SC ≤
VD
RSHORT det
, when
RSHORT det ≥ 430kΩ
Equation 5. Current offset when short detection active
After a detected LED SHORT the corresponding bit of the SHORT detection register and the ANY_SHORT bit (unless
MASKed) will remain high until it is cleared by the controller.
LED Open Detection
When the channel cannot achieve the programmed output current Io value, the error amplifier output voltage will rise to
maximum forcing the output device fully ON, pulling VD low. This indicates an open load, a half open load or a weak battery
supply. An OPEN is detected when voltage VD at the output pin falls below VOCth for a period greater than tglitch_reject. This time
is short enough to allow OPEN detection at minimum tON.
In this architecture it is not possible to distinguish between a true open circuit and the situation when there is not enough
headroom on VLED to drive the required LED forward voltage. Therefore on a low VLED, LEDs with sufficient forward voltage
will always be reported as “OPEN”.
After a LED open has been detected the corresponding bit of the OPEN detection register and ANY_OPEN flag remain high
until it is cleared by the controller.
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Dimming
Figure 9. Illustration of Calibration and dimming of Output Current describes the relation between calibration and dimming.
The maximum current, IDmax, is set by the reference resistor, REXT. Setting the calibration bits will change the value of the
switched current in the corresponding channel whilst controlling the PWM_B/OEN_B input will modulate the current in all
active channels in the time domain.
PWM is fully independent of the clock signal.
In the example below, D0 and D1 have been calibrated below the maximum current set by REXT while D1 has been set to
less output current than D0. At the same time, brightness of both channels is set by the global PWM_B/OEN_B pin.
The independence between the value of the switched current and the switching duty cycle ensures that calibration changes
will not influence the dimming curve or cause any harmonic distortion. Output to input linearity is ensured by equal rising and
falling propagation delays.
IDmax
ID
6bit amplitude +REXT
PWM
T=1/fPWM
time
D0
D1
Figure 9. Illustration of Calibration and dimming of Output Current
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Serial Communication
The serial port is used to write data to, read diagnostic status from and configure settings of the IC by transferring the input
data to the desired address. During normal operation a 4-bit serial address and 12-bit serial data is written into the 16-bit
shift register. The shift register advances on CLK rising edges, converting the 16 most recent inputs to parallel signals on the
LATCH rising edge. In order to provide extended functionality there are two addresses where 4 bits of the serial data are
interpreted as sub addresses. These sub addresses access functions instead of registers.
At a rising edge on the LATCH input addresses and sub-addresses are interpreted by a decoder which controls data transfer
between shift- and storage registers. Depending on the address valid data is conveyed from or to the appropriate latch or a
command is interpreted.
When a read address is latched data is read out from a storage register and shifted out of SEROUT to the microcontroller or
daisy chained BD18377EFV-M. Since for each address the BD18377EFV-M shifts out a fixed amount of data at the end of a
write/read cycle it is possible to send different address codes to each IC in a daisy chain.
The content of calibration, mask, short mask and diagnostic data can be read on SEROUT pin.
During the exchange of information the LED outputs do not flicker or dim.
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Datasheet
Register Map
Table 3. Address Codes and Description
Address
<15:12>
0
1
2
3
4
5
6
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
8
9
A
B
C
D
E
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
Sub Address
Data
<11:8>
<7:4>
<3:0>
CAL1<5:0>
CAL0<5:0>
CAL3<5:0>
CAL2<5:0>
CAL5<5:0>
CAL4<5:0>
CAL7<5:0>
CAL6<5:0>
CAL9<5:0>
CAL8<5:0>
CAL11<5:0>
CAL10<5:0>
MASK<11:8>
MASK<7:4>
MASK<3:0>
0
X
X
1
X
X
2
X
X
3
X
X
4
X
X
5
X
X
6
S_MASK<7:4>
S_MASK<3:0>
7
X
S_MASK<11:8>
8
X
X
9
X
X
A
X
X
B
X
X
C
X
X
D
X
X
E
X
X
F
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
1
X
X
2
X
X
3
X
X
4
X
X
5
X
X
6
X
X
7
X
X
8
X
X
9
X
X
A
X
X
B
X
X
C
X
X
D
X
X
E
X
X
F
X
X
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Name
WRITE CAL1/CAL0
WRITE CAL3/CAL2
WRITE CAL5/CAL4
WRITE CAL7/CAL6
WRITE CAL9/CAL8
WRITE CAL11/CAL10
WRITE MASK
LOCK CAL
UNLOCK CAL
LOCK MASK
UNLOCK MASK
RESET POR
RESET STATUS
WRITE SHORT_MASK 7:0
WRITE SHORT_MASK 11:8
SOFTWARE POR
RESERVED
Unused
Unused
Unused
Unused
Unused
Unused
READ CAL0/CAL1
READ CAL2/CAL3
READ CAL4/CAL5
READ CAL6/CAL7
READ CAL8/CAL9
READ CAL10/CAL11
READ MASK
READ STATUS Flags
Unused
READ SHORT 7:0
READ SHORT 11:8
READ OPEN 7:0
READ OPEN 11:8
READ SHORT_MASK 7:0
READ SHORT_MASK 11:8
RESERVED
Unused
Unused
Unused
Unused
Unused
Unused
Unused
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BD18377EFV-M
Datasheet
Table 4. Communication address overview
INPUT
Sub-address/
Data
HEX d11 d10 d9 d8
0
x
x x x
1
x
x x x
2
x
x x x
3
x
x x x
4
x
x x x
5
x
x x x
6
x
x x x
7
0 0 0 0
7
0 0 0 1
7
0 0 1 0
7
0 0 1 1
7
0 1 0 0
7
0 1 0 1
7
0 1 1 0
7
0 1 1 1
7
1 0 0 0
7
1 0 0 1
7
1 0 1 0
7
1 0 1 1
7
1 1 0 0
7
1 1 0 1
7
1 1 1 0
7
1 1 1 1
8
dc dc dc dc
9
dc dc dc dc
A dc dc dc dc
B dc dc dc dc
C dc dc dc dc
D dc dc dc dc
E dc dc dc dc
F
0 0 0 0
F
0 0 0 1
F
0 0 1 0
F
0 0 1 1
F
0 1 0 0
F
0 1 0 1
F
0 1 1 0
F
0 1 1 1
F
1 0 0 0
F
1 0 0 1
F
1 0 1 0
F
1 0 1 1
F
1 1 0 0
F
1 1 0 1
F
1 1 1 0
F
1 1 1 1
Addr
Data
OUTPUT
Sub-address/
Data
HEX d11 d10 d9 d8 d7 d6 d5
u
u u u u u u u
u
u u u u u u u
u
u u u u u u u
u
u u u u u u u
u
u u u u u u u
u
u u u u u u u
u
u u u u u u u
u
u u u u u u u
u
u u u u u u u
u
u u u u u u u
u
u u u u u u u
u
u u u u u u u
u
u u u u u u u
u
u u u u u u u
u
u u u u u u u
u
u u u u u u u
Reserved
Unused
Unused
Unused
Unused
Unused
Unused
u
x x x x x x x
u
x x x x x x x
u
x x x x x x x
u
x x x x x x x
u
x x x x x x x
u
x x x x x x x
u
x x x x x x x
u
u u u u x x x
Unused
u
u u u u x x x
u
u u u u u u u
u
u u u u x x x
u
u u u u u u u
u
u u u u x x x
u
u u u u u u u
Reserved
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Addr
d7
x
x
x
x
x
x
x
dc
dc
dc
dc
dc
dc
x
dc
dc
d6
x
x
x
x
x
x
x
dc
dc
dc
dc
dc
dc
x
dc
dc
d5
x
x
x
x
x
x
x
dc
dc
dc
dc
dc
dc
x
dc
dc
d4
x
x
x
x
x
x
x
dc
dc
dc
dc
dc
dc
x
dc
dc
d3
x
x
x
x
x
x
x
dc
dc
dc
dc
dc
dc
x
x
dc
d2
x
x
x
x
x
x
x
dc
dc
dc
dc
dc
dc
x
x
dc
d1
x
x
x
x
x
x
x
dc
dc
dc
dc
dc
dc
x
x
dc
d0
x
x
x
x
x
x
x
dc
dc
dc
dc
dc
dc
x
x
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
dc
Data
d4
u
u
u
u
u
u
u
u
u
u
u
u
u
u
u
u
d3
u
u
u
u
u
u
u
u
u
u
u
u
u
u
u
u
d2
u
u
u
u
u
u
u
u
u
u
u
u
u
u
u
u
d1
u
u
u
u
u
u
u
u
u
u
u
u
u
u
u
u
d0
u
u
u
u
u
u
u
u
u
u
u
u
u
u
u
u
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
u
x
u
x
u
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
Legend of Table 3 and Table 4
X: Any kind of data.
dc: don’t care.
U: unchanged; address and data which is shifted in and out is the same.
Reserved: these commands are potentially used for manufacturing purposes and should not be accessed.
Unused: these commands are not used and could be used for dummy commands.
Table 3 gives an overview about valid address codes. An overflow output is available on SEROUT allowing for daisy
chaining more devices.
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Datasheet
Description of Commands
Command [WRITE_CALxy] is used to set the calibration of each output during operation. The first 6 bits of the shift register
are used for calibration of channels with even numbering whilst the last 6 calibrate the odd channels. For example [WRITE
CAL5/CAL4] sets the calibration for channel 4 and 5. Command [READ CALxy] is used to read back the data to ensure it
was received correctly.
The mask register which enables/disables the outputs is accessed through command [WRITE MASK]. Command [READ
MASK] is used to read back the data to ensure it was received correctly.
The write access to calibration and mask register may be locked using command [LOCK CAL] and [LOCK MASK]. When
any data is written during lock there will be no change in the content of the register. This is protecting these most important
registers from invalid data during for example unexpected rising edges on the LATCH pin. The lock registers enable denial of
access to the mask and calibration registers. The access to calibration and mask register may be unlocked using commands
[UNLOCK CAL] and [UNLOCK MASK].
The detection of shorts in the ANY_SHORT register from a given channel may be masked by the command [WRITE
7
SHORT_MASK] . When it is known that the chosen application circuit implementation may lead to inadvertently incorrect
SHORT detections in a channel, the SHORT MASK prevents that channel from changing the ANY_SHORT register.
However the SHORT detection of individual channels is still active and still can be read by the controller. There is no similar
7
functionality for OPEN detection. The status of SHORT_MASK may be read by the command [READ SHORT_MASK] .
The diagnostic data is accessed via the command [READ STATUS]. See structure of this register is shown in Table 5.
Content of STATUS data. The POR register flag may be reset by the controller via command [RESET POR].
Table 5. Content of STATUS data
NAME
TSD125
TSD150
CAL_LOCK
MASK_LOCK
ANY_SHORT_FLAG
STATUS
0
1
2
3
4
ANY_OPEN_FLAG
5
POR
x
6
7
DATA
Die temperature >125°C (1 = over temp)
Die temperature >150°C (1 = over temp)
CALIBRATION LOCK (1 = locked)
MASK LOCK (1 = locked)
At least one short detected at any output (1 = short
detected)
At least one open detected at any output (1 = open
detected)
POR flag (1 = POR detected)
Unused
All of the other bits in the STATUS registers (TSD150, TSD125, CAL_LOCK, MASK_LOCK, ANY_SHORT_FLAG, and
ANY_OPEN_FLAG) and channel diagnostic registers (OPEN and SHORT) are reset by command [RESET STATUS].
7
The detection of shorts in any channel may be read by the command [READ SHORT] . This command reads the status of
the SHORT registers. If a SHORT is detected in a channel, the SHORT register flag is maintained until [RESET STATUS].
The next [READ SHORT] will report the actual status of the channel.
7
The detection of open in any channel may be read by the command [READ OPEN] . If an OPEN is detected in a channel,
the OPEN register flag is maintained until [RESET STATUS]. The next [READ OPEN] will report the actual status of the
channel.
The controller can initiate a software POR using command [SOFTWARE POR]. This returns the registers to default status
without interrupting communication. This also implements a [RESET STATUS] command.
7
These commands are spilt into two parts to access all 12 bits.
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Datasheet
Timing Diagrams
Figure 10. Write/access data for typical use case
INPUT SIGNAL’s TIMING RULE (Ta=-40~105°C VCC=3.0~5.5V)
Parameter
Symbol
Min
Unit
CLK period
TCK
800
ns
CLK high pulse width
TCKH
300
ns
CLK low pulse width
TCKL
300
ns
SERIN high and low pulse width
TSEW
780
ns
SERIN setup time prior to CLK rise
TSEST
150
ns
SERIN hold time after CLK rise
TSEHD
150
ns
LATCH high pulse time
TLAH
380
ns
LAST CLK rise to LATCH rise
TLADZ
200
ns
Figure 11. Input signals timing diagram showing absolute minimal timing
The timings in Figure 11 are valid for a 1.25MHz clock signal. The input High Going threshold voltage (VTH) is 0.4 VCC on the
rising edge and (VTH) 0.3 VCC on the falling edge for all digital pins. See electrical characteristics on page 6.
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Datasheet
OUTPUT SIGNAL’s DELAY TIME (Ta=-40~105°C VCC=3.0~5.5V)
Parameter
Symbol
Min.
Typ.
Max.
LATCH switching delay
TDLAH
3000
SEROUT propagation delay time(L H)
TDSOH
1000
SEROUT propagation delay(H L)
TDSOL
3000
Unit
ns
ns
ns
Condition
Figure 12. Output signal's delay time
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Datasheet
●Start-up sequence
After POR the digital registers are RESET. All outputs are off, the calibration register is set to have minimum LED brightness
while diagnostic registers are pulled to zero. By default mask and calibration register are unlocked for writing and POR flag
is “high” (see Table 1. Default registers values ). This is described in the POR description above.
At startup the state machine inside the digital core of the BD18377 is in an undefined state. It requires two clock pulses to
put the state machine into a defined state. The first two bits in the command sent to the controller will be recognized as “00”.
For this reason it is necessary to send either a dummy byte or a dummy command to put the device into a known state
before sending other commands.
It is recommended to send a dummy byte since this will get latched out of the device without effect. If sending a dummy
command it is recommended to send the commands 00xx, 10xx, 20xx or 30xx because these commands will not be
changed and will have no effect until the MASK command is sent.
The recommended sequence to start-up is as follows:
•
•
•
•
Send a dummy byte or command (mandatory)
Read the diagnostics [READ STATUS].
Read the diagnostics [READ STATUS] again. Receive the first command sent.
The controller should compare the sent and received data. There are two possible results:
o If the command address sent and received is equal communication is successful.
o If the command received is 0000, there is an active POR event in the daisy chain and communication is
corrupted.
•
•
•
•
•
•
Clear the POR flag [RESET POR].
Clear the diagnostic flags [RESET STATUS].
Writes calibration data of all channels which are used in the application [WRITE CAL].
Read back the calibration data for verification [READ CAL].
Lock calibration data [LOCK CAL].
If the application requires masking the short detection in the STATUS, the SHORTMASK is set [WRITE
SHORT_MASK].
If used the SHORT_MASK is read back for verification [READ SHORT_MASK].
MASK data is written [WRITE MASK].
Read back the MASK registers for verification [READ MASK].
Set PWM to active.
Use the command [READ SHORT] to confirm that none of the LEDs are shorted.
Use the command [READ OPEN] to confirm that none of the LEDs are open circuit.
If there is no fault, lock MASK registers [LOCK MASK].
If there is a fault verify that it is persistent by the command [RESET STATUS] and then [READ STATUS].
Clear all diagnostics at the end of the start-up sequence [RESET STATUS].
Adjust PWM duty cycle for dimming if required.
•
•
•
•
•
•
•
•
•
•
●Post software POR Start-up sequence
In the full start-up sequence after a software POR [SOFTWARE POR] the controller:
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Read the diagnostics to confirm no pre exiting fault [READ STATUS].
Clear the POR flag [RESET POR].
If needed clear the diagnostics to confirm no persistent fault [RESET STATUS].
Writes calibration data of all channels which are used in the application [WRITE CAL].
Read back the calibration data for verification [READ CAL].
Lock calibration data [LOCK CAL].
If the application requires masking the short detection of STATUS, the SHORTMASK is set [WRITE SHORT_MASK].
If used the SHORT_MASK is read back for verification [READ SHORT_MASK].
MASK data is written [WRITE MASK].
Read back the MASK registers for verification [READ MASK].
Set PWM to active.
Use the command [READ SHORT] to confirm that none of the LEDs are shorted.
Use the command [READ OPEN] to confirm that none of the LEDs are open circuit.
If there is no fault, lock MASK registers [LOCK MASK].
If there is a fault verify that it is persistent by the command [RESET STATUS] and then [READ STATUS].
Clear all diagnostics at the end of the start-up sequence [RESET STATUS].
Adjust PWM duty cycle for dimming if required.
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●Power dissipation
The maximum current specification per output ID max = 50mA. However when all channels are sinking this maximum the total
power dissipation exceeds the value set by the package limit. The power dissipation can be estimated using Equation 6.
Maximum power dissipation. In case of high current and high voltage it is possible to exceed the maximum power dissipation
even at a single channel. Because these situations do not occur often the current limit per channel is set higher such that the
flexibility of the system is improved.
It is recommended to connect the LEDs to a 5V supply voltage (VLED) for an optimal SHORT detection and thermal
performance. If the LEDs are connected to a higher voltage care should be taken to ensure proper short detect functionality
and the power dissipation will increase. LED series resistors ( RD ) may be added to reduce the voltage drop over the IC
output. These resistors are an optional safeguard against exceeding the dissipation limit of BD18377. The maximum power
rating of the BD18377EFV-M can be read from Figure 13.
11
Pdiss ,max > ∑ (VLED − V f ,i − I out ,i ⋅ RD ,i ) ⋅ I out ,i ⋅
i =0
11
= ∑ (V D ,i ⋅ Ioi ) ⋅
i=0
TON
TPWM
TON
TPWM
Equation 6. Maximum power dissipation
Pdiss,max: Maximum power dissipation of the package
VLED: Supply voltage of LEDs.
Vf: LED forward voltage
RD: Optional series resistance.
TPWM: Period of PWM
TON: ON time (duty) of PWM
Figure 13. Maximum power dissipation of HTSSOPB20
Measuring equipment: TH-156(Kuwano Electric)
PCB size: 70mm x 70mm x 1.6mm
PCB material: Glass epoxy FR4 CS3355
Copper thickness: 18um
For temperatures above 105°C Pdiss, max was measured but is not ensured
: 1Layer PCB
: 2Layer PCB(reverse copper area 15mm x 15mm)
: 2Layer PCB(reverse copper area 70mm x 70mm)
: 4Layer PCB(reverse copper area 70mm x 70mm)
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Datasheet
●Input/output equivalent circuit
Input
PIN 2 (SERIN)
PIN 10 (PWM_B/OEN_B)
PIN 12 (LATCH)
PIN 19 (CLK)
Output
PIN 11 (SEROUT)
Figure 14. Input/output equivalent circuit
The digital inputs are CMOS inputs. They are not internally connected to pull-up or pull-down resistors such that even in a
daisy chain they can be driven from a controller without delivering significant current.
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Datasheet
●Operating Notes
1.
Absolute maximum ratings
Use of the IC in excess of absolute maximum ratings (such as the input voltage or operating temperature range) may result
in damage to the IC. Assumptions should not be made regarding the state of the IC (e.g., short mode or open mode) when
such damage is suffered. If operational values are expected to exceed the maximum ratings for the device, consider adding
protective circuitry (such as fuses) to eliminate the risk of damaging the IC.
2.
GND potential
Ensure that the GND pin is held at the minimum potential in all operating conditions.
3.
Thermal Design
Use a thermal design that allows for a sufficient margin for power dissipation (Pd) under actual operating conditions.
4.
Inter-pin shorts and mounting errors
Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result in
damage to the IC. Shorts between output pins or between output pins and the power supply and GND pins caused by poor
soldering or foreign objects may result in damage to the IC.
5.
Operation in strong electromagnetic fields
Exercise caution when using the IC in the presence of strong electromagnetic fields as doing so may cause the IC to
malfunction.
6.
Testing on application boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance pin may subject the IC to
stress. Always discharge capacitors completely after each process or step. The IC’s power supply should always be turned
off completely before connecting or removing it from a jig or fixture during the evaluation process. To prevent damage from
static discharge, ground the IC during assembly and use similar precautions during transport and storage.
7.
Ground wiring patterns
When using both small-signal and large-current GND traces, the two ground traces should be routed separately but
connected to a single ground potential within the application in order to avoid variations in the small-signal ground caused by
large currents. Also ensure that the GND traces of external components do not cause variations on GND voltage.
8.
IC input pins and parasitic elements
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.
PN junctions are formed at the intersection of these P layers with the N layers of other elements, creating parasitic diodes
and/or transistors. For example (refer to the figure below):
Transistor (NPN)
Pin B
Resistance
Pin A
Pin B
C
B
E
Pin A
N
P
N
+
Parasitic Element
P
GND
P
+
N
P Substrate
P
+
N
B
R
Parasitic Element
Parasitic Elements
B
N
P
GND
P
+
N
P
subst
GND
C
E
Parasitic Elements
GND
Other Adjacent Elements
Figure 15. Example of IC Structure
•
When GND > Pin A and GND > Pin B, the PN junction operates as a parasitic diode
•
When GND > Pin B, the PN junction operates as a parasitic transistor
Parasitic diodes occur inevitably in the structure of the IC, and the operation of these parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Accordingly, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
9.
Over-current protection circuits
An over-current protection circuit (designed according to the output current) is integrated into the IC to prevent damage in
the event of load shorting. This protection circuit is effective in preventing damage due to sudden and unexpected overloads
on the output. However, the IC should not be used in applications where operation of the OCP function is anticipated or
assumed
10. Thermal shutdown circuit (TSD)
This IC also incorporates a built-in TSD circuit for the protection from thermal destruction. The IC should be used within the
specified power dissipation range. However, in the event that the IC continues to be operated in excess of its power
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dissipation limits, the rise in the chip's junction temperature Tj will trigger the TSD circuit, shutting off all output power
elements. The circuit automatically resets itself once the junction temperature Tj drops down to normal operating
temperatures. The TSD protection will only engage when the IC's absolute maximum ratings have been exceeded;
therefore, application designs should never attempt to purposely make use of the TSD function.
Status of this document
The English version of this document is formal specification. A customer may use the translation version only for a reference
to help reading the formal version.
If there are any differences in translation version of this document formal version takes priority.
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© 2016 ROHM Co., Ltd. All rights reserved.
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BD18377EFV-M
Datasheet
●Ordering Information
B
D
1
8
3
7
7
E
F
V
-
ME2
Package
EFV: HTSSOP-B20
Packaging
M : High reliability
E2: Embossed carrier tape
(HTSSOP-B20)
Figure 16. Ordering Information
●Physical Dimensions, Tape And Reel Information for HTSSOP-B20
HTSSOP-B20
<Tape and Reel information>
6.5±0.1
(MAX 6.85 include BURR)
Tape
(4.0)
Quantity
1
1.0±0.2
(2.4)
0.5±0.15
11
4.4±0.1
6.4±0.2
20
Direction
of feed
Embossed carrier tape (with dry pack)
2500pcs
E2
The direction is the 1pin of product is at the upper left when you hold
( reel on the left hand and you pull out the tape on the right hand
)
10
0.325
1.0MAX
+0.05
0.17 -0.03
0.08±0.05
0.85±0.05
S
0.08 S
0.65
+0.05
0.24 -0.04
1pin
Reel
(Unit : mm)
Direction of feed
∗ Order quantity needs to be multiple of the minimum quantity.
Figure 17. Tape and Reel Information for HTSSOP-B20
●Marking Diagram
HTSSOP-B20 (TOP VIEW)
Part Number
1 8 3 7 7
LOT
1PIN
Figure 18. Marking Diagram
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© 2016 ROHM Co., Ltd. All rights reserved.
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BD18377EFV-M
Datasheet
●Revision History
S. No.
Change
Date
Ver.
Author
1
First Version
June 31, 2012
Rev. 001
2
Convergence with Rohm datasheet standard.
August 14, 2012
Rev. 002
3
Updated Fig8 to correctly show the relation
between PWM , Mask & Diagnostics
Corrected the formatting of curves in Fig 5 & 6.
Included –M in ordering information.
Output current supply voltage shift better explained
in Electrical Characteristics table.
Corrected
the
name
BD8377EFV-M
to
BD8377FV-M.
Added note for AEC-Q100-Operating Temperature
Grade on page 1.
Sept 19, 2012
Rev. 003
R. Kaushik
D. James
R. Spee
D. James
R. Kaushik
Oct 01, 2012
Rev. 004
R. Kaushik
April 19, 2016
Rev. 005
R. Kaushik
4
5
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© 2016 ROHM Co., Ltd. All rights reserved.
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Notice
Precaution on using ROHM Products
1.
(Note 1)
If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment
,
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSヮ
CLASSロb
CLASSヮ
CLASSヮ
CLASSワ
CLASSヮ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PAA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.003
Datasheet
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001
Datasheet
BD18377EFV-M - Web Page
Buy
Distribution Inventory
Part Number
Package
Unit Quantity
Minimum Package Quantity
Packing Type
Constitution Materials List
RoHS
BD18377EFV-M
HTSSOP-B20
2500
2500
Taping
inquiry
Yes
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