CS3302 High-Z Programmable Gain Differential Amplifier Features Description Signal bandwidth: DC to 2 kHz Selectable gain: x1, x2, x4, x8, x16, x32, x64 Differential inputs, differential outputs • • • • Multiplexed inputs: INA, INB, 800Ω termination Rough / fine charge outputs for CS5371/72 Max signal amplitude: 5 Vp-p differential Ultra-low input bias: < 1 pA Excellent noise performance The CS3302 is a high input impedance differential in, differential out amplifier with programmable gain, optimized for amplifying signals from high impedance sensors such as hydrophones. The gain settings are binary weighted (x1, x2, x4, x8, x16, x32, x64) and are selected using simple pin settings. Two sets of external inputs, INA and INB, simplify system design as inputs from a sensor and test DAC. An internal 800Ω termination can also be selected for noise tests. • Normal / LPWR / PWDN: 5 mA, 3.3 mA, 10 µA Amplifier input impedance is very high, requiring less than 1 pA of input current. Noise performance is very good at 1 µVp-p between 0.1 Hz and 10 Hz, and a noise density of 8.5 nV/ √Hz over the 200 Hz to 2 kHz bandwidth. Distortion performance is also extremely good, typically -118 dB THD. Low input current, low noise, and low total harmonic distortion make this amplifier ideal for high impedance differential sensors requiring maximum dynamic range. Single or dual power supply configurations ORDERING INFORMATION • 1 µVp-p between 0.1 Hz and 10 Hz • 8.5 nV/ √Hz from 200 Hz to 2 kHz Low total harmonic distortion • -118 dB THD typical (0.000126%) • -112 dB THD maximum (0.000251%) Low power consumption • VA+ = +5 V; VA- = 0 V; VD = +3.3 V to +5 V CS3302-IS • VA+ = +2.5 V;VA- = -2.5 V;VD = +3.3 V VA+ INA+ INB+ GUARD -40ºC to +85ºC VD 750 Ω 500 + OUTR+ OUTF+ 400 Ω 750 Ω 500 GAIN0 GAIN1 GAIN2 400 Ω MUX0 MUX1 500 750 Ω - INAINB- 750 Ω 500 + VA- Preliminary Product Information Cirrus Logic, Inc. www.cirrus.com 24-pin SSOP LPWR PWDN OUTFOUTR- DGND This document contains information for a new product. Cirrus Logic reserves the right to modify this product without notice. Copyright Cirrus Logic, Inc. 2003 (All Rights Reserved) JUN ‘03 DS596PP2 1 CS3302 TABLE OF CONTENTS 1. CHARACTERISTICS AND SPECIFICATIONS........................................................................ 4 SPECIFIED OPERATING CONDITIONS ................................................................................ 4 ABSOLUTE MAXIMUM RATINGS .......................................................................................... 4 THERMAL CHARACTERISTICS ............................................................................................. 5 ANALOG CHARACTERISTICS ............................................................................................... 5 DIGITAL CHARACTERISTICS ................................................................................................ 8 POWER SUPPLY CHARACTERISTICS ................................................................................. 9 2. GENERAL DESCRIPTION..................................................................................................... 10 2.1. Analog Signals .............................................................................................................. 10 2.2.1.Analog Inputs ....................................................................................................... 10 2.3.2.Analog Outputs..................................................................................................... 10 2.4.3.Differential Signals ............................................................................................... 11 2.5.4.Guard Output........................................................................................................ 11 2.6. Digital Signals................................................................................................................ 11 2.7.1.Gain Selection ...................................................................................................... 11 2.8.2.Mux Selection ....................................................................................................... 11 2.9.3.Low Power Selection ............................................................................................ 11 2.10.4.Power Down Selection ....................................................................................... 11 2.11. Power Supplies ............................................................................................................. 11 2.12.1.Analog Power Supplies ...................................................................................... 11 2.13.2.Digital Power Supplies ....................................................................................... 12 2.14. Connection Diagram...................................................................................................... 13 3. PIN DESCRIPTION ................................................................................................................ 14 4. PACKAGE DIMENSIONS ...................................................................................................... 15 Contacting Cirrus Logic Support For all product questions and inquiries contact a Cirrus Logic Sales Representative. To find one nearest you go to www.cirrus.com IMPORTANT NOTICE “Preliminary” product information describes products that are in production, but for which full characterization data is not yet available. Cirrus Logic, Inc. and its subsidiaries (“Cirrus”) believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided “AS IS” without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. 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IF THE CUSTOMER OR CUSTOMER’S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS’ FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES. Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners. 2 CS3302 LIST OF FIGURES Figure 1. CS3302 Noise Performance ............................................................................................ 5 Figure 2. Digital Input Rise and Fall Times ..................................................................................... 8 Figure 3. System Architecture....................................................................................................... 10 Figure 4. CS3302 Amplifier Connections ...................................................................................... 13 Figure 5. CS3302 Pin Assignments .............................................................................................. 14 LIST OF TABLES Table 1. Digital Selection for Gain and Input Mux Control ............................................................. 8 Table 2. Pin Descriptions ............................................................................................................. 14 3 CS3302 1. CHARACTERISTICS AND SPECIFICATIONS • Min/Max characteristics and specifications are guaranteed over the Specified Operating Conditions. • Typical performance characteristics and specifications are derived from measurements taken at nominal supply voltages and TA = 25°C. • DGND = 0 V, all voltages with respect to 0 V. SPECIFIED OPERATING CONDITIONS Parameter Symbol Min Nom Max Unit VA+ 4.75 5.0 5.25 V Unipolar Power Supplies Positive Analog Negative Analog (Note 1) VA- -0.25 0 0.25 V Positive Digital (Note 2) VD 3.135 3.3 5.25 V VA+ 2.375 2.5 2.625 V Bipolar Power Supplies Positive Analog Negative Analog (Note 1) VA- -2.625 -2.5 -2.375 V Positive Digital (Note 2) VD 3.135 3.3 3.465 V Industrial (-IS) TA -40 - 85 °C Thermal Ambient Operating Temperature Notes: 1. VA- must be the most negative voltage to avoid potential SCR latch-up conditions. 2. VD must conform to Digital Supply Differential under Absolute Maximum Ratings. ABSOLUTE MAXIMUM RATINGS CS3302 Parameter DC Power Supplies Positive Analog Negative Analog Digital Symbol Min Max Unit VA+ VAVD -0.3 -6.8 -0.3 6.8 0.3 6.8 V V V Analog Supply Differential [(VA+) - (VA-)] VADIFF - 6.8 V Digital Supply Differential [(VD) - (VA-)] VDDIFF - 6.8 V Input Current, Any Pin Except Supplies (Note 3) IIN - +10 mA Input Current, Power Supplies (Note 3) IIN - +50 mA Output Current (Note 3) IOUT - +25 mA Power Dissipation PDN - 500 mW Analog Input Voltages VINA (VA-)-0.3 (VA+)+0.3 V Digital Input Voltages VIND -0.3 (VD)+0.3 V TA -40 85 ºC TSTG -65 150 ºC Ambient Operating Temperature (Power Applied) Storage Temperature Range WARNING: Operation at or beyond these limits may result in permanent damage to the device. Normal operation is not guaranteed at these extremes. Notes: 3. Transient currents up to 100mA will not cause SCR latch-up. 4 CS3302 THERMAL CHARACTERISTICS CS3302 Parameter Symbol Allowable Junction Temperature Min Typ Max Unit - - 135 ºC 65 - ºC / W - +85 ºC Junction to Ambient Thermal Impedance ΘJA - Ambient Operating Temperature (Power Applied) TA -40 ANALOG CHARACTERISTICS CS3302 Parameter Symbol Min Typ Max Unit Noise Performance, Normal Power Input Voltage Noise f0 = 0.1 Hz to 10 Hz VN PP - 1 1.5 µVp-p Input Voltage Noise Density f0 = 200 Hz to 2 kHz VND - 8.5 12 nV/ Hz Input Current Noise Density (Note 4) IND - 1 - fA/ Hz Noise Performance, Low Power (LPWR=1) Input Voltage Noise f0 = 0.1 Hz to 10 Hz VN PP - 1 1.5 µVp-p Input Voltage Noise Density f0 = 200 Hz to 2 kHz VND - 10 15 nV/ Hz Input Current Noise Density (Note 4) IND - 1 - fA/ Hz Total Harmonic Distortion (Note 5, 6) THD - -118 -112 dB Linearity (Note 5, 6) LIN - 0.000126 0.000251 % Distortion Performance, Normal Power Distortion Performance, Low Power (LPWR=1) Total Harmonic Distortion (Note 5, 6) THD - -118 -110 dB Linearity (Note 5, 6) LIN - 0.000126 0.000316 % Notes: 4. Guaranteed by design and/or characterization. 5. Tested with a full scale input signal of 31.25 Hz. 6. Noise in the harmonic bins dominates THD and linearity measurements for x16, x32, and x64 gains. CS3302 In-Band Noise CS3302 Wide Band Noise 300 Noise Density (nV/rtHz) Noise Density (nV/rtHz) 20 15 10 5 250 200 150 100 50 0 0 0 200 400 600 800 1000 1200 1400 1600 1800 2000 0.1 1 10 100 1000 10000 100000 1E+06 Frequency (Hz) Frequency (Hz) Figure 1. CS3302 Noise Performance 5 CS3302 ANALOG CHARACTERISTICS (CONT.) CS3302 Parameter Symbol Min Typ Max Gain, Differential GAINDM x1 - x64 Gain, Common Mode GAINCM - x1 - GAABS - +1 +2 Unit Gain % Gain Accuracy, Absolute (Note 7, 9) Gain Accuracy, Relative (Note 8, 9) GAREL - +0.4 +0.8 % (Note 4) GAIN TC - 5 - ppm / ºC OFST - +250 +750 µV Gain Drift Offset Offset Voltage, Input Referred (Note 9, 10) Offset After Calibration, Absolute (Note 11) OFSTCAL - +1 - µV Offset Calibration Range (Note 12) OFSTRNG (Note 4) OFSTTC - 100 - % F.S. - 1 - µV / ºC Offset Voltage Drift Notes: 7. Absolute gain accuracy tests the matching of x1 gain across multiple CS3302 devices. 8. Relative gain accuracy tests the tracking of x2 - x64 gain relative to x1 gain on a single CS3302 device. 9. Specification is for the parameter over the specified temperature range and is for the CS3302 device only. It does not include the effects of external components. 10. Offset voltage is tested with the amplifier inputs connected to the internal 800Ω termination. 11. The absolute offset after calibration specification applies to the effective offset voltage of the CS3302 output when used with the CS5371/72 modulator and CS5376A digital filter, and is measured from the digitally calibrated output codes of the CS5376A. 12. The CS3302 offset calibration is performed digitally with the CS5371/72 modulator and CS5376A digital filter and includes the full scale signal range. Calibration offsets of greater than + 5% of full scale will begin to subtract from system dynamic range. 6 CS3302 ANALOG CHARACTERISTIC (Cont.) CS3302 Parameter Symbol Min Typ Max Unit BW DC VIN (VA-)+0.7 (VA-)+0.7 - 2000 Hz - (VA+)-1.25 (VA+)-1.75 V VINFS - - 5 2.5 1.25 625 312.5 156.25 78.125 Vp-p Vp-p Vp-p mVp-p mVp-p mVp-p mVp-p Input Impedance, Differential ZINDIFF - 1, 20 - TΩ, pF Input Impedance, Common Mode ZINCM - 0.5, 40 - TΩ, pF Analog Input Characteristics Input Signal Frequencies Input Voltage Range (Signal + Vcm) (Note 13) Full Scale Input, Differential x1 x2 - x64 x1 x2 x4 x8 x16 x32 x64 IIN - 1 40 pA XT - -130 - dB CDMR 90 100 - dB VOUT (VA-)+0.5 - (VA+)-0.5 V VOUTFS - - 5 Vp-p ZOUT - 750 - Ω IOUT - - 3.33 mA CL - - 100 nF Guard Output Voltage VGUARD - Vcm - V Guard Output Impedance ZGOUT - 500 - Ω Guard Output Current IG OUT - 40 - µA CGL - - 100 pF Input Bias Current Crosstalk, Multiplexed Inputs (Note 4) Common Mode to Differential Mode Rejection (Note 14) Analog Output Characteristics Output Voltage Range (Signal + Vcm) Full Scale Output, Differential Output Impedance Output Current Load Capacitance (Note 15) Guard Output Characteristics Guard Load Capacitance Notes: 13. No signal sources operating from external supplies should be applied to pins of the device prior to its own supplies being established. Connecting any terminal to voltages greater than VA+ or less than VAmay cause destructive latch-up. 14. Common-to-differential mode rejection tested with a 50 Hz, 500 mVp-p common mode sine wave applied to the analog inputs. 15. Output impedance is primarily determined by the integrated anti-alias resistors. Value is approximate and can vary +/- 30% depending on process parameters. 7 CS3302 DIGITAL CHARACTERISTICS CS3302 Parameter Symbol Min Typ Max Unit Digital Characteristics High Level Input Drive Voltage (Note 16) VIH 0.6*VD - VD V Low Level Input Drive Voltage (Note 16) VIL 0.0 - 0.8 V IIN - +1 +10 µA Input Leakage Current CIN - 9 - pF Rise Times tRISE - - 100 ns Fall Times tFALL - - 100 ns Digital Input Capacitance Notes: 16. Device is intended to be driven with CMOS logic levels. t risein t fallin (0.8*VD) (0.2*VD) Figure 2. Digital Input Rise and Fall Input Selection MUX1 MUX0 Gain Selection GAIN2 GAIN1 GAIN0 800 Ω termination 0 0 x1 0 0 0 INA only 1 0 x2 0 0 1 INB only 0 1 x4 0 1 0 INA + INB 1 1 x8 0 1 1 x16 1 0 0 x32 1 0 1 x64 1 1 0 Reserved 1 1 1 Table 1. Digital Selection for Gain and Input Mux Control 8 CS3302 POWER SUPPLY CHARACTERISTICS CS3302 Parameter Symbol Min Typ Max Unit Power Supply Current, Normal Mode Analog Power Supply Current (Note 17) IA - 5.0 5.75 mA Digital Power Supply Current (Note 17) ID - 0.1 0.2 mA Power Supply Current, Low Power Mode Analog Power Supply Current, LPWR = 1 (Note 17) IA - 3.4 4.0 mA Digital Power Supply Current, LPWR = 1 (Note 17) ID - 0.1 0.2 mA Analog Power Supply Current, PWDN = 1 (Note 17) IA - 9 11 µA Digital Power Supply Current, PWDN = 1 (Note 17) ID - 2 8 µA (Note 18) PSRR 95 120 - dB Power Supply Current, Power Down Mode Power Supply Rejection Power Supply Rejection Ratio Notes: 17. All outputs unloaded. Analog inputs connected to the internal 800 Ω termination. Digital inputs forced to VD or DGND respectively. 18. Power supply rejection tested with a 50 Hz, 400 mVp-p sine wave applied separately to each supply. 9 CS3302 2. GENERAL DESCRIPTION The CS3302 is a high impedance low-noise CMOS differential input, differential output amplifier for precision analog signals between DC and 2 kHz. It has multiplexed inputs, rough/fine charge outputs, and programmable gains of x1, x2, x4, x8, x16, x32, and x64. The amplifier’s performance makes it ideal for low-frequency, high dynamic range applications requiring low distortion and minimal power consumption. It’s optimized for use in acquisition systems designed around the CS5371/72 single/dual ∆Σ modulators and the CS5376A quad digital filter. Figure 3 shows the system level architecture of a 4-channel acquisition system using four CS3302, two CS5372, and one CS5376A. Differential Sensor 2.1 Analog Signals 2.1.1 Analog Inputs The amplifier analog inputs are designed for high impedance differential sensors. Input multiplexing simplifies system connections by providing separate inputs for a sensor and test DAC (INA, INB) as well as an internal termination for noise tests. The MUX0, MUX1 digital pins determine which multiplexed input is connected to the amplifier. 2.1.2 Analog Outputs The amplifier analog outputs are separated into rough charge / fine charge signals to easily connect to the CS5371/72 inputs. Each output also includes a series resistor, requiring only two differential capacitors to create the CS5371/72 input anti-alias filter. CS3302 M U X CS5371/72 AMP CS89712 ∆Σ Modulator Differential Sensor EP7312 CS3302 M U X AMP CS5376 CS5376A µController or Configuration EEPROM Digital Filter Differential Sensor CS3302 M U X CS8900A CS5371/72 AMP System Telemetry ∆Σ Modulator Differential Sensor CS3302 M U X AMP Test DAC Figure 3. System Architecture 10 CS4373 CS3302 2.1.3 Differential Signals Analog signals into and out of the CS3302 are differential, consisting of two halves with equal but opposite magnitude varying about a common mode voltage. A full scale 5 Vpp differential signal centered on a 2.5 V common mode can have: SIG+ = 2.5 V + 1.25 V = 3.75 V SIG- = 2.5 V - 1.25 V = 1.25 V SIG+ is +2.5 V relative to SIGFor the reverse case: SIG+ = 2.5 V - 1.25 V = 1.25 V SIG- = 2.5 V + 1.25 V = 3.75 V SIG+ is -2.5 V relative to SIGThe total swing for SIG+ relative to SIG- is (+2.5 V) - (-2.5 V) = 5 Vpp. A similar calculation can be done for SIG- relative to SIG+. Note that a 5 Vpp differential signal centered on a 2.5 V common mode voltage never exceeds 3.75 V and never drops below 1.25 V on either half of the signal. 2.1.4 Guard Output The GUARD pin outputs the common mode voltage of the currently selected analog signal input. It can be used to drive the cable shield between a high impedance sensor and the amplifier inputs. Driving the cable shield with the analog signal common mode voltage minimizes leakage and improves signal integrity from high impedance sensors. The GUARD output is defined as the midpoint voltage between the + and - halves of the currently selected differential input signal, and will vary as the signal common mode varies. The GUARD output will not drive a significant load, it only provides a shielding voltage. 2.2 2.2.1 Digital Signals Gain Selection The CS3302 supports gain ranges of x1, x2, x4, x8, x16, x32, and x64. They are selected using the GAIN0, GAIN1, and GAIN2 pins as shown in Table 1 on page 8. 2.2.2 Mux Selection The analog inputs to the amplifier are multiplexed, with external signals applied to the INA+, INA- or INB+, INB- pins. An internal termination is also available for noise tests. Input mux selection is made using the MUX0 and MUX1 pins as shown in Table 1 on page 8. Although a mux selection is provided to enable the INA and INB switches simultaneously, significant current should not be driven through them in this mode. The CS3302 mux switches will maintain good linearity only with minimal signal current. 2.2.3 Low Power Selection For applications where power is critical, a lowpower mode can be selected. This mode reduces amplifier power consumption at the expense of slightly degraded performance. Low power mode is selected using the LPWR pin, which is active high. 2.2.4 Power Down Selection A power-down mode is available to shut down the amplifier when not in use. When enabled, all internal circuitry is disabled, the analog inputs and outputs go high-impedance, and the device enters a micro-power state. Power down mode is selected using the PWDN pin, which is active high. 2.3 2.3.1 Power Supplies Analog Power Supplies The analog power pins of the CS3302 are to be supplied with a total of 5 V between VA+ and VA-. This voltage can be from a unipolar +5 V / 0 V supply or a bipolar +2.5 V / -2.5 V supply. When using a unipolar supply, analog signal common mode should be biased to 2.5 V, and when using bipolar supplies it should be biased to 0 V. The analog power supplies are recommended to be bypassed to system ground using 0.1 µF X7R type capacitors. 11 CS3302 The VA- supply is connected to the CMOS substrate and as such must remain the most negative applied voltage to prevent potential latch-up conditions. Care should be taken to ensure analog input voltages do not drop more than -0.3 V below the VA- supply. Care should also be taken to establish the VA- supply before analog signals are applied to the device. It is recommended to clamp the VAsupply to system ground using a reverse biased Schottky diode to prevent possible latch-up condi- 12 tions related to mismatched supply rail initialization. 2.3.2 Digital Power Supplies The digital power supply across the VD and DGND pins is flexible and can be set to interface with 3.3 V or 5 V logic. The digital power supply should be bypassed to system ground using a 0.01 µF X7R type capacitor. CS3302 2.4 Connection Diagram Figure 4 shows a connection diagram for the CS3302 amplifier when used with the CS5372 dual ∆Σ modulator and CS5376A digital filter. The diagram shows differential sensors, a test DAC, and analog outputs with anti-alias capacitors; power supply connections including recommended bypassing; and digital control connections back to the CS5376A GPIO pins. G PIO (x3) G PIO (x2) G PIO G PIO 3 2 GA IN MUX PWDN To CS 5376 A D ig ital C on tro l LPW R VA + VD VA + VA + VD 0 .1 µF 0 .0 1µF VD 0 .1 µF C S3302 D ifferential Am p lifier 0.0 1 µF VA - VA + VA - 0 .1 µF IN A + VD D GN D IN A - GU AR D IN B - IN B + O UT R - OU TF - OU T F+ O UT R+ M DA TA 1 M FL A G1 PW DN 1 INR + INF + 0.0 2 µF C0 G 0 .0 2µF C 0G INF INR - D ifferential Senso r M C LK M SYN C V RE F+ CS4373 Test DAC 2.5 V R eference C S5372 ∆Σ M o du lator V RE F- D ifferential Senso r LP W R OF ST INR INF 0.0 2 µF C0 G 0 .0 2µF C 0G INF + INR + IN A + IN A - G U AR D IN B - IN B + O UT R - OU TF - OU T F+ O UT R+ VA + VD V A+ VD VA - 0 .1 µF C S3302 D ifferential Am p lifier 0.0 1 µF VA V A0 .1 µF M DA TA 2 M FL A G2 PW DN 2 0.1µF D GN D G A IN M UX PW D N 2 3 D GN D V A- LP W R G PIO G PIO G PIO (x2) G PIO (x3) To CS 5376 A D ig ital C on tro l Figure 4. CS3302 Amplifier Connections 13 CS3302 3. PIN DESCRIPTION Positive Analog Power Supply VA+ 1 24 MUX0 Input Mux Select Negative Analog Rough Output OUTR- 2 23 MUX1 Input Mux Select Negative Analog Fine Output OUTF- 3 22 GAIN0 Gain Range Select Negative Analog Power Supply VA- 4 21 GAIN1 Gain Range Select Non-Inverting Input A INA+ 5 20 GAIN2 Gain Range Select Inverting Input A INA- 6 19 PWDN Power Down Mode Enable Inverting Input B INB- 7 18 LPWR Low Power Mode Enable Non-Inverting Input B INB+ 8 17 TEST1 Test Mode Select Test Mode Output TESTOUT 9 16 VD Positive Digital Power Supply Positive Analog Fine Output OUTF+ 10 15 DGND Digital Ground Positive Analog Rough Output OUTR+ 11 14 TEST2 Test Mode Select Test Mode Select TEST0 12 13 GUARD Guard Voltage Output Figure 5. CS3302 Pin Assignments Pin Name Pin # I/O 1 I Positive analog supply voltage. VA- 4 I Negative analog supply voltage. VD 16 I Positive digital supply voltage. DGND 15 I Digital ground. INA+, INA- 5, 6 I Channel A differential analog inputs. Selected via MUX pins. INB+, INB- 8, 7 I Channel B differential analog inputs. Selected via MUX pins. 13 O Guard voltage output. OUTR+, OUTR- 11, 2 O Rough charge differential analog outputs. OUTF+, OUTF- 10, 3 O Fine charge differential analog outputs. GAIN0, GAIN1, GAIN2 22, 21, 20 I Gain range select. See Gain Selection table in Digital Characteristics section. LPWR 18 I Low power mode enable. Active high. PWDN 19 I Power down mode enable. Active high. 24, 23 I Analog input select. See Input Selection table in Digital Characteristics section. VA+ GUARD MUX0, MUX1 TEST0 TEST1, TEST2 TESTOUT Pin Description 12 I 17, 14 I Test mode select, factory use only. Connect to VA- during normal operation. Test mode select, factory use only. Connect to DGND during normal operation. 9 O Test mode output, factory use only. Connect to VA- during normal operation. Table 2. Pin Descriptions 14 CS3302 4. PACKAGE DIMENSIONS 24 PIN SSOP PACKAGE DRAWING N D E11 A2 E A1 b2 e A L SIDE VIEW END VIEW SEATING PLANE 1 2 3 TOP VIEW INCHES DIM MIN MAX MILLIMETERS MIN MAX A A1 A2 b D E E1 e L -0.002 0.064 0.009 0.311 0.291 0.197 0.024 0.025 0° 0.084 0.010 0.074 0.015 0.335 0.323 0.220 0.027 0.040 8° -0.05 1.62 0.22 7.90 7.40 5.00 0.61 0.63 0° ∝ 2.13 0.25 1.88 0.38 8.50 8.20 5.60 0.69 1.03 8° NOTE 2,3 1 1 Notes: 1. “D” and “E1” are reference datums and do not included mold flash or protrusions, but do include mold mismatch and are measured at the parting line, mold flash or protrusions shall not exceed 0.20 mm per side. 2. Dimension “b” does not include dambar protrusion/intrusion. Allowable dambar protrusion shall be 0.13 mm total in excess of “b” dimension at maximum material condition. Dambar intrusion shall not reduce dimension “b” by more than 0.07 mm at least material condition. 3. These dimensions apply to the flat section of the lead between 0.10 and 0.25 mm from lead tips. 15