AUTOMOTIVE MOSFET
Typical Applications
O
O
O
PD - 95491
IRF2204SPbF
IRF2204LPbF
HEXFET® Power MOSFET
Electric Power Steering
14 Volts Automotive Electrical Systems
Lead-Free
D
VDSS = 40V
Features
O
O
O
O
O
O
Advanced Process Technology
Ultra Low On-Resistance
Dynamic dv/dt Rating
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
RDS(on) = 3.6mΩ
G
ID = 170A
S
Description
Specifically designed for Automotive applications, this HEXFET®
Power MOSFET utilizes the lastest processing techniques to
achieve extremely low on-resistance per silicon area. Additional
features to this design are a 175°C junction operating temperature,
fast switching speed and improved repetitive avalanche rating.
These features combine to make this design an extremely
efficient and reliable device for use in Automotive applications
and a wide variety of other applications.
D2 Pak
IRF2204S
TO-262
IRF2204L
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting Torque, 6-32 or M3 screw
Max.
Units
170
120
850
200
1.3
± 20
460
See Fig.12a, 12b, 15, 16
A
W
W/°C
V
mJ
A
mJ
-55 to + 175
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθJA
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Junction-to-Case
Junction-to-Ambient
Typ.
Max.
Units
–––
–––
0.75
40
°C/W
1
06/30/04
IRF2204S/LPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
RDS(on)
VGS(th)
gfs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
40
–––
–––
2.0
120
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.041
3.0
–––
–––
–––
–––
–––
–––
130
35
39
15
140
62
110
IDSS
Drain-to-Source Leakage Current
LD
Internal Drain Inductance
–––
4.5
LS
Internal Source Inductance
–––
7.5
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
–––
–––
–––
–––
–––
–––
5890
1570
130
8000
1370
2380
V(BR)DSS
∆V(BR)DSS/∆TJ
IGSS
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
3.6
mΩ VGS = 10V, ID = 130A
4.0
V
VDS = 10V, ID = 250µA
–––
S
VDS = 10V, ID = 130A
20
VDS = 40V, VGS = 0V
µA
250
VDS = 32V, VGS = 0V, TJ = 150°C
200
VGS = 20V
nA
-200
VGS = -20V
200
ID = 130A
52
nC
VDS = 32V
59
VGS = 10V
–––
VDD = 20V
–––
ID = 130A
ns
–––
RG = 2.5Ω
–––
VGS = 10V
D
Between lead,
–––
6mm (0.25in.)
nH
G
from package
–––
and center of die contact
S
–––
VGS = 0V
–––
pF
VDS = 25V
–––
ƒ = 1.0MHz, See Fig. 5
–––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 32V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 0V to 32V
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Qrr
ton
2
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– 170
showing the
A
G
integral reverse
––– ––– 850
S
p-n junction diode.
––– ––– 1.3
V
TJ = 25°C, IS = 130A, VGS = 0V
––– 68 100
ns
TJ = 25°C, IF = 130A
––– 120 180
nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRF2204S/LPbF
TOP
I D, Drain-to-Source Current (A)
1000
BOTTOM
10000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
TOP
1000
I D, Drain-to-Source Current (A)
10000
100
4.5V
10
BOTTOM
100
4.5V
10
20µs PULSE WIDTH
T J= 25 ° C
20µs PULSE WIDTH
T J= 175 ° C
1
1
0.1
1
10
100
0.1
1
V DS, Drain-to-Source Voltage (V)
10
100
V DS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000.00
2.5
I D = 210A
ID , Drain-to-Source Current (Α )
T J = 175°C
100.00
T J = 25°C
VDS = 25V
20µs PULSE WIDTH
10.00
4.0
5.0
6.0
7.0
8.0
9.0
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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10.0
(Normalized)
RDS(on) , Drain-to-Source On Resistance
2.0
1.5
1.0
0.5
V GS = 10V
0.0
-60
-40
-20
0
20
40
60
80
TJ , Junction Temperature
100 120 140 160 180
( ° C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRF2204S/LPbF
100000
I D = 130A
VDS = 32V
VDS = 20V
10
VGS , Gate-to-Source Voltage (V)
Coss = Cds + Cgd
10000
C, Capacitance(pF)
12
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Ciss
Coss
1000
Crss
100
8
6
4
2
10
0
1
10
0
100
30
VDS, Drain-to-Source Voltage (V)
120
150
10000
ID, Drain-to-Source Current (A)
1000
TJ = 175 ° C
OPERATION IN THIS AREA
LIMITED BY R DS(on)
1000
100
I SD , Reverse Drain Current (A)
90
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
10
T J= 25 ° C
1
V GS = 0 V
0.0
0.5
1.0
1.5
2.0
V SD,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
100µsec
1msec
10
10msec
Tc = 25°C
Tj = 175°C
Single Pulse
1
0.1
4
60
QG, Total Gate Charge (nC)
2.5
1
10
100
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRF2204S/LPbF
175
150
VGS
D.U.T.
RG
125
ID , Drain Current (A)
RD
VDS
LIMITED BY PACKAGE
+
-VDD
10V
100
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
75
Fig 10a. Switching Time Test Circuit
50
VDS
25
90%
0
25
50
75
100
125
150
175
TC , Case Temperature ( °C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response
(Z thJC )
10
1
D = 0.50
0.20
0.1
P DM
0.10
t1
0.05
0.02
0.01
t2
Notes:
SINGLE PULSE
(THERMAL RESPONSE)
1. Duty factor D =
2. Peak T
0.01
0.00001
0.0001
0.001
0.01
t1 / t 2
J = P DM x Z thJC
+TC
0.1
1
t 1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRF2204S/LPbF
900
ID
52A
91A
15V
TOP
750
+
V
- DD
IAS
20V
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
A
EAS , Single Pulse Avalanche Energy (mJ)
D.U.T
RG
BOTTOM
DRIVER
L
VDS
130A
600
450
300
150
0
25
50
75
100
125
150
175
( ° C)
Starting Tj, Junction Temperature
I AS
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
QG
10 V
QGD
4.0
VG
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
12V
.2µF
.3µF
D.U.T.
+
V
- DS
VGS(th) Gate threshold Voltage (V)
QGS
3.5
3.0
ID = 250µA
2.5
2.0
1.5
1.0
-75 -50 -25
VGS
0
25
50
75 100 125 150 175 200
T J , Temperature ( °C )
3mA
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
6
Fig 14. Threshold Voltage Vs. Temperature
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IRF2204S/LPbF
1000
Duty Cycle = Single Pulse
Avalanche Current (A)
0.01
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ∆ Tj = 25°C due to
avalanche losses
100
0.05
0.10
10
1
1.0E-07
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
EAR , Avalanche Energy (mJ)
500
TOP
Single Pulse
BOTTOM 10% Duty Cycle
ID = 210A
400
300
200
100
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy
Vs. Temperature
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Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
t av = Average time in avalanche.
175
D = Duty cycle in avalanche = t av ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
7
IRF2204S/LPbF
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T*
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
RG
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
V GS
*
+
-
V DD
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
D=
P.W.
Period
[VGS=10V ] ***
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
[VDD]
Forward Drop
Inductor Curent
Ripple ≤ 5%
[ISD]
*** VGS = 5.0V for Logic Level and 3V Drive Devices
Fig 17. For N-channel HEXFET® power MOSFETs
8
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IRF2204S/LPbF
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information
T HIS IS AN IRF530S WIT H
LOT CODE 8024
AS SEMBLED ON WW 02, 2000
IN T HE AS SEMB LY LINE "L"
INT ERNAT IONAL
RECT IFIER
LOGO
Note: "P" in ass embly line
pos ition indicates "Lead-Free"
PART NUMB ER
F530S
AS S EMBLY
L OT CODE
DAT E CODE
YEAR 0 = 2000
WEEK 02
LINE L
OR
INT ERNAT IONAL
RE CT IFIE R
LOGO
AS S EMBLY
LOT CODE
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PART NUMBE R
F530S
DAT E CODE
P = DE S IGNAT E S LEAD-F REE
PRODUCT (OPT IONAL)
YE AR 0 = 2000
WEEK 02
A = AS S EMBLY S IT E CODE
9
IRF2204S/LPbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
EXAMPLE: T HIS IS AN IRL3103L
LOT CODE 1789
AS S EMB L ED ON WW 19, 1997
IN T HE AS S EMB L Y LINE "C"
Note: "P" in as s embly line
pos ition indicates "Lead-F ree"
INT ERNAT IONAL
RECT IF IER
LOGO
AS S EMB LY
L OT CODE
PART NU MB ER
DAT E CODE
YE AR 7 = 1997
WEE K 19
LINE C
OR
INT ERNAT IONAL
RE CT IF IER
LOGO
AS S EMB LY
LOT CODE
10
PART NUMB ER
DAT E CODE
P = DES IGNAT ES LEAD-F REE
PR ODU CT (OPT IONAL)
YEAR 7 = 1997
WEE K 19
A = AS S EMB LY S IT E CODE
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IRF2204S/LPbF
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
FEED DIRECTION 1.85 (.073)
11.60 (.457)
11.40 (.449)
1.65 (.065)
0.368 (.0145)
0.342 (.0135)
15.42 (.609)
15.22 (.601)
24.30 (.957)
23.90 (.941)
TRL
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039)
24.40 (.961)
3
30.40 (1.197)
MAX.
4
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Starting TJ = 25°C, L = 0.06mH
RG = 25Ω, IAS = 130A. (See Figure 12).
ISD ≤ 130A, di/dt ≤ 170A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 75A.
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.06/04
www.irf.com
11
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/