LINER LT3748IMSPBF 100v isolated flyback controller Datasheet

LT3748
100V Isolated
Flyback Controller
Features
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Description
5V to 100V Input Voltage Range
1.9A Average Gate Drive Source and Sink Current
Boundary Mode Operation
No Transformer Third Winding or Opto-Isolator
Required for Regulation
Primary-Side Winding Feedback Load Regulation
VOUT Set with Two External Resistors
INTVCC Pin for Control of Gate Driver Voltage
Programmable Soft Start
Programmable Undervoltage Lockout
Available in MSOP Package
The LT®3748 is a switching regulator controller specifically
designed for the isolated flyback topology and capable of
high power. It drives a low side external N-channel power
MOSFET from an internally regulated 7V supply. No third
winding or opto-isolator is required for regulation as the
part senses the isolated output voltage directly from the
primary-side flyback waveform.
The LT3748 utilizes boundary mode to provide a small
magnetic solution without compromising load regulation.
Operating frequency is set by load current and transformer
magnetizing inductance. The gate drive of the LT3748
combined with a suitable external MOSFET allow it to
deliver load power up to several tens of watts from input
voltages as high as 100V.
Applications
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Isolated Telecom Converters
High Power Automotive Supplies
Isolated Industrial Power Supplies
The LT3748 is available in a high voltage 16-lead MSOP
package with four leads removed.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 5438499 and 7471522.
Typical Application
25W, 12V Output, Isolated Telecom Supply
VOUT+
12V
2A
4:1
VIN
36V TO 72V
412k
EN/UVLO
60.8µH
VIN
RFB
15.4k
3.8µH
243k
VOUT–
RREF
TC
GATE
SS
SENSE
VC
56.2k
2nF
GND
12.2
11.8
VIN = 72V
VIN = 48V
VIN = 36V
11.6
INTVCC
0.033Ω
10k
4700pF
14.4
12.0
6.04k
LT3748
100µF
12.6
VOUT (V)
10µF
Output Load and Line Regulation
3748 TA01a
4.7µF
11.4
0
0.5
1.0
1.5
LOAD CURRENT (A)
2.0
3748 TA01b
3748f
LT3748
Absolute Maximum Ratings
(Note 1)
Pin Configuration
VIN, RFB. ..................................................................100V
VIN to RFB..................................................................±5V
EN/UVLO.......................................................–0.3V, 100V
INTVCC.....................................................VIN + 0.3V, 20V
SS, VC, TC, RREF..........................................................6V
SENSE.......................................................................0.4V
Maximum Junction Temperature........................... 125°C
Operating Junction Temperature Range
(Note 2)................................................... –40°C to 125°C
Storage Temperature Range................... –65°C to 150°C
TOP VIEW
VIN 1
16 RFB
EN/UVLO 3
INTVCC
GATE
SENSE
GND
14 RREF
5
6
7
8
12
11
10
9
TC
VC
SS
GND
MS PACKAGE
16 (12)-LEAD PLASTIC MSOP
TJMAX = 125°C, θJA = 90°C/W
order information
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT3748EMS#PBF
LT3748EMS#TRPBF
3748
16-Lead Plastic MSOP
–40°C to 125°C
LT3748IMS#PBF
LT3748IMS#TRPBF
3748
16-Lead Plastic MSOP
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
Electrical Characteristics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 10V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
100
V
Not Switching
VEN/UVLO = 0.2V
1.3
0
1.75
1
mA
µA
VIN Quiescent Current, INTVCC Overdriven
VINTVCC = 10V
300
450
µA
20
V
7.2
V
Input Voltage Range
INTVCC Voltage Range
l
INTVCC Pin Regulation Voltage
INTVCC Dropout
5
UNITS
Quiescent Current
l
4.5
6.8
(VIN – VINTVCC), IINTVCC = 10mA, VIN = 5V
7
0.7
V
INTVCC Undervoltage Lockout
Falling Threshold
l
3.45
3.6
3.75
V
EN/UVLO Pin Threshold
EN/UVLO Pin Voltage Rising
l
1.19
1.223
1.25
V
EN/UVLO Pin Hysteresis Current
EN/UVLO = 1V
1.9
2.4
2.9
µA
Soft-Start Current
VSS = 0.4V (Note 3)
5
Soft-Start Threshold
0.65
Soft-Start Reset Current
Maximum SENSE Current Limit Threshold
Maximum to Minimum SENSE Threshold
Ratio
V
3
VC = 2.2V
l
Minimum SENSE Current Limit Threshold
µA
95
90
VC = 0V
100
100
mA
105
110
15
l
5.2
6.6
mV
mV
mV
8.2
mV/mV
3748f
LT3748
Electrical Characteristics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 10V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
SENSE Overcurrent Threshold
VC = 2.2V
115
130
145
mV
SENSE Input Bias Current
VSENSE = 10mV (Note 3)
10
15
20
µA
RREF Voltage
VC = 1.1V
1.20
1.195
1.223
1.24
1.245
V
V
0.005
0.025
%/V
35
500
nA
l
RREF Voltage Line Regulation
5V < VIN < 100V
RREF Pin Bias Current
(Note 3)
TC Current into RREF
RTC = 20k
l
Error Amplifier Voltage Gain
27.5
µA
115
V/V
Error Amplifier Transconductance
∆I = 10µA
155
µmhos
VC Source Current
VC = 1.1V, VRREF = 0.5V
–45
µA
VC Sink Current
VC = 1.1V, VRREF = 2V
48
µA
Flyback Comparator Trip Current
Current into RFB Pin, RREF = 6.04k
10
µA
Minimum GATE Off-Time
700
ns
Minimum GATE On-Time
250
ns
24
µs
Maximum Discontinuous Off-Time
VC = 0V
Maximum GATE Off-Time
VRREF = 0.5V
55
µs
Maximum GATE On-Time
VSENSE = 0V
55
µs
GATE Output Rise Time
CL = 3300pF, 10% to 90%
16
ns
GATE Output Fall Time
CL = 3300pF, 10% to 90%
16
ns
GATE Output Low (VOL)
GATE Output High (VOH)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT3748E is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the –40°C
0.05
V
VINTVCC – 0.05
V
to 125°C operating junction temperature range are assured by design
characterization and correlation with statistical process controls. The
LT3748I is guaranteed over the full –40°C to 125°C operating junction
temperature range.
Note 3: Current flows out of the pin.
3748f
LT3748
Typical Performance Characteristics TA = 25°C, unless otherwise noted.
1.7
1.6
VSS = 0V
1.6 INTVCC = OPEN
VOUT (V)
15.2
15.0
14.8
14.6
VIN = 72V
1.5
1.4
VIN = 36V
1.3
VIN = 12V
1.2
1.1
VIN = 6V
1.0
0
0.8
–50 –25
25 50 75 100 125 150
TEMPERATURE (oC)
0
7.5
6.8
6.7
6.6
6.5
–50 –25
0
6.0
5.5
3.4
4
6
8
10
20
40
60
0
10
20
30
INTVCC CURRENT (mA)
Soft-Start Current vs Temperature
VIN = 5V
40
3748 G07
2.0
25 50 75 100 125 150
TEMPERATURE (°C)
3748 G06
SOFT-START CURRENT (µA)
INTVCC DROPOUT (V)
INTVCC REGULATOR DROPOUT (V)
150°C
100°C
25°C
–50°C
0
6
2.5
0.5
3.3
–50 –25
100
INTVCC Dropout vs Temperature
2.5
0
80
3748 G05
VIN = 5V
100
FALLING THRESHOLD
VIN VOLTAGE (V)
3.0
1.0
80
RISING THRESHOLD
3.6
4.5
INTVCC Regulator Dropout
vs INTVCC Current
1.5
60
VIN (V)
3.7
3.5
4.0
25 50 75 100 125 150
TEMPERATURE (°C)
2.0
40
3.8
5.0
3748 G04
3.0
20
3.9
IINTVCC = 10mA
INTVCC UVLO (V)
VINTVCC (V)
INTVCC VOLTAGE (V)
IINTVCC = 10mA
0
4.0
6.5
7.2
6.9
0.4
INTVCC Undervoltage Lockout
vs Temperature
IINTVCC = 0mA
7.0
7.3
7.0
0.6
3748 G03
INTVCC Voltage vs VIN Voltage
7.4
7.1
0.8
3748 G02
INTVCC Voltage vs Temperature
IINTVCC = 0mA
1.0
0
25 50 75 100 125 150
TEMPERATURE (°C)
3748 G01
7.5
1.2
0.2
0.9
14.4
–50 –25
VSS = 0V
INTVCC = OPEN
1.4
QUIESCENT CURRENT (mA)
QUIESCENT CURRENT (mA)
FIGURE 15 CIRCUIT
IOUT = 150mA ON EACH OUTPUT
VIN = 12V
15.4
Quiescent Current vs VIN Voltage
Quiescent Current vs Temperature
Output Regulation vs Temperature
15.6
IINTVCC = 20mA
1.5
IINTVCC = 10mA
1.0
0.5
5
4
3
2
1
IINTVCC = 5mA
0
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (oC)
3748 G08
0
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (oC)
3748 G09
3748f
LT3748
Typical Performance Characteristics
EN/UVLO Threshold
vs Temperature
EN/UVLO Current vs Temperature
0.8
1.35
2.0
VEN/UVLO = 0.9V
1.5
1.0
0.5
0.7
1.30
TC VOLTAGE (V)
VEN/UVLO = 1.1V
EN/UVLO THRESHOLD (V)
1.25
1.20
1.15
1.10
0
–50 –25
VEN/UVLO = 1.3V
0
0
60
190
50
SENSE Pin Threshold
vs Temperature
Error Amplifier Output Current
vs RREF Pin Voltage
160
SENSE THRESHOLD (mV)
20
160
150
140
10
0
–10
–20
130
–30
120
150°C
100°C
25°C
–50°C
–40
VIN = 100V
VIN = 6V
–50
–60
25 50 75 100 125 150
TEMPERATURE (°C)
0.5
0
1.5
1.0
VREF (V)
2.0
GATE RISE AND FALL TIME (ns)
MAXIMUM DISCONTINUOUS OFF-TIME (µs)
22
21
20
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
3748 G16
40
VC = 0.2V
0
25 50 75 100 125 150
TEMPERATURE (°C)
3748 G15
GATE Rise and Fall Time
vs INTVCC Voltage
1.5
AVERAGE
CURRENT
50
1.0
40
0.5
RISE TIME
30
0
FALL TIME
20
Q=C•V
VINTVCC = 7V
tr, tf 10% TO 90%
10
0
0
20
40
60
80
100
TOTAL GATE CHARGE (nC)
120
3748 G17
AVERAGE GATE SOURCE, SINK CURRENT (A)
29
23
60
GATE Rise and Fall Time vs Charge
2.0
24
80
0
–50 –25
2.5
30
25
VC = 2.2V
100
3748 G14
Maximum Discontinuous Off-Time
vs Temperature
26
120
20
3748 G13
28
OVERCURRENT
140
30
170
27
25 50 75 100 125 150
TEMPERATURE (°C)
3748 G12
40
180
IVC (µA)
TRANSCONDUCTANCE (µmhos)
200
0
0
3748 G11
Error Amplifier Transconductance
vs Temperature
100
–50 –25
0.3
0
–50 –25
25 50 75 100 125 150
TEMPERATURE (°C)
3748 G10
110
0.5
0.4
0.1
1.00
–50 –25
25 50 75 100 125 150
TEMPERATURE (°C)
0.6
0.2
1.05
25
GATE RISE AND FALL TIME (ns)
EN/UVLO CURRENT (µA)
TC Pin Voltage vs Temperature
0.9
1.40
3.0
2.5
TA = 25°C, unless otherwise noted.
CGATE = 3.3nF
tr, tf 10% TO 90%
20
FALLING
RISING
15
10
5
0
0
5
10
15
20
VINTVCC (V)
3748 G18
3748f
LT3748
Pin Functions
VIN (Pin 1) Input Voltage. This pin supplies current to the
internal start-up circuitry and is the reference voltage for
the feedback circuitry connected to the RFB pin. This pin
must be locally bypassed with a capacitor.
EN/UVLO (Pin 3): Enable/Undervoltage Lockout. A resistor
divider connected to VIN is tied to this pin to program the
minimum input voltage at which the LT3748 will operate.
At a voltage below ~0.5V, the part draws less than 1µA
quiescent current. When below 1.223V but above ~0.5V,
the part will draw quiescent current but will not regulate
the INTVCC supply or power the gate drive circuitry. Above
1.223V, all internal circuitry will start and the SS pin will
source 5μA. When EN/UVLO falls below 1.223V, 2.4μA is
sunk from the pin to provide programmable hysteresis
for undervoltage lockout.
INTVCC (Pin 5): Gate Driver Bias Voltage. This pin supplies
current to the internal gate driver circuitry of the LT3748.
The INTVCC pin must be locally bypassed with a capacitor.
This pin may also be connected to VIN if a third winding
is not used and if VIN ≤ 20V. If a third winding is used, the
INTVCC voltage should be lower than the input voltage for
proper operation.
GATE (Pin 6): N-Channel MOSFET Gate Driver Output.
Switches between INTVCC and GND.
SENSE (Pin 7): The Current Sense Input for the Control
Loop. Kelvin connect this pin to the positive terminal of
the switch current sense resistor, RSENSE, in the source
of the N-channel MOSFET. The negative terminal of the
current sense resistor should be connected to the GND
plane close to the IC.
GND (Pins 8, 9): Ground.
SS (Pin 10): Soft-Start Pin. This pin delays start-up and
clamps VC pin voltage. Soft-start timing is set by the size
of the external capacitor at the pin. Switching starts when
VSS reaches ~0.65V.
VC (Pin 11): Compensation Pin for the Internal Error
Amplifier. Connect a series RC from this pin to ground to
compensate the switching regulator. A 100pF capacitor in
parallel helps eliminate noise.
TC (Pin 12): Output Voltage Temperature Compensation.
Connect a resistor to ground to produce a current proportional to absolute temperature to be sourced into the
RREF node. ITC = 0.55V/RTC.
RREF (Pin 14): Input Pin for the External Ground-Referred
Reference Resistor. The resistor at this pin should be 6.04k,
but for convenience in selecting a resistor divider ratio,
the value may range from 5.76k to 6.34k. The resistor
should be as close to the LT3748 as possible.
RFB (Pin 16): Input Pin for the External Feedback Resistor.
This pin is connected to the transformer primary at the
external MOSFET power switch. The ratio of this resistor
to the RREF resistor, times the internal bandgap reference,
determines the output voltage (plus the effect of any
non-unity transformer turns ratio). The average current
through this resistor during the flyback period should be
approximately 200μA. The resistor should be as close
to the LT3748 as possible.
3748f
LT3748
block diagram
T1 DOUT
NPS:1
VIN
CIN
LPRI
LSEC
RFB
1
Q1
12
VOUT –
RFB
BOUNDARY
MODE DETECT
Q2
TC
1.223V
–A1
+
RTC
20µA
14
3
R2
2.4µA
+
A3
–
5
50µs MAX
OFF TIMER
+
gm
–
S
R
VARIABLE
DELAY TIMER
1.223V
EN/UVLO
INTVCC
CBIAS
ERROR AMP
1.223V
RREF
+
A4
–
6.04k
RREF
R1
INTERNAL
REFERENCE
AND
REGULATORS
MASTER
LATCH
S
Q
R
50µs MAX
ON TIMER
5µA
A4
GATE
NMOS
6
GND
8, 9
A2
––+
100mV
SENSE
7
CURRENT
LIMIT
10
SS
COUT
16
VIN
TC
CURRENT
VOUT +
RSENSE
VC
CSS
11
RC
3748 BD
CC
3748f
LT3748
Operation
The LT3748 is a current mode switching regulator controller designed specifically for the isolated flyback topology. The special problem normally encountered in such
circuits is that information relating to the output voltage
on the isolated secondary side of the transformer must
be communicated to the primary side in order to maintain
regulation. Historically, this has been done with optoisolators or extra transformer windings. Opto-isolator
circuits waste output power and the extra components
increase the cost and physical size of the power supply.
Opto-isolators can also exhibit trouble due to limited
dynamic response, nonlinearity, unit-to-unit variation
and aging over life. Circuits employing extra transformer
windings also exhibit deficiencies. Using an extra winding adds to the transformer’s physical size and cost, and
dynamic response is often mediocre.
The LT3748 derives its information about the isolated
output voltage by examining the primary-side flyback
pulse waveform. In this manner, no opto-isolator nor
extra transformer winding is required for regulation. The
output voltage is easily programmed with two resistors.
The LT3748 features a boundary mode control method,
(also called critical conduction mode) where the part
operates at the boundary between continuous conduction mode and discontinuous conduction mode. Due to
the boundary control mode operation, the output voltage
can be calculated from the transformer primary voltage
when the secondary current is almost zero. This method
improves load regulation without external resistors and
capacitors.
The Block Diagram shows an overall view of the system.
Many of the blocks are similar to those found in traditional
switching regulators, including current comparators, internal reference and regulators, logic, timers and an N‑channel
MOSFET gate driver. The novel sections include a special
sampling error amplifier and a temperature compensation
circuit.
Boundary Mode Operation
Boundary mode is a variable frequency, current mode
switching scheme. The external N-channel MOSFET turns
on and the inductor current increases until it reaches the VC
pin-controlled current limit. After the external MOSFET is
turned off, the voltage on the drain of the MOSFET rises to
the output voltage multiplied by the primary-to-secondary
transformer turns ratio plus the input voltage. When the
secondary current through the output diode falls to zero,
the voltage on the drain of the MOSFET falls below VIN . A
boundary mode detection comparator detects this event
and turns the external MOSFET back on.
Boundary mode returns the secondary current to zero
every cycle, so the parasitic resistive voltage drops do not
cause load regulation errors. Boundary mode also allows
the use of a smaller transformer compared to continuous conduction mode and does not exhibit subharmonic
oscillation.
At low output currents the LT3748 delays turning on the
external MOSFET and thus operates in discontinuous mode.
Unlike traditional flyback converters, the external MOSFET
has to turn on to update the output voltage information.
Below 0.6V on the VC pin, the current comparator level
decreases to its minimum value and a variable delay timer
waits to reset before turning on the external MOSFET. With
the addition of delay before turning the MOSFET back
on, the part starts to operate in discontinuous mode. The
average output current is able to decrease while still allowing a minimum off-time for the error amplifier sampling
circuitry. The typical maximum discontinuous off-time
with VC equal to 0V is 24µs.
3748f
LT3748
Applications Information
Pseudo-DC Theory of Operation
The RREF and RFB resistors as depicted in the Block Diagram
are external resistors used to program the output voltage.
The LT3748 operates much the same way as traditional
current mode switchers with the exception of the unique
error amplifier which derives its feedback information
from the flyback pulse.
Operation is as follows: when the NMOS output switch
turns off, its drain voltage rises above VIN. The amplitude
of this flyback pulse (i.e., the difference between it and
VIN) is given as:
VFLBK = (VOUT + VF + ISEC • ESR) • NPS
VF = DOUT forward voltage
ISEC = Transformer secondary current
ESR = Total impedance of secondary circuit
NPS = Transformer effective primary-to-secondary
turns ratio
The flyback voltage is converted to a current by RFB and
Q2. Nearly all of this current flows through resistor RREF to
form a ground-referred voltage. This voltage is fed into the
flyback error amplifier. The flyback error amplifier samples
this output voltage information when the secondary-side
winding current reaches zero. The error amplifier uses a
bandgap voltage, 1.223V, as the reference voltage.
The relatively high gain in the overall loop will then cause
the voltage at the RREF resistor to be nearly equal to the
bandgap reference voltage, VBG. The relationship between
VFLBK and VBG may then be expressed as:
 VFLBK  VBG
or
 R  = R
FB
REF
 R 
VFLBK = VBG  FB 
 RREF 
VBG = Internal bandgap reference
Combining with the previous VFLBK expression yields an
expression for VOUT, in terms of the internal reference,
programming resistors, transformer turns ratio and diode
forward voltage drop:
 R  1 
VOUT = VBG  FB  
− VF − ISEC (ESR)
 RREF   NPS 
Additionally, it includes the effect of nonzero secondary
output impedance (ESR). This term can be assumed to
be zero in boundary control mode.
Temperature Compensation
The first term in the VOUT equation does not have a temperature dependence, but the diode forward drop, VF, has a
significant negative temperature coefficient. To compensate
for this, a positive temperature coefficient current source
is internally connected to the RREF pin. The current is set
by resistor RTC to ground connected between the TC pin
and ground. To cancel the temperature coefficient, the
following equation is used:
d VF
R
1
= − FB •
•
dT
R TC
NPS
−RFB
1
R TC =
•
NPS d VF / d T
d VTC
or,
dT
dV
R
• TC ≈ FB
dT
NPS
(dVF /dT) = Diode’s forward voltage temperature coefficient
(dVTC /dT) = 1.85mV/°C
VTC = 0.55V
The resistor value given by this equation should also
be verified experimentally and adjusted, if necessary, to
achieve optimal regulation over temperature.
The revised output voltage is as follows:
 R  1 
VOUT = VBG  FB  
− VF
 RREF   NPS 
V  R
−  TC  • FB – ISEC (ESR)
 R TC  NPS
3748f
LT3748
Applications Information
Selecting Actual RREF , RFB and RTC Resistor Values
The preceding equations define how the LT3748 would
regulate the output voltage if the system had no time delays and no error sources. However, there are a number of
repeatable delays and parasitics in each application which
will affect the output voltage and force a re-evaluation of
the RFB and RTC component values. The following approach
is the best method for selecting the correct values.
The expression for VOUT, developed in the Operation section, can be rearranged to yield the following expression
for RFB:
RFB =
RREF • NPS ( VOUT + VF ) + VTC 
VBG
where:
VOUT = Output voltage
VF = Output diode forward voltage
NPS = Effective primary-to-secondary turns ratio
VTC = 0.55V
The equation assumes the temperature coefficients of the
output diode and VTC are equal and substitutes RFB/NPS for
the value of RTC. This is a good first order approximation
but will be revisited later.
First, the value of RREF should be approximately 6.04k
since the LT3748 is trimmed and specified using this
value. If the impedance of RREF varies considerably from
6.04k, additional errors will result. However, a variation in
RREF of several percent is acceptable. This yields a bit of
freedom in selecting standard 1% resistor values to yield
nominal RFB /RREF ratios.
With starting values for RFB and RTC, an initial iteration
of the application should be built with final selections of
all external components (transformer, diode, MOSFET,
etc.). The resulting VOUT should be measured and used
to re-evaluate the value of RFB due to non-idealities in the
sampling system:
RFB(NEW ) =
VOUT(DESIRED)
VOUT(MEASURED)
• RFB(OLD)
With a new value of RFB selected, the temperature coefficient of the output diode in the application can be
tested to verify the nominal RTC value. The RTC resistor
should be removed from the circuit under test (this will
cause VOUT to increase for this step) and VOUT should
be measured over temperature at a desired target output
load. It is very important for this evaluation that uniform
temperature be applied to both the output diode and the
LT3748—if freeze spray or a heat gun is used there can
be a significant mismatch in temperature between the
two devices that causes significant error. Attempting to
extrapolate the data from a diode datasheet or assuming
the nominal RTC value may yield a better result if there is
no method to apply uniform heat or cooling such as an
oven. With at least two data points (although more data
points from hot to cold are recommended), the change
in V/°C can be determined by:
∆VOUT
V
–V
= OUT1 OUT 2
∆TEMP TEMP1– TEMP2
Using the measured VOUT temperature coefficient, an exact
RTC value can be selected using the following equation:
R TC =
RFB 1.85mV/°C
•
∆VOUT
NPS
∆TEMP
If the value of RTC has changed significantly, which can
happen with the use of some output diodes that have
a very low forward drop, the RFB value may need to be
changed to restore VOUT to the desired value. As in the
previous iteration, after measuring VOUT , a new RFB can
once again be selected using:
RFB(NEW ) =
VOUT(DESIRED)
VOUT(MEASURED)
• RFB(OLD)
Once the values of RFB and RTC are selected, the regulation
accuracy from board to board for a given application will
be very consistent, typically under ±5% when including
device variation of all the components in the system
(assuming resistor tolerances and transformer windings
matching of 1% or better). However, if the transformer,
the output diode or MOSFET switch are changed or the
layout is dramatically altered, there may be some change
in VOUT .
3748f
10
LT3748
Applications Information
Minimum Primary Inductance Requirements
Output Power
The LT3748 obtains output voltage information from the
external MOSFET drain voltage when the secondary winding
conducts current. The sampling circuitry needs a minimum
of 400ns to settle and sample the output voltage while the
MOSFET switch is off. This required settle and sample
time is controlled by external components independent of
the minimum off-time of the GATE pin as specified in the
Electrical Characteristics table. The electrical specification
minimum off-time is based on an internal timer and acts
as a maximum frequency clamp. The following equation
gives the minimum value for primary-side magnetizing
inductance:
Because the MOSFET power switch is located outside the
LT3748, the maximum output power is primarily limited
by external components. Output power limitations can
be separated into three categories—voltage limitations,
current limitations and thermal limitations.
( VOUT + VF(DIODE) ) • RSENSE • t SETTLE(MIN) • NPS
VSE NSE(MIN)
VSENSE(MIN) = 15mV
tSETTLE(MIN) = 400ns
NPS = Ratio of primary windings to secondary windings
In addition to the primary inductance requirement for
minimum settling and sampling time, the LT3748 has
internal circuit constraints that prevent it from setting the
GATE node high for shorter than approximately 250ns.
If the inductor current exceeds the desired current limit
during that time oscillation may occur at the output as
the current control loop will lose its ability to regulate.
Therefore, the following equation relating to maximum
input voltage must also be followed in selecting primaryside magnetizing inductance:
LPRI ≥
50
VIN(MAX) •RSENSE • tON(MIN)
VSENSE(MIN)
tON(MIN) = 250ns
The last constraint on minimum inductance value would
relate to minimum full-load operating frequency, fMIN, and
is derived from fSW = 1/(tON + tOFF):
LPRI ≤ VIN(MIN) • (VOUT + VF(DIODE)) • NPS/(fSW(MIN) • ILIM •
((VOUT + VF(DIODE)) • NPS + VIN(MIN)))
The minimum operating frequency may be lower than
the calculated number due to delays in detecting current
limit and detecting boundary mode that are specific to
each application.
VDS = 200V
MAXIMUM OUTPUT POWER (W)
L PRI ≥
The voltage limitations in a flyback design are primarily
the MOSFET switch VDS(MAX) and the output diode reverse-bias rating. Increasing the voltage rating of either
component will typically decrease application efficiency if
all else is equal and the voltage requirements on each of
those components will be directly related to the windings
ratio of the transformer, the input and output voltages
and the use of any additional snubbing components.
The MOSFET VDS(MAX) must theoretically be higher than
VIN(MAX) + (VOUT • NPS) and the output diode reverse bias
must be higher than VOUT + (VIN(MAX)/NPS), though leakage inductance spikes on both the drain of the MOSFET
and the anode of the output diode may more than double
that requirement (see section on leakage inductance for
more details on snubbers). Figure 1 illustrates the effect
on available output power for several MOSFET voltage
ratings while continuously maximizing windings ratio
for input voltage with a fixed MOSFET current limit and
output voltage. Increasing the MOSFET rating increases
the possible windings ratio and or maximum input voltage
and can increase the available output power for a given
application. Both figures assume no leakage inductance
and high efficiency.
40
VDS = 150V
30
VDS = 100V
20
10
0
0
20
60
40
INPUT VOLTAGE (V)
80
100
3748 F01
Figure 1. Maximum Output Power at 12VOUT with a
3A ILIM and Maximum VDS = 100V, 150V, 200V
3748f
11
LT3748
Applications Information
The current limitation on output power delivery is generally constrained by transformer saturation current in
higher power applications, although the MOSFET switch
and output diode will need to be rated for the desired
currents, as well. Increasing the peak current on the primary side of the flyback by reducing the RSENSE resistor
is the primary way to increase output power, and power
delivered increases fairly linearly with current limit as
shown in Figure 2, until parasitic losses begin to dominate.
However, once the saturation current of the transformer
is exceeded the energy coupling between the primary and
the secondary will be reduced and incremental power will
not be delivered to the output. In addition, the primary
inductance will drop, the SENSE pin overcurrent threshold
may trip due to a corresponding rapid rise in current, and
the transformer will have to absorb the energy that is not
transferred through the saturated core, leading to heating.
Some manufacturers may not specify the rated saturation
current but it is a necessary specification when trying to
minimize transformer size and maximize output power
and efficiency. Also necessary for proper design is data
on saturation current over temperature­—the saturation
of typical power ferrites may reduce by over 20% from
25°C to 100°C.
The thermal limitation in flyback applications for lower
output voltages will be dominated by losses in the output
diode, with resistive and leakage losses in the transformer
50
MAXIMUM OUTPUT POWER (W)
ILIM = 3A
40
ILIM = 2A
30
20
ILIM = 1A
10
0
0
20
60
40
INPUT VOLTAGE (V)
80
100
3748 F02
increasing as a percentage basis of loss as the output
voltage is increased. As power levels increase the output
diode and transformer may exceed their rated temperature
specifications. Minimizing RMS output diode current,
selecting a diode with minimal forward drop at expected
currents and minimizing parasitic resistances and leakage
inductance in the transformer will keep those components
below their maximum temperatures while maximizing
efficiency. The following section discussing transformer
selection will further help focus on how to minimize losses
in the output diode.
While quiescent current in the LT3748 itself is low (approximately 300µA from VIN and 1mA from INTVCC), the
current required to drive the external MOSFET (fSW • QG), if
drawn from VIN through the LT3748 INTVCC LDO, dissipates
(VIN – INTVCC) • fSW • QG. If that power is high enough to
cause significant heating of the LT3748 the current may
need to be drawn from a third winding. Doing so will push
all thermal limitations outside of the LT3748.
Selecting a Transformer
Transformer specification and design is perhaps the most
critical part of successfully applying the LT3748. In addition
to the usual list of caveats dealing with high frequency
isolated power supply transformer design, the following
information should be carefully considered.
First and most importantly, since the voltage on the secondary side of the transformer is inferred by the voltage
sampled on the primary, the transformer turns ratio must
be tightly controlled to ensure a consistent output voltage. A tolerance of ±5% in turns ratio from transformer to
transformer could result in a variation of more than ±5% in
output regulation. Fortunately, most magnetic component
manufacturers are capable of guaranteeing a turns ratio
tolerance of 1% or better.
Linear Technology has worked with several leading magnetic component manufacturers to produce predesigned
flyback transformers for use with the LT3748. Table 1
shows the details of several of these transformers.
Figure 2. Maximum Output Power at 12VOUT
with 150V VDS(MAX) and ILIM = 1A, 2A, 3A
3748f
12
LT3748
Applications Information
Table 1. Pre-Designed Transformers—Typical Specifications Unless Otherwise Noted
TRANSFORMER
PART NUMBER
LLEAK
(nH)
NPS
(NP:NS)
ISAT
(A)
RPRI
(mΩ)
RSEC
(mΩ)
TARGET APPLICATION†
Size (W x L x H) mm
LPRI
(µH)
MANUFACTURER
INPUT (V)
OUTPUT
750311424
17.7 × 14.0 × 12.7
100
844
3:1
3
180
29
Würth Electronics
40 to 75
12V/1A
750311456*
17.7 × 14.0 × 12.7
100
900
3:1
2.4
225
31
Würth Electronics
40 to 75
12V/1A
750311439
17.7 × 14.0 × 12.7
37
750
2:1
2.8
89
28
Würth Electronics
30 to 75
12V/1A
750311423
17.7 × 14.0 × 12.7
50
570
4:1
4
90
12
Würth Electronics
30 to 75
5V/3A
750311457
17.7 × 14.0 × 12.7
50
600
4:1
3.7
115
12
Würth Electronics
30 to 75
5V/3A
750311689
17.7 × 14.0 × 12.7
50
600
4:1
3.7
115
12
Würth Electronics
30 to 75
5V/3A
750311458*
17.7 × 14.0 × 12.7
15
175
3:1
5
35
6
Würth Electronics
10 to 40
5V/2.5A
750311564
17.7 × 14.0 × 12.7
9
120
3:1
8
36
7
Würth Electronics
10 to 40
5V/3A
750311624
17.7 × 14.0 × 12.7
9
150
1.5:1
8
34
21
Würth Electronics
10 to 40
15V/1A
750311604
29.08 × 23.11 × 11.43
8
300
1:1
9.5
30
12
Würth Electronics
10 to 40
24V/1.3A
750311599
29.08 × 23.11 × 11.43
8
500
1.5:1
12
30
12
Würth Electronics
10 to 40
15V/2A
750311600
29.08 × 23.11 × 11.43
12
500
3:1
11
30
40
Würth Electronics
20 to 75
15V/2A
750311608
29.08 × 23.11 × 11.43
12
500
1.5:1
9
30
20
Würth Electronics
20 to 75
24V/1.3A
750311607
29.08 × 23.11 × 11.43
14
500
2.5:1
9.5
40
10
Würth Electronics
20 to 75
12V/2.5A
750311590
32.31 × 27.03 × 13.69
8
200
2:1
18
15
8
Würth Electronics
10 to 40
12V/3.8A
750311591
32.31 × 27.03 × 13.69
8
200
1.5:1
20
15
12
Würth Electronics
10 to 40
15V/3A
750311592
32.31 × 27.03 × 13.69
8
200
1:1
18
15
20
Würth Electronics
10 to 40
24V/1.9A
750311594
32.31 × 27.03 × 13.69
15
400
2.33:1
18
35
15
Würth Electronics
20 to 75
12V/3.8A
750311595
32.31 × 27.03 × 13.69
12
200
3:1
18
15
12
Würth Electronics
20 to 70
15V/3A
750311596
32.31 × 27.03 × 13.69
12
200
1.5:1
16
30
30
Würth Electronics
20 to 70
24V/1.9A
PA2367NL
17.7 × 14.0 × 12.7
85
750
2.7:1
1.7
325
26
Pulse Engineering
20 to 75
12V/1A
PA1276NL
17.7 × 14.0 × 12.7
77.4
800
1.47:1
1.6
100
75
Pulse Engineering
20 to 75
12V/1A
PA2467NL
17.7 × 14.0 × 12.7
37
750
2:1
2.9
89
28
Pulse Engineering
20 to 75
12V/1A
PA1260NL
17.7 × 14.0 × 12.7
77.4
800
3.67:1
1.5
220
18
Pulse Engineering
20 to 75
5V/2A
PA3177NL
29.21 × 21.84 × 11.43
8.3
100
2:1
8.6
10
7
Pulse Engineering
10 to 40
10V/2.5A
*2.5k isolation, others are rated for 1.5kV isolation.
†TARGET APPLICATION, NOT GUARANTEED.
Turns Ratio and RMS Diode Current
Note that when using an RFB/RREF resistor ratio to set
output voltage, the user has relative freedom in selecting
a transformer turns ratio to suit a given application. In
contrast, simpler ratios of small integers (e.g., 1:1, 2:1,
3:2, etc.) can be employed to provide more freedom in
setting total turns and mutual inductance.
While the turns ratio can be selected to maximize output
power for a given current limit, minimizing the turns
ratio and increasing the current limit will often increase
efficiency and better utilize the saturation current of a
given transformer. Figure 3 shows the maximum output
power using three transformers with different windings
ratios that have the same output inductance and peak
output current, illustrating that increasing current while
decreasing turns ratio can deliver more power.
There are two significant constraints on the turns ratio.
First, as described in the previous section on limitations
to output power, the drain of the MOSFET switch will
see a voltage equal to the maximum input supply plus
3748f
13
LT3748
Applications Information
( VOUT + VF(DODE) ) • NPS
VIN + ( VOUT + VF(DIODE) ) • NPS
IDIODE(RMS) =
(ILIM • NPS )2 • (1– D)
3
There are several caveats to this evaluation. First, as the
diode forward voltage becomes a smaller percentage of
total loss at higher output voltages (>12V) the RMS current
becomes less of a concern and minimizing it will have a
much smaller impact on efficiency. More significantly, if
a lower turns ratio forces the use of a diode with a larger
forward drop to obtain a higher reverse voltage rating,
any gains from minimizing current might be lost. For low
output voltages (3.3V or 5V) or high input voltages (>48V),
a turns ratio greater than one can be used with multiple
primary windings relative to the secondary to maximize
the transformer’s current gain.
OUTPUT POWER (W)
15
NPS = 3:1
ILIM = 2A
NPS = 6:1
ILIM = 1A
10
5
0
20
0
60
40
INPUT VOLTAGE (V)
80
100
3748 F03
Figure 3. Maximum Output Power at 12V Out Using Three
Transformers with Equal Peak Output Current and Secondary
Inductance
100
VIN = 12V
95
DOUT
90
85
80
fSW • QG + IQ
FET RDS(ON)
75
TRANSFORMER I • R + LEAKAGE
70
0.2A MIN
2A MAX
IOUT (A)
3748 F03
Figure 4. Sources of Loss In 5V, 2A Out Typical Application
100
32
ILIM = 3A
ILIM = 2A
95
28
OUTPUT
POWER
90
24
85
20
80
16
75
12
70
8
EFFICIENCY
65
60
4
0
3
6
9
NPS
12
15
18
MAXIMUM OUTPUT POWER (W)
For a more general analysis, Figure 5 illustrates a sweep
of windings ratio on the x-axis while comparing output
power and estimated efficiency for a 5V output using a
48V input. If the desired application required 20W, the
maximum power curve indicates that a winding ratio of
12:1 would be sufficient at a current limit of 2A (RSENSE =
0.05Ω), while a winding ratio of 5:1 would deliver the same
power at 3A. However, when examining the corresponding
efficiency at max load for those two windings ratios and
current limits, the 5:1, 3A selection is clearly the superior
solution with an estimated efficiency of 85% compared to
78% for the 12:1, 2A application.
NPS = 2:1
ILIM = 3A
20
EFFICIENCY LOSS (%)
D=
25
ESTIMATED MAX LOAD EFFICIENCY (%)
the output voltage multiplied by the windings ratio plus
some amount of overshoot caused by leakage inductance.
Second, increasing the turns ratio will increase the peak
current seen on the output diode generally increasing the
RMS diode current thereby lowering the efficiency. This
efficiency limitation is worse at lower output voltages when
the diode forward voltage is significant compared to the
output voltage. In a typical application such as the 5V, 2A
output shown on the back page, the diode losses dominate
all the other losses, as shown in Figure 4. To calculate
RMS diode current, two equations are needed—the first
for calculating duty cycle, D, and the second to calculate
the RMS current of a triangle waveform:
0
3748 F05
Figure 5. Estimated Efficiency and Output Power at 5VOUT from
48VIN vs Windings Ratio, NPS, at 2A and 3A Current Limits
3748f
14
LT3748
Applications Information
Saturation Current
As discussed earlier in the Maximum Output Power section, because the core of the transformer is being used for
energy storage in a flyback, the current in the transformer
windings should not exceed their rated saturation current
as energy injected once the core is saturated will not be
transferred to the secondary and will instead be dissipated
in the core. Information on saturation current should be
provided by the transformer manufacturers and Table 1
lists the saturation current of the transformers designed
for use with the LT3748.
the observed periods (tPERIOD, and tPERIOD(SNUBBED)) and
snubber capacitance (CSNUBBER) is below, and the resultant
waveforms are shown in Figure 6.
CPAR =
CSNUBBER
PERIOD
2
t
LPAR = PERIOD 2
CPAR • 4π
RSNUBBER =
Leakage Inductance and Snubbers
In most cases, proper selection of the external MOSFET
and a well designed transformer will eliminate the need for
snubber circuitry, but in some cases the optimal MOSFET
may require protection from this leakage spike. An RC
(resistor capacitor) snubber may be sufficient in applications where the MOSFET has significant margin beyond
the predicted DC drain voltage applied in flyback while a
clamp using an RCD (resistor capacitor diode) or a Zener
might be a better option when using a MOSFET with very
little margin for leakage inductance spiking.
The recommended approach for designing an RC snubber
is to measure the period of the ringing at the MOSFET drain
when the MOSFET turns off without the snubber and then
add capacitance—starting with something in the range of
100pF—until the period of the ringing is 1.5 to 2 times
longer. The change in period will determine the value of the
parasitic capacitance, from which the parasitic inductance
can be determined from the initial period, as well. Similarly,
initial values can be estimating using stated switch capacitance and transformer leakage inductance. Once the value
of the drain node capacitance and inductance is known, a
series resistor can be added to the snubber capacitance
to dissipate power and critically dampen the ringing. The
equation for deriving the optimal series resistance using
LPAR
CPAR
90
80
70
60
VDRAIN (V)
Transformer leakage inductance (on either the primary
or secondary) causes a voltage spike to appear at the
primary after the MOSFET switch turns off. This spike is
increasingly prominent at higher load currents where more
stored energy must be dissipated. Transformer leakage
inductance should be minimized.
2
 tPERIOD(SNUBBED) 

 – 1
t
50
40
30
NO SNUBBER
WITH SNUBBER
CAPACITOR
WITH RESISTOR
AND CAPACITOR
20
10
0
0
0.05
0.10
0.15 0.20
TIME (µs)
0.25
0.30
3748 F06
Figure 6. Observed Waveforms at MOSFET Drain when
Iteratively Implementing an RC Snubber
Note that energy absorbed by a snubber will be converted
to heat and will not be delivered to the load. In lower
power applications, the snubber may significantly reduce
efficiency and in higher power applications, the snubber
may need to be sized for thermal dissipation. To determine
the power dissipated in the snubber resistor, it is easiest
to measure the peak voltage across the snubber capacitance once the series resistance has been added and then
use the following equation relating that voltage and the
MOSFET switching frequency to determine the maximum
power dissipation assuming the capacitor is completely
discharged each cycle:
PSNUBBER(MAX) = fSW • CSNUBBER • VPEAK2
Decreasing the value of the capacitor may reduce the dissipated power in the snubber at the expense of increased
3748f
15
LT3748
Applications Information
voltage on the MOSFET drain, while decreasing the value
of the resistor and optionally increasing the capacitance
as well will decrease the overshoot. An example of an RC
snubber with minimal power dissipation but sufficient
protection for the MOSFET switch is shown in the 48V,
0.5A output typical application, Figure 17.
An RCD clamp, shown in Figure 7, also prevents the
leakage inductance spike from exceeding the breakdown
voltage of the MOSFET switch. In most applications, there
will be a very fast voltage spike caused by a slow clamp
diode. Once the diode clamps, the leakage inductance
current is absorbed by the clamp capacitor. This period
should not last longer than 200ns so as not to interfere
with the output regulation. The clamp diode turns off after
the leakage inductance energy is absorbed and the switch
voltage is then equal to:
ring beyond that expected reverse voltage. An RC snubber
or RCD clamp may be implemented to reduce the voltage
spike if it is desirable to use a lower reverse voltage diode.
Secondary Leakage Inductance
In addition to the previously described effects of leakage
inductance in general, leakage inductance on the secondary
in particular exhibits an additional phenomena. It forms an
inductive divider on the transformer secondary that effectively reduces the size of the primary-referred flyback pulse
used for feedback. This will increase the output voltage
target by a similar percentage. Note that, unlike leakage
spike behavior, this phenomena is load independent. To the
extent that the secondary leakage inductance is a constant
percentage of mutual inductance (over manufacturing
200
VDS = VIN + NPS • (VOUT + VF(DIODE))
180
LLEAK
VIN
C
VOUT+
R
160
DRAIN VOLTAGE (V)
Schottky diodes are typically the best choice for use in a
snubber, but some PN diodes can be used if they turn on
fast enough to limit the leakage inductance spike. Figures 8
and 9 show the waveform at the drain of the MOSFET
switch for the 48V output application shown in Figure 17
at maximum rated load and maximum input voltage with
an RC snubber and RCD clamp, respectively. Both solutions limit the leakage spike to less than 190V, below the
200V VDS(MAX) rating of the Si7464DP MOSFET.
100
80
60
VIN = 96V
VOUT = 48V
IOUT = 0.5A
R = 66Ω
C = 150pF
40
20
0
0
50
100
150
200
TIME (ns)
300
250
3748 F08
Figure 8. Waveform of MOSFET Drain During Normal Operation
of Figure 17 with RC Snubber (as Drawn)
200
180
+
D
VOUT–
NMOS
3748 F07
Figure 7. RCD Clamp
Leakage Inductance and Output Diode Stress
The output diode may also see increased reverse voltage
stresses from leakage inductance. While it nominally sees
a reverse voltage of the input voltage divided by the windings ratio plus the output voltage when the MOSFET power
switch turns on, the capacitance on the output diode and
the leakage inductance will cause an LC tank which may
160
DRAIN VOLTAGE (V)
GATE
16
140
120
140
120
100
80
VIN = 96V
VOUT = 48V
IOUT = 0.5A
R = 4.99k
C = TDK 0.22µF 250V
D = CMR1U-02M-LTC
60
40
20
0
0
50
100
150
200
TIME (ns)
250
300
3748 F08
Figure 9. Waveform of MOSFET Drain During Normal Operation
of Figure 17 Using RCD Clamp with Central Semiconductor
CMR1U-02M-LTC Instead of RC Snubber
3748f
LT3748
Applications Information
variations), this can be accommodated by adjusting the
RFB /RREF resistor ratio.
Winding Resistance Effects
Resistance in either the primary or secondary will reduce
overall efficiency (POUT /PIN). Good output voltage regulation will be maintained independent of winding resistance
due to the boundary mode operation of the LT3748.
Bifilar Winding
A bifilar, or similar winding technique, is a good way to
minimize troublesome leakage inductances. However, remember that this will also increase primary-to-secondary
capacitance and limit the primary-to-secondary breakdown
voltage, so, bifilar winding is not always practical. The
Linear Technology Applications group is available and
extremely qualified to assist in the selection and/or design
of the transformer.
Selecting a Current Sense Resistor
The external current sense resistor allows the user to
optimize the current limit behavior for the particular application under consideration. As the current sense resistor
is varied from several ohms down to tens of milliohms,
peak switch current goes from a fraction of an ampere
to tens of amperes. Care must be taken to ensure proper
circuit operation, especially with small current sense
resistor values.
For example, a peak MOSFET switch current of 4A requires
a sense resistor of 0.025Ω. Note that the instantaneous
peak power in the sense resistor is 1W, and it must be
rated accordingly. The LT3748 has only a single sense line
to this resistor. Therefore, any parasitic resistance in the
ground side connection of the sense resistor will increase
its apparent value. In the case of a 0.025Ω sense resistor,
1mΩ of parasitic resistance will cause a 4% reduction in
peak switch current. Therefore, resistance of printed circuit
copper traces and vias cannot necessarily be ignored.
Another issue for proper operation of the current sense
circuitry is avoiding prematurely tripping the SENSE
threshold while slewing the MOSFET drain when the GATE
pin goes high. The LT3748 does not begin to compare
the SENSE pin voltage with the target threshold until the
GATE pin is near its final value, or until at least 150ns
has passed, whichever occurs more slowly. This should
be entirely sufficient for most applications but premature
tripping of the SENSE comparator may occur in cases
where a MOSFET with very high QG is used with a series
resistor at the GATE pin.
Output Short Circuits and SENSE Pin Over Current
The LT3748 has an internal threshold to detect when
primary inductor current exceeds the programmed range.
This can result from an inductive output short-circuit and
an output voltage below zero, reflecting a voltage back to
the primary side of the transformer which, in turn, causes
the LT3748 to turn the external MOSFET on before the
secondary current has discharged. When the voltage at the
SENSE pin exceeds approximately 130mV—equivalent to
30% higher than the programmed ILIM(MAX) in the RSENSE
resistor—the SS pin will be reset, stopping switching.
Once the soft-start capacitor is recharged and the softstart threshold is reached, switching will resume at the
minimum current limit.
High Drain Capacitance and Low Current Operation
When designing applications with some combination of a
low current limit (ILIM < 1A), a high secondary-to-primary
turns ratio (NPS << 1), multiple output windings, or very
capacitive output diodes, it is important to minimize the
capacitance reflected onto the primary winding and on the
drain of the external MOSFET. After the MOSFET turns off
during each switching cycle, the primary current charges
that capacitance to slew the MOSFET drain until the secondary begins to deliver power, and if the drain node does not
slew and remain above VIN within approximately 200ns
once the GATE pin goes low and the MOSFET turns off,
the LT3748 may detect that the current in the secondary
is zero and turn the MOSFET back on prematurely, causing the LT3748 to switch continuously while delivering
very little power to the output. The result will be droop of
the output voltage at lighter loads and oscillation at the
VC node. This problem can be prevented by maximizing
NPS (minimizing ratio of secondary windings to primary
windings), increasing the peak drain current (minimizing
RSENSE), and minimizing the output diode and transformer
capacitance.
3748f
17
LT3748
Applications Information
Soft-Start
Minimum Load Requirement
The LT3748 contains an optional soft-start function that
is enabled by connecting an explicit external capacitor
between the SS pin and ground. Internal circuitry prevents
the control voltage at the VC pin from exceeding that on
the SS pin.
The LT3748 recovers output voltage information using
the flyback pulse that occurs once the external MOSFET
turns off and the secondary winding conducts current. In
order to regulate the output voltage, the LT3748 needs to
sample the flyback pulse. The LT3748 delivers a minimum
amount of energy even during light load conditions to
ensure accurate output voltage information. The minimum
delivery of energy creates a minimum load requirement
on the output of approximately 2% of maximum load.
The minimum operating frequency at minimum load is
approximately 42kHz.
The soft-start function is engaged whenever power at
VIN is removed, or as a result of either undervoltage
lockout, overcurrent in the sense resistor or thermal
(overtemperature) shutdown. The SS node is then
discharged to roughly 600mV. When this condition is
removed, a nominal 5µA current acts to charge up the SS
node towards roughly 2.2V. For example, a 0.1µF soft-start
capacitor will place a 0.05V/ms limit on the turn-on ramp
rate at the VC node.
ENABLE and Undervoltage Lockout (UVLO)
A resistive divider from VIN to the EN/UVLO pin implements
undervoltage lockout (UVLO). The EN/UVLO pin threshold
is set at 1.223V. In addition, the EN/UVLO pin draws 2.4µA
when the voltage at the pin is below 1.223V. This current
provides user programmable hysteresis based on the value
of R1. The effective UVLO thresholds are:
1 . 223V • (R1+ R2)
+ 2 . 4µA • R1
VIN(UVLO,RISING) =
R2
VIN(UVLO,FALLING) =
1 . 223V • (R1+ R2)
R2
Figure 10 shows the implementation of external shutdown
control while still using the UVLO function. The NMOS
grounds the EN/UVLO pin when turned on, and puts the
LT3748 in shutdown with a quiescent current draw of
less than 1µA.
VIN
R1
EN/UVLO
R2
LT3748
RUN/STOP
CONTROL
(OPTIONAL)
GND
3748 F10
Figure 10. Undervoltage Lockout (UVLO)
Alternatively, a Zener diode sufficiently rated to handle the
minimum load power can be used to provide a minimum
load without decreasing efficiency in normal operation. In
selecting a Zener diode for this purpose, the Zener voltage
should be high enough that the diode does not become the
load path during transient conditions but the voltage must
still be low enough that the MOSFET and output voltage
ratings are not exceeded when the Zener functions as the
minimum load.
INTVCC Pin Considerations
The INTVCC pin powers the internal circuitry and gate
driver of the LT3748. Three unique configurations exist
for regulation of the INTVCC pin as shown in Figure 11.
In the first configuration, the internal LDO drives the
INTVCC pin internally from the VIN supply. In the second
configuration, the VIN supply directly drives the INTVCC
pin through a direct connection bypassing the internal
LDO. Use this optional configuration for voltages lower
than 20V. In the third configuration, an external supply or
third winding drives the INTVCC pin. Use this option when
a voltage supply exists lower than the input supply but
higher than the regulated INTVCC voltage. Using a lower
voltage supply provides a more efficient source of power
for internal circuitry and reduces power dissipation in
the LT3748.
When calculating the minimum input voltage required for
a valid INTVCC , or the power dissipated in the LT3748, it is
useful to know how much current will be drawn from the
INTVCC LDO during normal operation. The easiest way to
calculate this current is to use the gate charge (QG) for the
3748f
18
LT3748
Applications Information
LT3748
VIN
3.0
5V TO 100V
VIN = 5V
2.5
INTVCC DROPOUT (V)
LDO
(VIN – DROPOUT) TO 7V
INTVCC
LT3748
VIN
2.0
INTVCC UVLO = 3.6V
1.5
1.0
IINTVCC = 20mA
0.5
5V TO 20V
0
–50 –25
LDO
0
25 50 75 100 125 150
TEMPERATURE (oC)
3748 F12
INTVCC
LT3748
VIN
LDO
Figure 12. INTVCC Current at Low VIN Can Cause the LT3748 to
Stop Switching Due to INTVCC Undervoltage Lockout
OPTIONAL
and IINTVCC = 20mA might be fully functional at room
temperature, but when the dropout for the same current
exceeds 1.4V and trips the UVLO at higher temperatures
the LT3748 will stop switching.
5V TO 100V
3.6V < BIAS < 20V,
VIN > BIAS
INTVCC
EXTERNAL SUPPLY
OR THIRD WINDING
Overdriving INTVCC with a Third Winding
3748 F09
Figure 11. INTVCC Pin Configurations
selected MOSFET switch at the expected VIN and INTVCC
voltages and multiply that charge required with each
turn-on event by the maximum operating frequency. The
maximum operating frequency in a given application can
be approximated from the primary transformer inductance,
the windings ratio (NPS), the nominal output voltage and
the maximum input voltage. Unless the part is limited by
minimum on- or off-times, this maximum frequency will
occur when the part is regulating in boundary mode at the
minimum peak switch current, and can be derived from:
fSW(MAX ) ≈
(
)
VIN(MAX ) • VOUT + VF(DIODE) • NPS
(
L PRI • ILIM(MIN) • VOUT + VF(DIODE) • NPS + VIN(MAX )
)
With the maximum INTVCC current calculated, the expected
dropout when VIN drops below 7V can be extracted from
the curves in the Typical Performance Characteristics section. The LT3748 is tested as low as VIN = 5V but the hard
limit on minimum VIN operation is the INTVCC regulator
dropout and the 3.6V under voltage lockout. Figure 12
illustrates an example where operation with VIN = 5V
The LT3748 provides excellent output voltage regulation
without the need for an opto-coupler or third winding,
but for some applications with input voltages greater than
20V, an additional winding may improve overall system
efficiency. The third winding should be designed to output a voltage between 7.2V and 20V. For a typical 48VIN,
10W application, overdriving the INTVCC pin may improve
efficiency by several percent at maximum load and as
much as 30% at light loads.
Loop Compensation
The LT3748 is compensated using an external resistorcapacitor network on the VC pin. Typical values are in the
range of RC = 50k and CC = 1nF (see the numerous schematics in the Typical Applications section for other possible
values). If too large of an RC value is used, the part will be
more susceptible to high frequency noise and jitter. If too
small of an RC value is used, the transient performance will
suffer. The value choice for CC is somewhat the inverse
of the RC choice: if too small a CC value is used, the loop
may be unstable and if too large a CC value is used, the
transient performance will also suffer. Transient response
plays an important role for any DC/DC converter.
3748f
19
LT3748
Applications Information
DESIGN EXAMPLE: 12VIN to 5V, 2A OUT
The first example is an automotive application shown on
the back page of this data sheet—a nominal 12VIN, 5VOUT
at 2A with an operating input voltage range of 6V to 45V
with a design focus of maximizing efficiency.
1. Select Transformer Turns Ratio
Transformer turns ratio will affect the requirements for the
MOSFET switch VDS rating, the output diode reverse bias
rating, the output power capability, and the efficiency of
the overall converter. Because the output voltage is low
compared to the forward drop on the output diode and
the currents are high in this application, efficiency can be
optimized by minimizing the RMS diode current. Although
typical efficiency in a variety of applications will be 85%
to 90%, due to compromises made for the wide input
voltage range and due to the low output voltage in this
specific application, an efficiency of 80% is assumed for
calculating output power. This assumption can be revised
once the application is tested. Equations for evaluating
each of the important criteria are:
NPS = NP/NS
VDS(MAX) ≥ VIN(MAX) + VOUT • NPS
VR(DIODE) ≥ VIN(MAX)/NPS + VOUT
IOUT(MAX) ≈ 0.80 • (1 – D) • NPS • ILIM/2
D = (VOUT + VF(DIODE)) • NPS/(VIN + (VOUT + VF(DIODE))
• NPS)
IDIODE(RMS) = √(ILIM • NPS)2 • (1 – D)/3
The equation for output power can be rearranged to solve
for the current limit, ILIM, which can be solved at the
nominal or the minimum VIN depending on application
requirements. In this application the 2A load requirement
will be set at VIN = 9V to reduce operating stresses at
higher input voltages. The results of the aforementioned
equations in this application are found in Table 2.
Evaluating the results of the table, the 1:2 turns ratio looks
demanding in terms of diode reverse-voltage requirements
(a diode with higher reverse bias capability generally will
have a larger forward drop and therefore lower application
efficiency) and primary side currents and only decreases
the output diode RMS current by 13% from the 1:1 case.
However, on evaluating the minimum and maximum inductance requirements in Step 3, even the 1:1 case does
not allow for enough on-time from maximum VIN for the
range of inductance that provides sufficient off-time.
For that reason, a 2:1 turns ratio is selected, easing the
requirement on the output diode reverse voltage rating
in the process.
2. Calculate Sense Resistor Value
The sense resistor can be calculated by the following
equation:
RSENSE =
100mV
ILIM
The desired 6A current limit leads to an unusual value of
0.017Ω, so the current limit is increased to use a more
standard 0.016Ω value and ILIM of 6.25A.
3. Select a Transformer Based on Inductance and
Saturation Current Requirements
The transformer in this application will be selected to
optimize efficiency at a 80kHz minimum switching frequency at maximum load from the nominal input voltage.
In applications where transformer size is the primary
requirement, reducing the current limit or increasing the
switching frequency may be required. The following equations select the inductance required for a given switching
frequency at max load and then verify that the inductance
is large enough to satisfy the minimum on and off times
of the LT3748.
Table 2. Voltage Stresses, Output Capability and Diode Current vs Turns Ratio in 12VIN to 5V, 2A Application
NPS
VDS(MAX)
VR(DIODE)
0.5
47.5
95
1
50
50
2
55
27.5
3
60
20
D (VIN = 12V)
D (VIN = 9V)
ILIM (2A OUT AT VIN = 9V)
IDIODE(RMS) (VIN = 12V)
0.19
0.23
13
3.4
0.31
0.38
8
3.9
0.48
0.55
6
4.6
0.58
0.65
5
5.3
3748f
20
LT3748
Applications Information
LPRI ≤ VIN(MIN) • (VOUT + VF(DIODE)) • NPS/(fSW(MIN) • ILIM •
((VOUT + VF(DIODE)) • NPS + VIN(MIN)))
LPRI ≥ (VOUT + VF(DIODE)) • RSENSE • 400ns • NPS/15mV
LPRI ≥ VIN(MAX) • RSENSE • 200ns/15mV
For this application, the primary inductance with a 2:1
transformer and a 0.016Ω sense resistor for an 6.25A
current limit is bounded by the minimum desired switching frequency and the minimum off time requirement to
be between 9.6µH and 11.5µH. Looking at Table 1, there
are no transformers that fit that exact requirement. For the
sake of prototyping, a transformer with slightly less than the
desired primary inductance is selected with the PA3177NL.
The application will need to be tested thoroughly for stability at higher input voltages and when the current limit
is at a minimum (in the middle of the output load range).
The easiest solution to ease the requirement on minimum
on-time is to reduce the maximum VIN voltage although
alternatively NPS could be increased at the expense of efficiency (and requiring a more thorough redesign).
4. Select a MOSFET Switch
The selected 2:1 transformer requires a nominal 55V rating
on the MOSFET switch, assuming no leakage inductance.
However, even a small amount of leakage inductance may
cause the drain to ring to double the anticipated voltage,
and generally this needs to be verified in the final design.
However, at currents below 10A it is fairly easy to find a
MOSFET with sufficiently low RDS(ON) to be a very small
contributor to maximum load efficiency losses while
similarly having a low enough QG to require minimum
current and minimal losses when driving the MOSFET at
lighter loads. Also, while considering the efficiency gains
and losses with a given MOSFET, it is important to realize that a trade-off in RDS(ON) for VDS(MAX) may backfire
if a snubber needs to be added to the circuit to meet the
voltage requirements and dissipates more energy than the
difference in switch resistance. For that reason, a Vishay
Si7738 is selected to give lots of margin with its 150V
rating. The RMS current in the MOSFET can be calculated,
squared and multiplied by the RDS(ON) to calculate losses
and the current required to drive the FET at frequency can
be determined, by the following equations:
IMOSFET(RMS) = √ILIM2 • D/3
IINTVCC = fSW • QG
PINTVCC = IINTVCC • (VIN – VINTVCC)
In this application the MOSFET RMS current at maximum
load is about 2.7A, which into the 0.038Ω RDS(ON) will be
0.28W, or on the order of 2% loss in efficiency. Assuming
that the maximum operating frequency is around four
times higher than the maximum load frequency (at about a
quarter the output load) and reading the approximate QG at
7V operation from the Vishay data sheet, the approximate
INTVCC current is likely close to 8mA, dissipating 0.04W
when the load is on the order of 2.5W, or less than 2%,
and much less at maximum load.
5. Select the Output Diode
The output diode reverse voltage, as calculated earlier, is the
first important specification for the output diode. As with
the MOSFET, choosing a diode with enough margin should
preclude the use of a snubber. The second criterion is the
power requirement of the diode which is more difficult to
correctly ascertain—some manufacturers give direct data
about power dissipation versus duty cycle, which can be
used with the data from the table to determine. To avoid
using a snubber, a diode with a 60V reverse-bias capability and minimal forward drop was selected—in this case,
the Diodes Inc. SBR 8U60P5. In this particular application
where maximizing efficiency is the goal, minimizing the
maximum voltage requirement on VIN may allow the use
of a diode with a lower reverse bias rating and a lower
forward drop which could further increase efficiency. Alternatively, if no efficient diode is available for a particular
reverse bias rating, it may be more beneficial to increase
the windings ratio until a diode with low forward drop can
be selected and then reevaluate whether that solution with
higher RMS diode current is beneficial.
3748f
21
LT3748
Applications Information
6. Select the Feedback Resistor for Proper Output
Voltage
9. Optimize the Compensation Network
Using the iterative process laid out earlier in the Applications
Information section, select the feedback resistor RFB and
program the output voltage to 5V. Adjust the RTC resistor
for temperature compensation of the output voltage. RREF
is selected as 6.04k.
7. Select the Output Capacitor
The output capacitor should be chosen to minimize the
output voltage ripple while considering the increase in
size and cost of a larger capacitor. The following equation
calculates the output voltage ripple:
∆VMAX =
L PRI • ILIM2
2 • COUT • VOUT
To set the compensation, the application is first configured
with a 22nF capacitor and 10k resistor as a starting point. A
load step is applied at both light and heavy loads at the 60V
maximum input voltage and the capacitance is decreased
until damping decreases to the desired limit, in this case
with a compensation capacitance of 2.2nF and a response
implying about 60˚ of phase margin. After verifying stability
at the minimum input voltage, as well, the compensation
capacitance is doubled for safety margin. The series resistance is varied from 5k to 50k but the optimal response
is observed with 25k. For best ripple performance, select
a compensation capacitor not less than 1nF, and select a
compensation resistor not greater than 50k.
10. Soft-Start Capacitor and UVLO Resistor Divider
8. Add Snubber Circuitry as Necessary
With the primary components selected, the application
should be constructed to evaluate ringing at the drain of the
MOSFET switch and to evaluate step response to optimize
the compensation network. If using an RC snubber, the
equations from the Applications Information section can
be used or a rough estimate of component values may
come from using the published leakage inductance of the
transformer and selecting a snubber capacitor ranging
from 2 to 3 times larger than the published MOSFET output
capacitance. In this example, at maximum load while at
maximum input voltage, the drain of the MOSFET switch
is probed and measured to peak at approximately 125V,
well below the 150V rating of the Si7738. Similarly, the
anode of the output diode is probed to look at potential
ringing when the MOSFET switch turns on and a peak of
45V is measured across the diode. Therefore, no snubber
circuitry is required.
A soft-start capacitor helps during the start-up of the
flyback converter. Select the UVLO resistor divider for
the intended input operation range. These equations are
aforementioned.
DESIGN EXAMPLE: 48VIN to 12V, 2A OUT
The second example is a telecom application shown on the
front page of the datasheet. The focus of this application
is a cheap, small and simple solution. Table 3 shows the
results of the initial step for selecting the turns ratio.
In this example, the output diode is a much smaller efficiency loss due to the smaller voltage drop across it in
ratio to VOUT so minimizing output diode current is not
as important. Of greater importance is minimizing the
stresses on the MOSFET and output diode and the 4:1
case seems to be the best compromise for that to avoid
using a snubber on either device.
Table 3. Voltage Stresses, Output Capability and Diode Current vs Turns Ratio in 48VIN to 12V, 2A Application
NPS
VDS(MAX)
VR(DIODE)
D (VIN = 48V)
D (VIN = 36V)
ILIM (2A OUT AT VIN = 36V)
IDIODE(RMS) (VIN = 48V)
1
84
84
0.21
0.26
6
3.3
2
96
48
0.34
0.41
4
3.7
4
120
30
0.51
0.58
3
4.6
6
144
24
0.61
0.68
2
5.2
3748f
22
LT3748
Applications Information
20µH of primary inductance is required for minimum
off-time while selecting the transformer, but in order to
minimize output ripple at maximum load a 60.8µH transformer is selected. To meet the saturation current (12A,
peak, on the secondary windings), a Versa-Pak VP4-0047-R
provides a compact and efficient solution.
diode rated for more average current at temperature might
be needed, but the B360 is small and inexpensive.
For the MOSFET switch, since the input voltage is so high,
resistive losses on the primary side will be very low so
minimizing RDS(ON) is of minimum benefit. However, since
the current for the gate drive is pulled from a high VIN,
minimizing both QG and operating frequency is essential
unless a third winding is added. The Vishay Si7464DP, with
a 200V VDS(MAX) and low gate charge, keeps the INTVCC
current to just over 3mA, worst-case, which when added
to quiescent current will keep power dissipation in the
LT3748 to just over 1/4W at 72V VIN.
See Figures 13 and 14 for the DC1557A demo board layout.
Note the proximity of the RREF and RFB resistors (R9, R5)
to the LT3748 for optimal regulation. The location of these
two resistors as close to the physical pins of the LT3748
is critical for accurate regulation. In addition, the high
frequency current path from the VIN bypass capacitor (C2)
through the primary-side winding, the MOSFET switch and
sense resistor (R10) is a very tight loop. Similarly, the high
frequency current path for the MOSFET gate switching from
the INTVCC capacitor through the source of the MOSFET
and sense resistor is similarly small in area. For improved
regulation it is recommended that the user ensure that the
high current ground is kept separate or at least physically
isolated from the small-signal ground used by the other
ground-referenced pins.
The output diode only nominally has 30V of reverse bias
but a B360 diode is selected to ensure enough margin that
a snubber will not be required. A more expensive diode
with lower forward drop might recover several percent
efficiency and if high temperature operation is required a
The rest of the design and component selection is straightforward.
Suggested Layout
3748f
23
LT3748
Applications Information
Figure 13. Demo Board Topside Silkscreen
Figure 14. Demo Board Topside Metal
3748f
24
LT3748
typical Applications
320V
T1
1:1:1:1:1
VIN
12V TYP
10µF
1µF
825k
EN/UVLO
D1
15V
300mA
6µH
VIN
RFB
RREF
150k
71.5k
6.04k
D2
15V
300mA
LT3748
GATE
TC
VC
GND
INTVCC 0.0125Ω
D3
15V
300mA
10k
2nF
C1
IGBT
DRIVER
C2
IGBT
DRIVER
SENSE
SS
133k
M1
IGBT
DRIVER
C3
4.7µF
4700pF
D4
15V
300mA
C1-C4: 22µH 25V X7R s2
D1-D4: DIODES INC. PDS3100
M1: VISHAY Si7898DP
T1: COILTRONICS VERSA-PAC VP4-0075-R
C4
3-PHASE
MOTOR
IGBT
DRIVER
0V
3748 F15
Figure 15. Automotive IGBT Controller Supply
DANGER HIGH VOLTAGE! OPERATION BY HIGH VOLTAGE TRAINED PERSONNEL ONLY
VIN
7V TO 15V
T1
1:10:10
C1
10µF
C2
1µF
C8
0.22µF
50V
R1
357k
R2
93.1k
VIN
EN/UVLO
RFB
R3
140k
R5
10k
D3
C5
TC
GATE
VOUT+
300V
8mA
VOUT–
C6
R4
6.04k
LT3748
R7
600k
D2
RREF
SS
D1
M1
R8
600k
VOUT+
300V
8mA
VOUT–
SENSE
C7
0.1µF
VC
GND
INTVCC
50mΩ
3748 F16
C9
100pF
R6
24.9k
C4
2.2nF
C3
4.7µF
C5, C6: 0.1µF 600V s2
D1, D2: CENTRAL SEMICONDUCTOR CMR1U-06M LTC
M1: FAIRCHILD FDM3622
T1: WÜRTH ELEKTRONIK 750311486
Figure 16. ±300V Isolated Flyback Converter
3748f
25
LT3748
typical Applications
VIN
48V TYP
T1
1:1
4.7µF
0.22µF
66Ω
825k
VIN
EN/UVLO
150pF
VOUT–
221k
RFB
49.9k
4.7µF
100V
s3
40µH
VOUT+
48V
0.5A
RREF
6.04k
LT3748
GATE
TC
SENSE
SS
VC
243k
M1
GND
INTVCC
0.030Ω
10k
2nF
3748 F17
4.7µF
4700pF
D1: CENTRAL SEMICONDUCTOR CMR5U-02-LTC
M1: VISHAY Si7464DP
T1: COILTRONICS VERSA-PAC VP4-0060-R
Figure 17. 48V, 0.5A Supply from 24V to 96V Input
100
95
VIN = 24V
EFFICIENCY (%)
90
85
VIN = 48V
80
VIN = 96V
75
70
65
60
0
0.1
0.2
0.4
0.3
OUTPUT CURRENT (A)
0.5
3748 F18
Figure 18. Efficiency of 48V Supply of Figure 17
3748f
26
LT3748
Package Description
MS Package
Varitation: MS16 (12)
16-Lead Plastic MSOP with 4 Pins Removed
(Reference LTC DWG # 05-08-1847 Rev A)
1.0
(.0394)
BSC
5.23
(.206)
MIN
0.889 p 0.127
(.035 p .005)
3.20 – 3.45
(.126 – .136)
4.039 p 0.102
(.159 p .004)
(NOTE 3)
16 14 121110 9
0.50
(.0197)
BSC
0.305 p 0.038
(.0120 p .0015)
TYP
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
0.280 p 0.076
(.011 p .003)
REF
3.00 p 0.102
(.118 p .004)
(NOTE 4)
4.90 p 0.152
(.193 p .006)
DETAIL “A”
0o – 6o TYP
1
GAUGE PLANE
0.53 p 0.152
(.021 p .006)
DETAIL “A”
0.18
(.007)
SEATING
PLANE
1.10
(.043)
MAX
0.17 – 0.27
(.007 – .011)
TYP
0.50
(.0197)
BSC
3 567 8
1.0
(.0394)
BSC
0.86
(.034)
REF
0.1016 p 0.0508
(.004 p .002)
MSOP (MS12) 0510 REV A
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
3748f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
27
LT3748
Typical Application
5V, 2A Output from Automotive Input with Continuous Operation from 6V to 45V
T1
2:1
VIN
12V TYP
10µF
825k
RFB
215k
100µF
10V
8.3µH
VIN
EN/UVLO
D1
52.3k
D2
VOUT+
5V, 2A
50mVP-P
RIPPLE
VOUT–
RREF
6.04k
LT3748
GATE
TC
SENSE
SS
VC
34.8k
2nF
M1
GND
INTVCC
0.016Ω
25k
2.2nF
D1: DIODES INC. SBR8U60P5
D2: DIODES INC. BZT52C5V6
M1: Si7738DP
T1: PULSE PA3177NL
3748 TA02
4.7µF
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3748f
28 Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
LT 0710 • PRINTED IN USA
 LINEAR TECHNOLOGY CORPORATION 2010