NSC LM22673MR-ADJ 3a simple switcher, step-down voltage regulator with adjustable soft-start and current limit Datasheet

LM22673
3A SIMPLE SWITCHER®, Step-Down Voltage Regulator
with Adjustable Soft-Start and Current Limit
General Description
Features
The LM22673 series of regulators are monolithic integrated
circuits which provide all of the active functions for a stepdown (buck) switching regulator capable of driving up to 3A
loads with excellent line and load regulation characteristics.
High efficiency (>90%) is obtained through the use of a low
ON-resistance N-channel MOSFET. The series consists of a
fixed 5V output and an adjustable version.
The SIMPLE SWITCHER® concept provides for an easy to
use complete design using a minimum number of external
components and National’s Webench® design tool. National’s
Webench® tool includes features such as external component
calculation, electrical simulation, thermal simulation, and
Build-It boards for easy design-in. The switching clock frequency is provided by an internal fixed frequency oscillator
which operates at 500 kHz. The LM22673 series also has built
in thermal shutdown and current limiting. The current limit
threshold can be adjusted using an external resistor. An adjustable soft-start feature is provided by selecting an appropriate external soft-start capacitor.
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Wide input voltage range: 4.5V to 42V
Internally compensated voltage mode control
Stable with low ESR ceramic capacitors
120 mΩ N-channel MOSFET TO-263 THIN package
100 mΩ N-channel MOSFET PSOP-8 package
Output voltage options:
-ADJ (outputs as low as 1.285V)
-5.0 (output fixed to 5V)
±1.5% feedback reference accuracy
Switching frequency of 500kHz
-40°C to 125°C operating junction temperature range
Adjustable soft-start
Adjustable current limit
Integrated boot diode
Fully Webench® enabled
Step-down and inverting buck-boost applications
Package
■ PSOP-8 (Exposed Pad)
■ TO-263 THIN (Exposed Pad)
Applications
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Industrial Control
Telecom and Datacom Systems
Embedded Systems
Automotive Telematics and Body Electronics
Conversions from Standard 24V, 12V and 5V Input Rails
Simplified Application Schematic
30076201
© 2009 National Semiconductor Corporation
300762
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LM22673 3A SIMPLE SWITCHER®, Step-Down Voltage Regulator with Adjustable Soft-Start and
Current Limit
December 18, 2009
LM22673
Connection Diagrams
30076240
8-Lead Plastic PSOP-8 Package
NS Package Number MRA08B
30076202
7-Lead Plastic TO-263 THIN Package
NS Package Number TJ7A
Ordering Information
Output Voltage
Order Number
Package Type
NSC Package Drawing
Supplied As
ADJ
LM22673MR-ADJ
PSOP-8 Exposed Pad
MRA08B
95 Units in Rails
ADJ
LM22673MRE-ADJ
250 Units in Tape and Reel
ADJ
LM22673MRX-ADJ
2500 Units in Tape and Reel
ADJ
LM22673TJE-ADJ
ADJ
LM22673TJ-ADJ
5.0
LM22673MR-5.0
5.0
LM22673MRE-5.0
5.0
LM22673MRX-5.0
5.0
LM22673TJE-5.0
5.0
LM22673TJ-5.0
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TO-263 THIN Exposed Pad
TJ7A
PSOP-8 Exposed Pad
MRA08B
250 Units in Tape and Reel
1000 Units in Tape and Reel
95 Units in Rails
250 Units in Tape and Reel
2500 Units in Tape and Reel
TO-263 THIN Exposed Pad
TJ7A
250 Units in Tape and Reel
1000 Units in Tape and Reel
2
LM22673
Pin Descriptions
Pin Numbers
PSOP-8
Package
Pin Numbers
TO-263 THIN
Package
Name
Description
Application Information
1
3
BOOT
Bootstrap input
Provides the gate voltage for the high side NFET.
2
-
NC
Not Connected
Pin is not electrically connected inside the chip. Pin
does function as thermal conductor.
3
5
IADJ
Current limit setting pin
A resistor attached between this pin and GND can be
used to set the current limit threshold. Pin can be left
floating and internal setting will be default.
4
6
FB
Feedback pin
Inverting input to the internal voltage error amplifier.
5
7
SS
Soft-Start pin
An external capacitor and an internal 50 µA current
source set the time constant for the rise of the error
amplifier reference. Pin can be left floating and internal
soft-start will be default.
6
4
GND
System ground
Provide good capacitive decoupling between VIN and
this pin.
7
2
VIN
Source input voltage
Input to the regulator. Operates from 4.5V to 42V.
8
1
SW
Switch pin
Attaches to the switch node.
3
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LM22673
Junction Temperature
Soldering Information
Infrared (5 sec.)
ESD Rating (Note 3)
Human Body Model
Storage Temperature Range
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
VIN to GND
SS, IADJ Pin Voltage
SW to GND (Note 2)
Boot Pin Voltage
FB Pin Voltage
Power Dissipation
43V
-0.5V to 7V
-5V to VIN
VSW + 7V
-0.5V to 7V
Internally Limited
150°C
260°C
±2 kV
-65°C to +150°C
Operating Ratings
(Note 1)
Supply Voltage (VIN)
Junction Temperature Range
4.5V to 42V
-40°C to +125°C
Electrical Characteristics
Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the
junction temperature (TJ) range of -40°C to +125°C. Minimum and Maximum limits are guaranteed through test, design, or statistical
correlation. Typical values represent the most likely parametric norm at TA = TJ = 25°C, and are provided for reference purposes
only. Unless otherwise specified: VIN = 12V.
Symbol
Parameter
Conditions
Min
(Note 5)
Typ
(Note 4)
Max
(Note 5)
Units
Feedback Voltage
VIN = 8V to 42V
4.925/4.9
5.0
5.075/5.1
V
Feedback Voltage
VIN = 4.7V to 42V
1.266/1.259
1.285
1.304/1.311
V
3.4
6
mA
LM22673-5.0
VFB
LM22673-ADJ
VFB
All Output Voltage Versions
IQ
VADJ
ICL
ICLADJ
IL
RDS(ON)
fO
Quiescent Current
VFB = 5V
Current Limit Adjust Voltage
Current Limit
Current Limit Adjust
IADJ Resistor = 56.2 kΩ
Output Leakage Current
VIN = 42V, SS Pin = 0V, VSW = 0V
Switch On-Resistance
0.65
0.8
0.9
V
3.4/3.35
4.2
5.3/5.5
A
0.4
0.7
1
A
0.2
2
µA
VSW = -1V
0.1
3
mA
TO-263 THIN Package
0.12
0.16/0.22
Ω
PSOP-8 Package
0.10
0.16/0.20
Oscillator Frequency
400
500
600
kHz
TOFFMIN
Minimum Off-time
100
200
300
ns
TONMIN
Minimum On-time
IBIAS
Feedback Bias Current
VFB = 1.3V (ADJ Version Only)
EN Input = 0V
ISS
Soft-start Current
TSD
Thermal Shutdown
Threshold
θJA
Thermal Resistance
θJA
Thermal Resistance
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30
100
ns
230
nA
50
70
µA
150
°C
TJ Junction to ambient temperature
resistance (Note 6)
22
°C/W
MR Package, Junction to ambient
temperature resistance (Note 7)
60
°C/W
4
Note 2: The absolute maximum specification of the ‘SW to GND’ applies to DC voltage. An extended negative voltage limit of -10V applies to a pulse of up to 50
ns.
Note 3: ESD was applied using the human body model, a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin.
Note 4: Typical values represent most likely parametric norms at the conditions specified and are not guaranteed.
Note 5: Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlation using Statistical
Quality Control (SQC) methods. Limits are used to calculate National’s Average Outgoing Quality Level (AOQL).
Note 6: The value of θJA for the TO-263 THIN (TJ) package of 22°C/W is valid if package is mounted to 1 square inch of copper. The θJA value can range from
20 to 30°C/W depending on the amount of PCB copper dedicated to heat transfer. See application note AN-1797 for more information.
Note 7: The value of θJA for the PSOP-8 exposed pad (MR) package of 60°C/W is valid if package is mounted to 1 square inch of copper. The θJA value can
range from 42 to 115°C/W depending on the amount of PCB copper dedicated to heat transfer.
Typical Performance Characteristics
Unless otherwise specified the following conditions apply: Vin =
12V, TJ = 25°C.
Efficiency vs IOUT and VIN
VOUT = 3.3V
Current Limit vs Temperature
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30076227
Normalized Switching Frequency vs Temperature
Feedback Bias Current vs Temperature
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30076205
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LM22673
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability
and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in
the recommended Operating Ratings is not implied. The recommended Operating Ratings indicate conditions at which the device is functional and should not be
operated beyond such conditions.
LM22673
Normalized Feedback Voltage vs Temperature
Normalized RDS(ON) vs Temperature
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30076207
Normalized Feedback Voltage vs Input Voltage
Soft-start Current vs Temperature
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30076209
Current Limit vs IADJ Resistor
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LM22673
Typical Application Circuit and Block Diagram
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FIGURE 1. 3.3V VOUT at 3A
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LM22673
Detailed Operating Description
The LM22673 switching regulator features all of the functions
necessary to implement an efficient high voltage buck regulator using a minimum of external components. This easy to
use regulator integrates a 42V N-Channel switch with an output current capability of 3A. The regulator control method is
based on voltage mode control with input voltage feed forward. The loop compensation is integrated into the LM22673
so that no external compensation components need to be selected or utilized. Voltage mode control offers short minimum
on-times allowing short duty-cycles necessary in high input
voltage applications. The operating frequency is fixed at 500
kHz to allow for small external components while avoiding
excessive switching losses. The output voltage can be set as
low as 1.285V with the -ADJ device. Fault protection features
include current limiting and thermal shutdown. The device is
available in the TO-263 THIN and PSOP packages featuring
an exposed pad to aid thermal dissipation.
The functional block diagram with typical application of the
LM22673 is shown in Figure 1.
The internal compensation of the -ADJ option of the LM22673
is optimized for output voltages up to 5V. If an output voltage
of 5V or higher is needed, the -5.0 fixed output voltage option
with an additional external resistive feedback voltage divider
may also be used.
where D is the duty-cycle.
Current Limit
When the power switch turns on, the slight capacitance loading of the Schottky diode, D1, causes a leading-edge current
spike with an extended ringing period. This spike can cause
the current limit comparator to trip prematurely. A leading
edge blanking time (TBLK) of 100 ns (typical) is used to avoid
sampling the spike.
A key feature of the LM22673 is the ability to control the peak
switch current limit. Without this feature, the peak switch current would be internally set to 4.2A (typical) to accommodate
3A load current designs. The high current limit requires that
both the inductor (which could saturate with excessively high
currents) and the catch diode be able to safely handle up to
4.2A under load fault condition.
If an application requires a load current less than 3A, the peak
switch current can be set to a limit just over the maximum load
current with the addition of a single programming resistor.
This allows the use of lower rated and more cost effective
inductors and diodes. A resistance of 10 kΩ sets the current
limit to typically 3.8A (typical) peak current and 20 kΩ reduces
the maximum peak current to 2A (typical).
Maximum Duty-Cycle / Dropout
Voltage
The typical maximum duty-cycle is 90%. This corresponds to
a typical minimum off-time of 200 ns. This forced off-time is
important to provide enough time for the Cboot capacitor to
charge during each cycle. The lowest input voltage required
to maintain operation is:
Where VD is the forward voltage drop across the re-circulating
Schottky diode and VQ is the voltage drop across the internal
power N-FET of the LM22673. The RDS(ON) of the FET is
specified in the electrical characteristics section of this
datasheet to calculate VQ according to the FET current. F is
the switching frequency.
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Minimum Duty-Cycle
FIGURE 2. Peak Current Limit vs IADJ Resistor
Besides a minimum off-time, there is also a minimum on-time
which will take effect when the output voltage is adjusted very
low and the input voltage is very high. Should the operation
require an on-time shorter than minimum, individual switching
pulses will be skipped.
Pulse skipping is a normal mode of operation which appears
as a decrease in switching frequency. It has no effect on operation or regulation except for an increase in output ripple
voltage. The pulse skipping function is required to maintain
proper regulation and overcurrent protection under the full
range of operating conditions.
The specified typical minimum on time of 100 ns is based on
the blanking time during current limit operation. During normal
operation, the minimum on-time will also include the effect of
propagation delay. Assume approximately 150 ns as a typical
operating minimum on time.
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When the switch current reaches the current limit threshold
the switch is immediately turned off. If TON is larger than the
minimum (100 ns typical) the switcher will hold the output
current flat at the set current limit value. But if TON is at or
decreases to the minimum TON (100 ns typical) the switching
frequency decreases to 1/5 the typical frequency. This effectively causes the output current to fold back to a lower and
safe value. When the current limit condition is removed the
switching frequency is restored to nominal. This 5X frequency
fold back will result in a lower duty cycle pulse of the power
switch to minimize the overall fault condition power dissipation.
8
The LM22673 integrates an N-channel FET switch and associated floating high voltage level shift / gate driver. This gate
driver circuit works in conjunction with an internal diode and
an external bootstrap capacitor. A 0.01 µF ceramic capacitor
connected with short traces between the BOOT pin and the
SW pin is recommended to effectively drive the internal FET
switch. During the off-time of the switch, the SW voltage is
approximately -0.5V and the external bootstrap capacitor is
charged from the internal supply through the internal bootstrap diode. When operating with a high PWM duty-cycle, the
buck switch will be forced off each cycle to ensure that the
bootstrap capacitor is recharged. See the maximum duty-cycle section for more details.
Thermal Protection
30076250
Internal Thermal Shutdown circuitry protects the LM22673 in
the event the maximum junction temperature is exceeded.
When activated, typically at 150°C, the regulator is forced into
a low power reset state. There is a typical hysteresis of 15
degrees.
FIGURE 3. Output Current in Foldback vs.
Nominal Duty Cycle
The percentage of output current limit fold back is affected by
duty cycle, inductance, and switching frequency.
See Figure 3 for details.
The current limit will only protect the inductor from a runaway
condition if the LM22673 is operating in its safe operating
area. A runaway condition of the inductor is potentially catastrophic to the application. For every design, the safe operating
area needs to be calculated. Factors in determining the safe
operating area are the switching frequency, input voltage,
output voltage, minimum on-time and feedback voltage during an over current condition.
As a first pass check, if the following equation holds true, a
given design is considered in a safe operating area and the
current limit will protect the circuit:
Internal Compensation
The LM22673 has an internal compensation designed for a
stable loop with a wide range of external power stage components.
Insuring stability of a design with a specific power stage (inductor and output capacitor) can be tricky. The LM22673
stability can be verified over varying loads and input and output voltages using Webench® Designer online circuit simulation tool at www.national.com. A quick start spreadsheet can
also be downloaded from the online product folder.
The internal compensation of the -ADJ option of the LM22673
is optimized for output voltages below 5V. If an output voltage
of 5V or higher is needed, the -5.0 option with an additional
external resistor divider may also be used. The typical location of the internal compensation poles and zeros as well as
the DC gain is given in Table 1. The LM22673 has internal
type III compensation allowing for the use of most output capacitors including ceramics.
This information can be used to calculate the transfer function
from the FB pin to the internal compensation node (input to
the PWM comparator in the block diagram).
VIN x TBLK x F < VOUT x 0.724
If the equation above does not hold true, the following secondary equation will need to hold true to be in safe operating
area:
If both equations do not hold true, a particular design will not
have an effective current limit function which might damage
the circuit during startup, over current conditions, or steady
state over current and short circuit condition. Oftentimes a
reduction of the maximum input voltage will bring a design into
the safe operating area.
TABLE 1.
Soft-Start
The soft-start feature allows the regulator to gradually reach
the initial steady state operating point, thus reducing start-up
stresses and surges. The soft-start can be adjusted by selecting an external soft-start capacitor. An internal 50 µA
current source charges up the external soft-start capacitor.
The generated voltage is the voltage the internal reference
limits. If no external soft-start capacitor is used, there is an
internal soft-start feature with 500 µs (typical) start-up time.
Recommended soft-start capacitor values are between 100
nF to 1 µF.
Corners
Frequency
Pole 1
150 kHz
Pole 2
250 kHz
Pole 3
100 Hz
Zero 1
1.5 kHz
Zero 2
15 kHz
DC gain
37.5 dB
For the power stage transfer function the standard voltage
mode formulas for the double pole and the ESR zero apply:
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LM22673
Boot Pin
LM22673
load current. The input capacitance should be selected for
RMS current, IRMS, and minimum ripple voltage. A good approximation for the required ripple current rating necessary is
IRMS > IOUT / 2.
Quality ceramic capacitors with a low ESR should be selected
for the input filter. To allow for capacitor tolerances and voltage effects, multiple capacitors may be used in parallel. If step
input voltage transients are expected near the maximum rating of the LM22673, a careful evaluation of ringing and possible voltage spikes at the VIN pin should be completed. An
additional damping network or input voltage clamp may be
required in these cases.
Usually putting a higher ESR electrolytic input capacitor in
parallel to the low ESR bypass capacitor will help to reduce
excessive voltages during a line transient and will also move
the resonance frequency of the input filter away from the regulator bandwidth.
The peak ramp level of the oscillator signal feeding into the
PWM comparator is VIN/10 which equals a gain of 20dB of
this modulator stage of the IC. The -5.0 fixed output voltage
option has twice the gain of the compensation transfer function compared to the -ADJ option which is 43.5dB instead of
37.5dB.
Generally, calculation as well as simulation can only aid in
selecting good power stage components. A good design practice is to test for stability with load transient tests or loop
measurement tests. Application note AN-1889 shows how to
easily perform a loop transfer function measurement with only
an oscilloscope and a function generator.
Application Information
EXTERNAL COMPONENTS
The following design procedures can be used to design a nonsynchronous buck converter with the LM22673.
Output Capacitor
The output capacitor can limit the output ripple voltage and
provide a source of charge for transient loading conditions.
Multiple capacitors can be placed in parallel. Very low ESR
capacitors such as ceramic capacitors reduce the output ripple voltage and noise spikes, while higher value capacitors in
parallel provide large bulk capacitance for transient loading
and unloading. Therefore, a combination of parallel capacitors, a single low ESR SP or Poscap capacitor, or a high value
of ceramic capacitor provides the best overall performance.
Output capacitor selection depends on application conditions
as well as ripple and transient requirements. Typically a value
of at least 100 µF is recommended. An approximation for the
output voltage ripple is:
Inductor
The inductor value is determined based on the load current,
ripple current, and the minimum and maximum input voltage.
To keep the application in continuous current conduction
mode (CCM), the maximum ripple current, IRIPPLE , should be
less than twice the minimum load current.
The general rule of keeping the inductor current peak-to-peak
ripple around 30% of the nominal output current is a good
compromise between excessive output voltage ripple and excessive component size and cost. When selecting the inductor ripple current ensure that the peak current is below the
minimum current limit as given in the Electrical Characteristics section. Using this value of ripple current, the value of
inductor, L, is calculated using the following formula:
In applications with Vout less than 3.3V, where input voltage
may fall below the operating minimum of 4.5V, it is critical that
low ESR output capacitors are selected. This will limit potential output voltage overshoots as the input voltage falls below
device normal operation range.
If the switching frequency is set higher than 500 kHz, the capacitance value may not be reduced accordingly due to stability requirements. The internal compensation is optimized
for circuits with a 500 kHz switching frequency. See the internal compensation section for more details.
where F is the switching frquency which is 500 kHz (typical).
This procedure provides a guide to select the value of the
inductor L. The nearest standard value will then be used in
the circuit. Increasing the inductance will generally slow down
the transient response but reduce the output voltage ripple
amplitude. Reducing the inductance will generally improve
the transient response but increase the output voltage ripple.
The inductor must be rated for the peak current, IPK+, to prevent saturation. During normal loading conditions, the peak
current occurs at maximum load current plus maximum ripple.
Under an overload condition as well as during load transients,
the peak current is limited to 4.2A typical (5.5A maximum).
This requires that the inductor be selected such that it can run
at the maximum current limit and not only the steady state
current.
Depending on inductor manufacturer, the saturation rating is
defined as the current necessary for the inductance to reduce
by 30% at 20°C. In typical designs the inductor will run at
higher temperatures. If the inductor is not rated for enough
current, it might saturate and due to the propagation delay of
the current limit circuitry, the power supply may get damaged.
Cboot Capacitor
The bootstrap capacitor between the BOOT pin and the SW
pin supplies the gate current to turn on the N-channel MOSFET. The recommended value of this capacitor is 10nF and
should be a good quality, low ESR ceramic capacitor.
It is possible to put a small resistor in series with the Cboot
capacitor to slow down the turn-on transition time of the internal N-channel MOSFET. Resistors in the range of 10Ω to
50Ω can slow down the transition time. This can reduce EMI
of a switched mode power supply circuit. Using such a series
resistor is not recommended for every design since it will increase the switching losses of the application and makes
thermal considerations more challenging.
Input Capacitor
Good quality input capacitors are necessary to limit the ripple
voltage at the VIN pin while supplying most of the switch current during on-time. When the switch turns on, the current into
the VIN pin steps to the peak value, then drops to zero at turnoff. The average current into VIN during switch on-time is the
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Resistor Divider
For the -5.0 option no resistor divider is required for 5V output
voltage. The output voltage should be directly connected to
the FB pin. Output voltages above 5V can use the -5.0 option
with a resistor divider as an alternative to the -ADJ option.
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Circuit Board Layout
-5.0 option:
Board layout is critical for switching power supplies. First, the
ground plane area must be sufficient for thermal dissipation
purposes. Second, appropriate guidelines must be followed
to reduce the effects of switching noise. Switch mode converters are very fast switching devices. In such devices, the
rapid increase of input current combined with the parasitic
trace inductance generates unwanted L di/dt noise spikes.
The magnitude of this noise tends to increase as the output
current increases. This parasitic spike noise may turn into
electromagnetic interference (EMI) and can also cause problems in device performance. Therefore, care must be taken
in layout to minimize the effect of this switching noise.
The most important layout rule is to keep the AC current loops
as small as possible. Figure 5 shows the current flow of a buck
converter. The top schematic shows a dotted line which represents the current flow during the FET switch on-state. The
middle schematic shows the current flow during the FET
switch off-state.
The bottom schematic shows the currents referred to as AC
currents. These AC currents are the most critical since current
is changing in very short time periods. The dotted lines of the
bottom schematic are the traces to keep as short as possible.
This will also yield a small loop area reducing the loop inductance. To avoid functional problems due to layout, review the
PCB layout example. Providing 3A of output current in a very
low thermal resistance package such as the TO-263 THIN is
challenging considering the trace inductances involved. Best
results are achieved if the placement of the LM22673, the bypass capacitor, the Schottky diode and the inductor are
placed as shown in the example. It is also recommended to
use 2oz copper boards or thicker to help thermal dissipation
and to reduce the parasitic inductances of board traces.
It is very important to ensure that the exposed DAP on the
TO-263 THIN package is soldered to the ground area of the
PCB to reduce the AC trace length between the bypass capacitor ground and the ground connection to the LM22673.
Not soldering the DAP to the board may result in erroneous
operation due to excessive noise on the board.
Where VFB = 1.285V typical for the -ADJ option and 5V for the
-5.0 option
30076223
FIGURE 4. Resistive Feedback Divider
A maximum value of 10 kΩ is recommended for the sum of
R1 and R2 to keep high output voltage accuracy for the –ADJ
option. A maximum of 2 kΩ is recommended for the -5.0 output voltage option. For the 5V fixed output voltage option, the
total internal divider resistance is typically 9.93 kΩ.
At loads less than 5 mA, the boot capacitor will not hold
enough charge to power the internal high side driver. The
output voltage may droop until the boot capacitor is
recharged. Selecting a total feedback resistance to be below
3 kΩ will provide some minimal load and can keep the output
voltage from collapsing in such low load conditions.
Catch Diode
A Schottky type re-circulating diode is required for all
LM22673 applications. Ultra-fast diodes which are not Schottky diodes are not recommended and may result in damage
to the IC due to reverse recovery current transients. The near
ideal reverse recovery characteristics and low forward voltage drop of Schottky diodes are particularly important diode
characteristics for high input voltage and low output voltage
applications common to the LM22673. The reverse recovery
characteristic determines how long the current surge lasts
each cycle when the N-channel MOSFET is turned on. The
reverse recovery characteristics of Schottky diodes minimizes the peak instantaneous power in the switch occurring
during turn-on for each cycle. The resulting switching losses
are significantly reduced when using a Schottky diode. The
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LM22673
reverse breakdown rating should be selected for the maximum VIN, plus some safety margin. A rule of thumb is to select
a diode with the reverse voltage rating of 1.3 times the maximum input voltage.
The forward voltage drop has a significant impact on the conversion efficiency, especially for applications with a low output
voltage. ‘Rated’ current for diodes varies widely from various
manufacturers. The worst case is to assume a short circuit
load condition. In this case the diode will carry the output current almost continuously. For the LM22673 this current can
be as high as 4.2A (typical). Assuming a worst case 1V drop
across the diode, the maximum diode power dissipation can
be as high as 4.2W.
This may offer improved loop bandwidth in some applications.
See the Internal Compensation section for more details.
For the -ADJ option no resistor divider is required for 1.285V
output voltage. The output voltage should be directly connected to the FB pin. Other output voltages can use the -ADJ
option with a resistor divider.
The resistor values can be determined by the following equations:
-ADJ option:
LM22673
Pout) then subtract the power losses in the Schottky diode
and output inductor. An approximation for the Schottky diode
loss is:
P = (1 - D) x IOUT x VD
An approximation for the output inductor power is:
P = IOUT2 x R x 1.1,
where R is the DC resistance of the inductor and the 1.1 factor
is an approximation for the AC losses. The regulator has an
exposed thermal pad to aid power dissipation. Adding several
vias under the device to the ground plane will greatly reduce
the regulator junction temperature. Selecting a diode with an
exposed pad will aid the power dissipation of the diode. The
most significant variables that affect the power dissipated by
the LM22673 are the output current, input voltage and operating frequency. The power dissipated while operating near
the maximum output current and maximum input voltage can
be appreciable. The junction-to-ambient thermal resistance of
the LM22673 will vary with the application. The most significant variables are the area of copper in the PC board, the
number of vias under the IC exposed pad and the amount of
forced air cooling provided. The integrity of the solder connection from the IC exposed pad to the PC board is critical.
Excessive voids will greatly diminish the thermal dissipation
capacity. The junction-to-ambient thermal resistance of the
LM22673 TO-263 THIN and PSOP packages are specified in
the electrical characteristics table under the applicable conditions. For more information regarding the TO-263 THIN
package, refer to Application Note AN-1797 at
www.national.com.
30076224
FIGURE 5. Current Flow in a Buck Application
Thermal Considerations
The two highest power dissipating components are the recirculating diode and the LM22673 regulator IC. The easiest
method to determine the power dissipation within the
LM22673 is to measure the total conversion losses (Pin –
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12
LM22673
PCB Layout Example for TO-263 THIN Package
30076225
13
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LM22673
PCB Layout Example for PSOP-8 Package
30076241
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14
LM22673
Schematic for Buck/Boost (Inverting) Application
See AN-1888 for more information on the inverting (buckboost) application generating a negative output voltage from
a positive input voltage.
30076226
15
www.national.com
LM22673
Physical Dimensions inches (millimeters) unless otherwise noted
7-Lead Plastic TO-263 THIN Package
NS Package Number TJ7A
8-Lead PSOP Package
NS Package Number MRA08B
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16
LM22673
Notes
17
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LM22673 3A SIMPLE SWITCHER®, Step-Down Voltage Regulator with Adjustable Soft-Start and
Current Limit
Notes
For more National Semiconductor product information and proven design tools, visit the following Web sites at:
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