LINER LTC3025IDC-1-TRPBF 500ma micropower vldo linear regulator Datasheet

LTC3025-1/LTC3025-2/
LTC3025-3/LTC3025-4
500mA Micropower
VLDO Linear Regulators
DESCRIPTION
FEATURES
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Wide Input Voltage Range: 0.9V to 5.5V
Stable with Ceramic Capacitors
Very Low Dropout: 85mV at 500mA
Adjustable Output Range: 0.4V to 3.6V (LTC3025-1)
Fixed Output: 1.2V(LTC3025-2), 1.5V(LTC3025-3),
1.8V(LTC3025-4)
±2% Voltage Accuracy over Temperature,
Supply and Load
Low Noise: 80μVRMS (10Hz to 100kHz)
BIAS Voltage Range: 2.5V to 5.5V
Fast Transient Recovery
Shutdown Disconnects Load from VIN and VBIAS
Low Operating Current: IIN = 4μA, IBIAS = 50μA Typ
Low Shutdown Current: IIN = 1μA, IBIAS = 0.01μA Typ
Output Current Limit
Thermal Overload Protection
Available in 6-Lead (2mm × 2mm) DFN Package
APPLICATIONS
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Low Power Handheld Devices
Low Voltage Logic Supplies
DSP Power Supplies
Cellular Phones
Portable Electronic Equipment
Handheld Medical Instruments
Post Regulator for Switching Supply Noise Rejection
The LTC®3025-X is a micropower, VLDO™ (very low dropout) linear regulator which operates from input voltages as
low as 0.9V. The device is capable of supplying 500mA of
output current with a typical dropout voltage of only 85mV.
A BIAS supply is required to run the internal reference and
LDO circuitry while output current comes directly from the
IN supply for high efficiency regulation. The LTC3025-1
features an adjustable output with a low 0.4V reference
while the LTC3025-2, LTC3025-3, and LTC3025-4 have
fixed 1.2V, 1.5V and 1.8V output voltages respectively.
The LTC3025-X’s low quiescent current makes it an ideal
choice for use in battery-powered systems. For 3-cell NiMH
and single cell Li-Ion applications, the BIAS voltage can
be supplied directly from the battery while the input can
come from a high efficiency buck regulator, providing a
high efficiency, low noise output.
Other features include high output voltage accuracy,
excellent transient response, stability with ultralow ESR
ceramic capacitors as small as 1μF, short-circuit and
thermal overload protection and output current limiting.
The LTC3025-X is available in a tiny, low profile (0.75mm)
6-lead DFN (2mm × 2mm) package.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
VLDO is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 7224204, 7218082.
TYPICAL APPLICATION
1.2V Output Voltage from 1.5V Input Supply
1MHz VIN Supply Rejection
50
1.5V HIGH
EFFICIENCY 1.5V
DC/DC
BUCK
0.1μF
OUT
1μF
LTC3025-2
IN
SHDN
45
COUT = 10μF
40
SENSE
0.1μF
OFF ON
VOUT = 1.2V
IOUT ≤ 500mA
GND
30251234 TA01
REJECTION (dB)
BIAS
Li-Ion
OR
3-CELL
NiMH
35
COUT = 1μF
30
25
20
15
10
5 BIAS = 3.6V
VOUT = 1.2V
0
1.2 1.4 1.6
IOUT = 100mA
IOUT = 300mA
1.8 2.0
VIN (V)
2.2
2.4
2.6
30251234fc
30251234 TA01b
1
LTC3025-1/LTC3025-2/
LTC3025-3/LTC3025-4
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Notes 1, 2)
VBIAS, VIN to GND......................................... –0.3V to 6V
SHDN to GND............................................... –0.3V to 6V
SENSE, ADJ to GND ..................................... –0.3V to 6V
VOUT ........................................–0.3V to VIN + 0.3V or 6V
Operating Junction Temperature Range
(Note 3).................................................. –40°C to 125°C
Storage Temperature Range................... –65°C to 125°C
Output Short-Circuit Duration .......................... Indefinite
TOP VIEW
6 SHDN
BIAS 1
GND 2
7
5 ADJ/SENSE*
IN 3
4 OUT
DC6 PACKAGE
6-LEAD (2mm × 2mm) PLASTIC DFN
TJMAX = 125°C, θJA = 102°C/W, θJC = 20°C/W
EXPOSED PAD (PIN 7) IS GND, MUST BE SOLDERED TO PCB
*ADJ FOR LTC3025-1, SENSE FOR LTC3025-2, LTC3025-3, LTC3025-4
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3025EDC-1#PBF
LTC3025EDC-1#TRPBF
LDDW
6-Lead (2mm × 2mm) Plastic DFN
–40°C to 125°C
LTC3025IDC-1#PBF
LTC3025IDC-1#TRPBF
LDDW
6-Lead (2mm × 2mm) Plastic DFN
–40°C to 125°C
LTC3025EDC-2#PBF
LTC3025EDC-2#TRPBF
LDMK
6-Lead (2mm × 2mm) Plastic DFN
–40°C to 125°C
LTC3025IDC-2#PBF
LTC3025IDC-2#TRPBF
LDMK
6-Lead (2mm × 2mm) Plastic DFN
–40°C to 125°C
LTC3025EDC-3#PBF
LTC3025EDC-3#TRPBF
LDQS
6-Lead (2mm × 2mm) Plastic DFN
–40°C to 125°C
LTC3025IDC-3#PBF
LTC3025IDC-3#TRPBF
LDQS
6-Lead (2mm × 2mm) Plastic DFN
–40°C to 125°C
LTC3025EDC-4#PBF
LTC3025EDC-4#TRPBF
LDPQ
6-Lead (2mm × 2mm) Plastic DFN
–40°C to 125°C
LTC3025IDC-4#PBF
LTC3025IDC-4#TRPBF
LDPQ
6-Lead (2mm × 2mm) Plastic DFN
–40°C to 125°C
LEAD BASED FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3025EDC-1
LTC3025EDC-1#TR
LDDW
6-Lead (2mm × 2mm) Plastic DFN
–40°C to 125°C
LTC3025IDC-1
LTC3025IDC-1#TR
LDDW
6-Lead (2mm × 2mm) Plastic DFN
–40°C to 125°C
LTC3025EDC-2
LTC3025EDC-2#TR
LDMK
6-Lead (2mm × 2mm) Plastic DFN
–40°C to 125°C
LTC3025IDC-2
LTC3025IDC-2#TR
LDMK
6-Lead (2mm × 2mm) Plastic DFN
–40°C to 125°C
LTC3025EDC-3
LTC3025EDC-3#TR
LDQS
6-Lead (2mm × 2mm) Plastic DFN
–40°C to 125°C
LTC3025IDC-3
LTC3025IDC-3#TR
LDQS
6-Lead (2mm × 2mm) Plastic DFN
–40°C to 125°C
LTC3025EDC-4
LTC3025EDC-4#TR
LDPQ
6-Lead (2mm × 2mm) Plastic DFN
–40°C to 125°C
LTC3025IDC-4
LTC3025IDC-4#TR
LDPQ
6-Lead (2mm × 2mm) Plastic DFN
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 1.5V, VBIAS = 3.6V, COUT = 1μF, CIN = 0.1μF, CBIAS = 0.1μF
(all capacitors ceramic) unless otherwise noted.
PARAMETER
VIN Operating Voltage (Note 4)
CONDITIONS
MIN
TYP
MAX
UNITS
LTC3025-1
l
0.9
5.5
V
LTC3025-2
l
1.4
5.5
V
LTC3025-3
l
1.7
5.5
V
LTC3025-4
l
2.0
5.5
V
30251234fc
2
LTC3025-1/LTC3025-2/
LTC3025-3/LTC3025-4
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 1.5V, VBIAS = 3.6V, COUT = 1μF, CIN = 0.1μF, CBIAS = 0.1μF
(all capacitors ceramic) unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VBIAS Operating Voltage (Note 4)
LTC3025-1
l
2.5
5.5
V
LTC3025-2
l
2.7
5.5
V
LTC3025-3
l
3.0
5.5
V
LTC3025-4
l
3.3
5.5
V
l
2.2
2.5
V
VIN Operating Current
IOUT = 10μA, VOUT = 1.2V, LTC3025-1
l
4
10
μA
VIN Operating Current
IOUT = 0μA, LTC3025-2/LTC3025-3/LTC3025-4
l
4
10
μA
VBIAS Operating Current
IOUT = 10μA, VOUT = 1.2V, LTC3025-1
l
50
80
μA
VBIAS Operating Current
IOUT = 0μA, LTC3025-2/LTC3025-3/LTC3025-4
l
50
80
μA
VIN Shutdown Current
VSHDN = 0V
1
5
μA
VBIAS Shutdown Current
VSHDN = 0V
0.01
1
μA
VADJ Regulation Voltage (Note 5)
1mA ≤ IOUT ≤ 500mA, VOUT = 1.2V, 1.5V ≤ VIN ≤ 5V, LTC3025-1
1mA ≤ IOUT ≤ 500mA, VOUT = 1.2V, 1.5V ≤ VIN ≤ 5V, LTC3025-1
l
0.395
0.392
0.4
0.4
0.405
0.408
V
V
VSENSE Regulation Voltage (Note 5)
1mA ≤ IOUT ≤ 500mA, 1.5V ≤ VIN ≤ 5V, LTC3025-2
1mA ≤ IOUT ≤ 500mA, 1.5V ≤ VIN ≤ 5V, LTC3025-2
l
1.185
1.176
1.2
1.2
1.215
1.224
V
V
VSENSE Regulation Voltage (Note 5)
1mA ≤ IOUT ≤ 500mA, 1.7V ≤ VIN ≤ 5V, LTC3025-3
1mA ≤ IOUT ≤ 500mA, 1.7V ≤ VIN ≤ 5V, LTC3025-3
l
1.481
1.470
1.5
1.5
1.519
1.530
V
V
VSENSE Regulation Voltage (Note 5)
1mA ≤ IOUT ≤ 500mA, 2.0V ≤ VIN ≤ 5V, LTC3025-4
1mA ≤ IOUT ≤ 500mA, 2.0V ≤ VIN ≤ 5V, LTC3025-4
l
1.777
1.764
1.8
1.8
1.823
1.836
V
V
IADJ ADJ Input Current
VADJ = 0.45V, LTC3025-1
–50
0
50
nA
VBIAS Undervoltage Lockout
OUT Load Regulation (Referred to ADJ Pin) ΔIOUT = 1mA to 500mA, LTC3025-1
–0.35
mV
OUT Load Regulation
ΔIOUT = 1mA to 500mA, LTC3025-2
ΔIOUT = 1mA to 500mA, LTC3025-3
ΔIOUT = 1mA to 500mA, LTC3025-4
–1
–1.3
–1.5
mV
mV
mV
VIN Line Regulation (Referred to ADJ Pin)
VIN = 1.5V to 5V, VBIAS = 3.6V, VOUT = 1.2V,
IOUT = 1mA, LTC3025-1
0.07
mV
VIN Line Regulation
VIN = 1.5V to 5V, VBIAS = 3.6V, IOUT = 1mA, LTC3025-2
VIN = 1.8V to 5V, VBIAS = 3.6V, IOUT = 1mA, LTC3025-3
VIN = 2.1V to 5V, VBIAS = 3.6V, IOUT = 1mA, LTC3025-4
0.21
0.26
0.32
mV
mV
mV
VBIAS Line Regulation
VIN = 1.5V, VBIAS = 2.7V to 5V, VOUT = 1.2V, IOUT = 1mA,
LTC3025-1
l
4.5
16.5
mV
VBIAS Line Regulation
VIN = 1.5V, VBIAS = 2.7V to 5V, IOUT = 1mA, LTC3025-2
VIN = 1.8V, VBIAS = 3.0V to 5V, IOUT = 1mA, LTC3025-3
VIN = 2.1V, VBIAS = 3.3V to 5V, IOUT = 1mA, LTC3025-4
l
l
l
4.5
4.5
4.5
16.5
16.5
16.5
mV
mV
mV
VIN to VOUT Dropout Voltage (Notes 4, 6)
VBIAS = 2.8V, VIN = 1.5V, IOUT = 500mA,
VADJ = 0.37V(LTC3025-1), VSENSE = 1.15V(LTC3025-2)
l
85
120
170
mV
mV
VIN to VOUT Dropout Voltage (Notes 4, 6)
VBIAS = 3.1V, VIN = 1.7V, IOUT = 500mA,
VSENSE = 1.45V(LTC3025-3)
l
90
130
185
mV
mV
VIN to VOUT Dropout Voltage (Notes 4, 6)
VBIAS = 3.4V, VIN = 2.0V, IOUT = 500mA,
VSENSE = 1.75V(LTC3025-4)
l
90
130
185
mV
mV
VBIAS to VOUT Dropout Voltage (Note 4)
LTC3025-1
l
1.5
V
l
IOUT Continuous Output Current
IOUT Current Limit
VADJ = 0V(LTC3025-1),
VSENSE = 0V(LTC3025-2/LTC3025-3/LTC3025-4)
en Output Voltage Noise
f = 10Hz to 100kHz, IOUT = 300mA
500
mA
1130
80
mA
μVRMS
30251234fc
3
LTC3025-1/LTC3025-2/
LTC3025-3/LTC3025-4
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 1.5V, VBIAS = 3.6V, COUT = 1μF, CIN = 0.1μF, CBIAS = 0.1μF
(all capacitors ceramic) unless otherwise noted.
PARAMETER
CONDITIONS
MIN
VIH SHDN Input High Voltage
l
VIL SHDN Input Low Voltage
l
TYP
MAX
UNITS
0.9
V
0.3
V
IIH SHDN Input High Current
SHDN = 1.2V
–1
1
μA
IL SHDN Input Low Current
SHDN = 0V
–1
1
μA
Note 4: For the LTC3025-1, a regulated output voltage will only be available
when the minimum IN and BIAS operating voltages as well as the IN to
OUT and BIAS to OUT dropout voltages are all satisfied. For the
LTC3025-2/LTC3025-3/LTC3025-4 the minimum IN operating voltage
assumes IOUT = 500mA. For correct regulation at IOUT < 500mA the
minimum IN operating voltage decreases to the maximum VSENSE
Regulation Voltage as IOUT decreases to 0mA (i.e. VINMIN = 1.312V at IOUT
= 250mA for the LTC3025-2).
Note 5: Operating conditions are limited by maximum junction
temperature. The regulated output voltage specification will not apply
for all possible combinations of input voltage and output current. When
operating at maximum input voltage, the output current range must be
limited. When operating at maximum output current, the input voltage
range must be limited.
Note 6: Dropout voltage is minimum input to output voltage differential
needed to maintain regulation at a specified output current. In dropout, the
output voltage will be equal to VIN – VDROPOUT.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 3: The LTC3025-X regulators are tested and specified under pulse
load conditions such that TJ ≈ TA. The LTC3025E-X are guaranteed to
meet performance specifications from 0°C and 125°C. Specifications over
the –40°C to 125°C operating junction temperature range are assured by
design, characterization and correlation with statistical process controls.
The LTC3025I-X are guaranteed to meet performance specifications over
the full –40°C to 125°C operating junction temperature range.
TYPICAL PERFORMANCE CHARACTERISTICS
VIN to VOUT Dropout Voltage
vs IOUT
VIN = 1.5V
70 VOUT = 1.2V
400
60
350
TA = 25°C
IBIAS (μA)
60
TA = –40°C
40
80
450
TA = 125°C
80
BIAS No Load Operating Current
500
VBIAS = 2.8V
VIN = 1.4V
100
DROPOUT VOLTAGE (mV)
Operating BIAS Current
vs Output Current
300
125°C
250
25°C
–40°C
200
0
50 100 150 200 250 300 350 400 450 500
IOUT (mA)
30251234 G01
–40°C
40
25°C
30
20
10
50
0
125°C
50
150
100
20
IBIAS (μA)
120
(TA = 25°C unless otherwise noted)
0
0.01
0.1
1
10
IOUT (mA)
100
1000
30251234 G02
0
2.5
3
3.5
4.5
4
VBIAS (V)
5
5.5
30251234 G03
30251234fc
4
LTC3025-1/LTC3025-2/
LTC3025-3/LTC3025-4
TYPICAL PERFORMANCE CHARACTERISTICS
VIN Shutdown Current
VIN No Load Operating Current
10
IIN (μA)
VBIAS = 5V
404
6
5
125°C
8
85°C
6
403
ADJUST VOLTAGE (mV)
12
Adjust Voltage vs Temperature
405
7
VBIAS = 5V
VOUT = 0.8V
25°C
–40°C
4
IIN (μA)
14
(TA = 25°C unless otherwise noted)
3
25°C
–40°C
4
2
2
1
0
0.5
0
0.5
2.5
3.5
4.5
5.5
1.5
2.5
3.5
399
398
–25
VIN (V)
1000
1600
900
1400
CURRENT LIMIT (mA)
800
VBIAS = 5V
VBIAS = 2.5V
400
300
100
125
30251234 G06
Burst Mode DC/DC Buck Ripple
Rejection
Current Limit vs VIN Voltage
600
50
25
0
75
TEMPERATURE (°C)
30251234 G05
SHDN Threshold vs Temperature
SHDN THRESHOLD (mV)
400
395
–50
5.5
4.5
30251234 G04
500
401
396
VIN (V)
700
402
397
85°C
1.5
VBIAS = 3.6V
VIN = 1.5V
IOUT = 10μA
VIN
AC
100mV/DIV
1200
1000
800
VOUT
AC
10mV/DIV
600
400
200
VIN = 1.8V
VOUT = 1.5V
COUT = 1μF
IOUT = 50mA
200
100
0
–50
0
–25
50
25
0
75
TEMPERATURE (°C)
100
125
0
1
2
4
3
VIN (V)
6
5
30251234 G09
10μs/DIV
30251234 G08
30251234 G07
VIN Ripple Rejection
vs Frequency
BIAS Ripple Rejection
vs Frequency
70
3MHz VIN Supply Rejection
50
70
45
60
50
40
COUT = 1μF
30
20
10
0
100
1k
50
40
30
COUT = 1μF
20
VBIAS = 3.6V
VIN = 1.5V
VOUT = 1.2V
IOUT = 100mA
10
10k
100k
1M
10M
FREQUENCY (Hz)
COUT = 10μF
REJECTION (dB)
COUT = 10μF
REJECTION (dB)
REJECTION (dB)
60
1k
35
COUT = 1μF
30
25
20
10
10k
100k
1M
10M
FREQUENCY (Hz)
30251234 G10
COUT = 10μF
15
VBIAS = 3.6V
VIN = 1.5V
VOUT = 1.2V
IOUT = 100mA
0
100
40
30251234 G11
5 VBIAS = 3.6V
VOUT = 1.2V
0
1.2 1.4 1.6
IOUT = 100mA
IOUT = 300mA
1.8 2.0
VIN (V)
2.2
2.4
2.6
30251234 G12
30251234fc
5
LTC3025-1/LTC3025-2/
LTC3025-3/LTC3025-4
TYPICAL PERFORMANCE CHARACTERISTICS
(TA = 25°C unless otherwise noted)
VIN to VOUT Dropout Voltage
vs VIN (25°C) LTC3025-1
Transient Response
VIN to VOUT Dropout Voltage
vs VIN (90°C) LTC3025-1
0.300
0.725
0.250
0.250
0.225
VOUT
AC
10mV/DIV
0.175
0.150
BIAS = 3.8V
0.125
0.100
0.075
VIN = 1.5V
VOUT = 1.2V
VBIAS = 3.6V
COUT = 1μF
100μs/DIV
30251234 G13
0.225
BIAS = 3.3V
BIAS = 3V
0.200
DROPOUT (V)
10mA
DROPOUT (V)
IOUT
0.300
BIAS = 2.7V
0.725
250mA
BIAS = 5V
VADJ = 0.385
IOUT = 500mA
TA = 25°C
0.050
0.025
0
1
1.5
2
3
2.5
VIN (V)
3.5
4
4.5
30251234 G14
0.200
0.175
0.150
BIAS = 3.8V
0.125
BIAS = 5V
0.100
0.075
BIAS = 3.3V
VADJ = 0.385
BIAS = 3V
IOUT = 500mA
BIAS = 2.7V
TA = 90°C
0.050
0.025
0
1
1.5
2
3
2.5
VIN (V)
3.5
4
4.5
30251234 G15
PIN FUNCTIONS
BIAS (Pin 1): BIAS Input Voltage. BIAS provides internal
power for LTC3025-X circuitry. The BIAS pin should be
locally bypassed to ground if the LTC3025-X is more than a
few inches away from another source of bulk capacitance.
In general, the output impedance of a battery rises with
frequency, so it is usually advisable to include an input
bypass capacitor in battery-powered circuits. A capacitor
in the range of 0.01μF to 0.1μF is usually sufficient.
GND (Pin 2): Ground. Connect to a ground plane.
IN (Pin 3): Input Supply Voltage. The output load current
is supplied directly from IN. The IN pin should be locally
bypassed to ground if the LTC3025-X is more than a few
inches away from another source of bulk capacitance. In
general, the output impedance of a battery rises with frequency, so it is usually advisable to include an input bypass
capacitor when supplying IN from a battery. A capacitor
in the range of 0.1μF to 1μF is usually sufficient.
OUT (Pin 4): Regulated Output Voltage. The OUT pin
supplies power to the load. A minimum ceramic output
capacitor of at least 1μF is required to ensure stability.
Larger output capacitors may be required for applications
with large transient loads to limit peak voltage transients.
See the Applications Information section for more information on output capacitance.
ADJ (Pin 5) LTC3025-1: Adjust Input. This is the input to
the error amplifier. The ADJ pin reference voltage is 0.4V
referenced to ground. The output voltage range is 0.4V to
3.6V and is typically set by connecting ADJ to a resistor
divider from OUT to GND. See Figure 2.
SENSE (Pin 5) LTC3025-2, LTC3025-3, LTC3025-4: Output Sense. The sense is the input to the resistor divider
driving the error amplifier. Optimum regulation will be
obtained at the point where SENSE is connected to OUT.
The SENSE pin bias current is 10μA at the nominal rated
output voltage.
SHDN (Pin 6): Shutdown Input, Active Low. This pin is
used to put the LTC3025-X into shutdown. The SHDN pin
current is typically less than 10nA. The SHDN pin cannot
be left floating and must be tied to a valid logic level (such
as BIAS) if not used.
Exposed Pad (Pin 7): Ground and Heat Sink. Must be
soldered to PCB ground plane or large pad for optimal
thermal performance.
30251234fc
6
LTC3025-1/LTC3025-2/
LTC3025-3/LTC3025-4
BLOCK DIAGRAM
LTC3025-1
1
6
LTC3025-2, LTC3025-3, LTC3025-4
BIAS
SHDN
1
REFERENCE
SHDN
0.4V
SOFT-START
IN
+
–
2
3
6
BIAS
SHDN
REFERENCE
SHDN
SOFT-START
IN
+
0.4V
–
6μA
GND
OUT
ADJ
4
2
3
6μA
OUT
GND
SENSE
5
R1
40k
4
5
R2
80k (LTC3025-2)
110k (LTC3025-3)
140k (LTC3025-4)
30251234 BD
APPLICATIONS INFORMATION
Operation (Refer to Block Diagram)
Adjustable Output Voltage (LTC3025-1)
The LTC3025-X is a micropower, VLDO (very low dropout)
linear regulator which operates from input voltages as low
as 0.9V. The device provides a highly accurate output that
is capable of supplying 500mA of output current with a
typical dropout voltage of only 85mV. A single ceramic
capacitor as small as 1μF is all that is required for output
bypassing. A low reference voltage allows the LTC3025-1
output to be programmed to much lower voltages than
available in common LDOs (range of 0.4V to 3. 6V). The
LTC3025-2/LTC3025-3/LTC3025-4 have fixed outputs of
1.2V, 1.5V and 1.8V respectively, eliminating the need for
an external resistor divider.
The output voltage is set by the ratio of two external resistors as shown in Figure 2. The device servos the output
to maintain the ADJ pin voltage at 0.4V (referenced to
ground). Thus, the current in R1 is equal to 0.4V/R1. For
good transient response, stability, and accuracy, the current
As shown in the Block Diagram, the BIAS input supplies
the internal reference and LDO circuitry while all output
current comes directly from the IN input for high efficiency
regulation. The low quiescent supply currents IIN = 4μA,
IBIAS = 50μA drop to IIN = 1μA, IBIAS = 0.01μA typical in
shutdown making the LTC3025-X an ideal choice for use
in battery-powered systems.
The device includes current limit and thermal overload
protection. The fast transient response of the follower
output stage overcomes the traditional tradeoff between
dropout voltage, quiescent current and load transient
response inherent in most LDO regulator architectures.
The LTC3025-X also includes overshoot detection circuitry
which brings the output back into regulation when going
from heavy to light output loads (see Figure 1).
300mA
IOUT
0mA
VOUT
AC
20mV/DIV
VIN = 1.5V
VOUT = 1.2V
VBIAS = 3.6V
COUT = 1μF
30251234 F01
100μs/DIV
Figure 1. LTC3025-X Transient Response
( )
VOUT = 0.4V 1 + R2
R1
OUT
R2
ADJ
COUT
R1
GND
30251234 F02
Figure 2. Programming the LTC3025-1
30251234fc
7
LTC3025-1/LTC3025-2/
LTC3025-3/LTC3025-4
APPLICATIONS INFORMATION
in R1 should be at least 8μA, thus the value of R1 should
be no greater than 50k. The current in R2 is the current in
R1 plus the ADJ pin bias current. Since the ADJ pin bias
current is typically <10nA, it can be ignored in the output
voltage calculation. The output voltage can be calculated
using the formula in Figure 2. Note that in shutdown the
output is turned off and the divider current will be zero
once COUT is discharged.
Output Capacitance and Transient Response
The LTC3025-1 operates at a relatively high gain of
–0.7μV/mA referred to the ADJ input. Thus a load current change of 1mA to 500mA produces a –0.35mV drop
at the ADJ input. To calculate the change referred to the
output simply multiply by the gain of the feedback network
(i. e. ,1 + R2/R1). For example, to program the output for
1.2V choose R2/R1 = 2. In this example, an output current
change of 1mA to 500mA produces –0.35mV • (1 + 2) =
1.05mV drop at the output.
The LTC3025-X is designed to be stable with a wide range
of ceramic output capacitors. The ESR of the output capacitor affects stability, most notably with small capacitors. A
minimum output capacitor of 1μF with an ESR of 0.05Ω or
less is recommended to ensure stability. The LTC3025-X
is a micropower device and output transient response
will be a function of output capacitance. Larger values
of output capacitance decrease the peak deviations and
provide improved transient response for larger load current
changes. Note that bypass capacitors used to decouple
individual components powered by the LTC3025-X will
increase the effective output capacitor value. High ESR
tantalum and electrolytic capacitors may be used, but
a low ESR ceramic capacitor must be in parallel at the
output. There is no minimum ESR or maximum capacitor
size requirements.
Because the ADJ pin is relatively high impedance (depending on the resistor divider used), stray capacitance at this
pin should be minimized (<10pF) to prevent phase shift
in the error amplifier loop. Additionally, special attention
should be given to any stray capacitances that can couple
external signals onto the ADJ pin producing undesirable
output ripple. For optimum performance connect the ADJ
pin to R1 and R2 with a short PCB trace and minimize all
other stray capacitance to the ADJ pin.
Extra consideration must be given to the use of ceramic
capacitors. Ceramic capacitors are manufactured with a
variety of dielectrics, each with different behavior across
temperature and applied voltage. The most common dielectrics used are Z5U, Y5V, X5R and X7R. The Z5U and
Y5V dielectrics are good for providing high capacitances
in a small package, but exhibit large voltage and temperature coefficients as shown in Figures 3 and 4. When
used with a 2V regulator, a 1μF Y5V capacitor can lose as
20
20
BOTH CAPACITORS ARE 1μF,
10V, 0603 CASE SIZE
0
CHANGE IN VALUE (%)
CHANGE IN VALUE (%)
0
X5R
–20
–40
Y5V
–60
Y5V
–40
–60
–80
–80
–100
X5R
–20
0
2
6
4
DC BIAS VOLTAGE (V)
8
10
30251234 F03
Figure 3. Ceramic Capacitor DC Bias Characteristics
BOTH CAPACITORS ARE 1μF,
10V, 0603 CASE SIZE
–100
–50
0
25
50
–25
TEMPERATURE (°C)
75
30251234 F04
Figure 4. Ceramic Capacitor Temperature Characteristics
30251234fc
8
LTC3025-1/LTC3025-2/
LTC3025-3/LTC3025-4
APPLICATIONS INFORMATION
much as 75% of its intial capacitance over the operating
temperature range. The X5R and X7R dielectrics result in
more stable characteristics and are usually more suitable
for use as the output capacitor. The X7R type has better
stability across temperature, while the X5R is less expensive
and is available in higher values. In all cases, the output
capacitance should never drop below 0.4μF, or instability
or degraded performance may occur.
Calculating Junction Temperature
Thermal Considerations
where:
The power handling capability of the device will be limited
by the maximum rated junction temperature (125°C). The
power dissipated by the device will be the output current
multiplied by the input/output voltage differential:
(IOUT) (VIN – VOUT)
Note that the BIAS current is less than 500μA even under
heavy loads, so its power consumption can be ignored
for thermal calculations.
The LTC3025-X has internal thermal limiting designed to
protect the device during momentary overload conditions.
For continuous normal conditions, the maximum junction
temperature rating of 125°C must not be exceeded. It is
important to give careful consideration to all sources of
thermal resistance from junction to ambient. Additional
heat sources mounted nearby must also be considered.
For surface mount devices, heat sinking is accomplished
by using the heat-spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through holes can also be used to spread the heat generated by power devices.
The LTC3025-X 2mm × 2mm DFN package is specified
as having a junction-to-ambient thermal resistance of
102°C/W, which assumes a minimal heat spreading copper plane. The actual thermal resistance can be reduced
substantially by connecting the package directly to a good
heat spreading ground plane. When soldered to 2500mm2
double-sided 1 oz. copper plane, the actual junction-toambient thermal resistance can be less than 60°C/W.
Example: Given an output voltage of 1.2V, an input voltage
of 1.8V to 3V, an output current range of 0mA to 100mA
and a maximum ambient temperature of 50°C, what will
the maximum junction temperature be?
The power dissipated by the device will be equal to:
IOUT(MAX) (VIN(MAX) – VOUT)
IOUT(MAX) = 100mA
VIN(MAX) = 3V
So:
P = 100mA(3V – 1.2V) = 0.18W
Even under worst-case conditions, the LTC3025-X’s BIAS
pin power dissipation is only about 1mW, thus can be ignored. Assuming a junction-to-ambient thermal resistance
of 102°C/W, the junction temperature rise above ambient
will be approximately equal to:
0.18W(102°C/W) = 18.4°C
The maximum junction temperature will then be equal to
the maximum junction temperature rise above ambient
plus the maximum ambient temperature or:
TJ = 50°C + 18.4°C = 68.4°C
Short-Circuit/Thermal Protection
The LTC3025-X has built-in short-circuit current limiting
as well as overtemperature protection. During short-circuit
conditions, internal circuitry automatically limits the output
current to approximately 1130mA. At higher temperatures,
or in cases where internal power dissipation causes excessive self heating on chip, the thermal shutdown circuitry
will shut down the LDO when the junction temperature
exceeds approximately 150°C. It will re enable the LDO
once the junction temperature drops back to approximately
140°C. The LTC3025-X will cycle in and out of thermal
30251234fc
9
LTC3025-1/LTC3025-2/
LTC3025-3/LTC3025-4
APPLICATIONS INFORMATION
shutdown without latch-up or damage until the overstress
condition is removed. Long term overstress (TJ > 125°C)
should be avoided as it can degrade the performance or
shorten the life of the part.
Soft-Start Operation
The LTC3025-X includes a soft-start feature to prevent
excessive current flow during start-up. When the LDO is
enabled, the soft-start circuitry gradually increases the LDO
reference voltage from 0V to 0.4V over a period of about
600μs. There is a short 700μs delay from the time the
part is enabled until the LDO output starts to rise. Figure
5 shows the start-up and shutdown output waveform.
SHDN
ON
OFF
1.2V
VOUT
200mV/DIV
0V
TA = 25°C
VIN = 1.5V
VBIAS = 3.6V
COUT = 1μF
RLOAD = 4Ω
500μs/DIV
30251234 F05
Figure 5. Output Start-Up and Shutdown
TYPICAL APPLICATION
High Efficiency 1.5V Step-Down Converter with Efficient 1.2V VLDO Output
OFF ON
1
0.1μF
VIN
2.7V
TO 5.5V
4
CIN**
4.7μF
CER
VIN
SW
3
LTC3406-1.5
1
RUN
VOUT
5
2.2μH*
OUT
BIAS
4
80.6k
LTC3025-1
3
IN
ADJ
1μF
VOUT = 1.2V
IOUT ≤ 500mA
5
40.2k
VOUT
1.5V
600mA
6
SHDN
GND
30251234 TA02
COUT†
10μF
CER
GND
2
*MURATA LQH32CN2R2M33
**TAIYO YUDEN JMK212BJ475MG
†
TAIYO YUDEN JMK316BJ106ML
Efficiency vs Output Current
100
VIN = 3.6V
EFFICIENCY (%)
90
80
LTC3406-1.5
VOUT = 1.5V
LTC3025-1
VOUT = 1.2V
70
60
50
40
0.1
1
10
100
OUTPUT CURRENT (mA)
1000
30251234 TA03
30251234fc
10
LTC3025-1/LTC3025-2/
LTC3025-3/LTC3025-4
PACKAGE DESCRIPTION
DC Package
6-Lead Plastic DFN (2mm × 2mm)
(Reference LTC DWG # 05-08-1703)
R = 0.115
TYP
0.56 ± 0.05
(2 SIDES)
0.675 ±0.05
2.50 ±0.05
1.15 ±0.05 0.61 ±0.05
(2 SIDES)
PIN 1 BAR
PACKAGE
TOP MARK
OUTLINE
(SEE NOTE 6)
0.38 ± 0.05
4
2.00 ±0.10
(4 SIDES)
PIN 1
CHAMFER OF
EXPOSED PAD
3
0.25 ± 0.05
0.50 BSC
1.42 ±0.05
(2 SIDES)
0.200 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
6
0.75 ±0.05
1
(DC6) DFN 1103
0.25 ± 0.05
0.50 BSC
1.37 ±0.05
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WCCD-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
30251234fc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LTC3025-1/LTC3025-2/
LTC3025-3/LTC3025-4
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT®1129
700mA, Micropower, LDO
VIN: 4.2V to 30V, VOUT(MIN) = 3.75V, VDO = 0.40V, IQ = 50μA, ISD < 16μA,
VOUT = Adj, 3.3V, 5V, DD, SOT-223, S8, TO-220, TSSOP20 Packages
LT1175
500mA, Micropower, Negative LDO
VIN: –20V to –4.3V, VOUT(MIN) = –3.8V, VDO = 0.50V, IQ = 45μA, ISD < 10μA,
VOUT = Adj, –5V, DD, SOT-223, S8, N8 Packages.
Guaranteed Voltage Tolerance and Line/Load Regulation
LT1185
3A, Negative LDO
VIN: –35V to –4.2V, VOUT(MIN) = –2.40V, VDO = 0.80V, IQ = 2.5mA, ISD < 1μA,
VOUT = Adj, TO-220 Package. Accurate Programmable Current Limit, Remote Sense
LT1761
100mA, Low Noise Micropower, LDO
VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 20μA, ISD < 1μA,
VOUT = Adj, 1.5V, 1.8V, 2V, 2.5V, 2.8V, 3V, 3.3V, 5V, ThinSOTTM Package.
Low Noise < 20μVRMSP-P, Stable with 1μF Ceramic Capacitors
LT1762
150mA, Low Noise Micropower LDO
VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 25μA, ISD < 1μA,
VOUT = Adj, 2.5V, 3V, 3.3V, 5V, MS8 Package. Low Noise < 20μVRMSP-P
LT1763
500mA, Low Noise Micropower LDO
VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 30μA, ISD < 1μA,
VOUT = 1.5, 1.8V, 2.5V, 3V, 3.3V, 5V, S8 Package. Low Noise < 20μVRMSP-P
LT1764/LT1764A
3A, Low Noise, Fast Transient Response, LDO
VIN: 2.7V to 20V, VOUT(MIN) = 1.21V, VDO = 0.34V, IQ = 1mA, ISD < 1μA,
VOUT = 1.8V, 2.5V, 3.3V, DD, TO-220 Packages. Low Noise < 40μVRMSP-P,
“A” Version Stable with Ceramic Capacitors
LTC1844
150mA, Very Low Dropout LDO
VIN: 1.6V to 6.5V, VOUT(MIN) = 1.25V, VDO = 0.08V, IQ = 40μA, ISD < 1μA,
VOUT = Adj, 1.5V, 1.8V, 2.5V, 2.8V, 3.3V, ThinSOT Package.
Low Noise < 30μVRMSP-P, Stable with 1μF Ceramic Capacitors
LT1962
300mA, Low Noise Micropower LDO
VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.27V, IQ = 30μA, ISD < 1μA,
VOUT = 1.5, 1.8V, 2.5V, 3V, 3.3V, 5V, MS8 Package. Low Noise < 20μVRMSP-P
LT1963/LT1963A
1.5A, Low Noise, Fast Transient Response, LDO
VIN: 2.1V to 20V, VOUT(MIN) = 1.21V, VDO = 0.34V, IQ = 1mA, ISD < 1μA,
VOUT = 1.5V, 1.8V, 2.5V, 3.3V, DD, SOT-223, S8, TO-220 Packages.
Low Noise < 40μVRMSP-P, “A”Version Stable with Ceramic Capacitors
LT1964
200mA, Low Noise Micropower, Negative LDO
VIN: –0.9V to –20V, VOUT(MIN) = –1.21V, VDO = 0.34V, IQ = 30μA, ISD < 3μA,
VOUT = Adj, –5V, ThinSOT Package.
Low Noise < 30μVRMSP-P, Stable with Ceramic Capacitors
LT1965
1.1A, Low Noise, Low Dropout Linear Regulator
290mV Dropout Voltage, Low Noise: 40μVRMS, VIN: 1.8V to 20V, VOUT: 1.2V to
19.5V, Stable with Ceramic Caps, TO-220, DD, MSOP and 3 × 3 DFN Packages
LT3020
100mA, Low Voltage, VLDO
VIN: 0.9V to 10V, VOUT(MIN) = 0.20V, VDO = 0.15V, IQ = 120μA, ISD < 3μA,
VOUT = Adj, DFN, MS8 Package
LT3023
Dual, 2 × 100mA, Low Noise Micropower, LDO
VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 40μA, ISD < 1μA,
VOUT = Adj, DFN, MS Packages.
Low Noise < 20μVRMSP-P, Stable with 1μF Ceramic Capacitors
LT3024
Dual 100mA/500mA, Low Noise Micropower,
LDO
VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 60μA, ISD < 1μA,
VOUT = Adj, DFN, TSSOP Packages.
Low Noise < 20μVRMSP-P, Stable with 1μF Ceramic Capacitors
LTC3025
300mA Micropower VLDO Linear Regulator
45mV Dropout Voltage, Low Noise: 80μVRMS, VIN: 0.9V to 5.5V, Low IQ = 54μA,
2mm × 2mm 6-Lead DFN Package
LTC3026
1.5A, Low Input Voltage VLDO Regulator
VIN: 1.14V to 3.5V (Boost Enabled), 1.14V to 5.5V (with External 5V Rail),
VDO = 0.1V, IQ = 950μA, Stable with 10μF Ceramic Capacitors,
DFN-10 and MSOP-10 Packages
LT3080/LT3080-1 1.1A, Parallelable, Low Noise, Low Dropout
Linear Regulator
300mV Dropout Voltage (2-supply operation), Low Noise: 40μVRMS, VIN: 1.2V to
36V, VOUT: 0V to 35.7V, Current-Based Reference with 1-Resistor VOUT Set; Directly
Parallelable (No Op Amp Required), Stable with Ceramic Caps, TO-220, SOT-223,
MSOP and 3 × 3 DFN Packages; “–1” Version Has Integrated Internal Ballast
Resistor
ThinSOT is a trademark of Linear Technology Corporation.
30251234fc
12 Linear Technology Corporation
LT 1008 REV C • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2007
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