NCP1595, NCP1595A Current Mode PWM Converter for Low Voltage Outputs The NCP1595/NCP1595A is a current mode PWM buck converter with integrated power switch and synchronous rectifier. It can provide up to 1.5 A output current with high conversion efficiency. High frequency PWM control scheme can provide a low output ripple noise. Thus, it allows the usage of small size passive components to reduce the board space. In a low load condition, the controller will automatically change to PFM mode for provides a higher efficiency at low load. Additionally, the device includes soft−start, thermal shutdown with hysteresis, cycle−by−cycle current limit, and short circuit protection. This device is available in compact 3x3 DFN package. http://onsemi.com 1 DFN6 3*3 MM, 0.95 PITCH CASE 506AH Features • • • • • • • • • • • • • • • • • • MARKING DIAGRAMS High Efficiency 95% @ 3.375 V Synchronous Rectification for Higher Efficiency in PWM Mode Integrated MOSFET Fully Internal Compensation High Switching Frequency, 1.0 MHz Low Output Ripple Cycle−by−cycle Current Limit Current Mode Control Short Circuit Protection Built−in Slope Compensation for Current Mode PWM Converter $1.5% Reference Voltage Thermal Shutdown with Hysteresis Ext. Adjustable Output Voltage Fast Transient Response Low Profile and Minimum External Components Designed for Use with Ceramic Capacitor Compact 3x3 DFN Package These are Pb−Free Devices • Hard Disk Drives • USB Power Device • Wireless and DSL Modems October, 2006 − Rev. 2 A L Y W G 1 1595A ALYW G = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package PIN CONNECTIONS FB GND LX NC VCC VCCP 1595 FB GND LX EN VCC VCCP 1595A ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 11 of this data sheet. Typical Applications © Semiconductor Components Industries, LLC, 2006 1 N1595 ALYW G 1 Publication Order Number: NCP1595/D NCP1595, NCP1595A L1 VIN = 4.0 V to 5.5 V C1 VOUT = 0.8 V to 0.9 x VIN LX VCCP VCC NCP1595 GND EN FB R1 C2 R2 Figure 1. Typical Operating Circuit ABSOLUTE MAXIMUM RATINGS Symbol Value Unit Power Supply (Pin 4, 5) Rating VIN 7.0 −0.3 (DC) −1.0 (100 ns) V Input / Output Pins Pin 1,3,6 VIO 6.5, −0.3 (DC) −1.0 (100 ns) V PD RqJA 1450 68.5 mW °C/W TJ −40 to + 150 °C Thermal Characteristics 3x3 DFN Plastic Package Maximum Power Dissipation @ TA = 25°C Thermal Resistance Junction−to−Air Operating Junction Temperature Range (Note 4) Operating Ambient Temperature Range TA −40 to + 85 °C Storage Temperature Range Tstg − 55 to +150 °C 1 − Moisture Sensitivity Level (Note 3) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. NOTE: ESD data available upon request. 1. This device series contains ESD protection and exceeds the following tests: Human Body Model (HBM) 2.0 kV per JEDEC standard: JESD22−A114. Machine Model (MM) 200 V per JEDEC standard: JESD22−A115. 2. Latchup Current Maximum Rating: 150 mA per JEDEC standard: JESD78. 3. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020A. 4. The maximum package power dissipation limit must not be exceeded. PD + T J(max) * TA R qJA http://onsemi.com 2 NCP1595, NCP1595A ELECTRICAL CHARACTERISTICS (VIN = 5.0 V, VOUT = 1.2 V, TA = 25°C for typical value, −40°C v TA v 85°C for min/max values unless otherwise noted) Characteristic Symbol Min Typ Max Unit VIN 4.0 − 5.5 V Under Voltage Lockout Threshold VUVLO 3.2 3.5 3.8 V Under Voltage Lockout hysteresis VUVLO_HYS P FET Leakage Current (Pin 5, 4) TA = 25°C TA = −40°C to 85°C ILEAK−P N FET Leakage Current (Pin 3, 2) TA = 25°C TA = −40°C to 85°C ILEAK−N Operating Voltage 180 mV mA 1.0 10 15 1.0 10 15 0.800 0.812 V 10 100 nA mA FEEDBACK VOLTAGE FB Input Threshold (TA = −40°C to 85°C) VFB FB Input Current IFB Overvoltage Protect Higher than FB Threshold (TA = 25°C) 0.788 VOVP 2.0 5.0 10.0 % Thermal Shutdown Threshold (Note 5) TSHDN TBD 160 − °C Hysteresis TSDHYS 30 °C TONMIN 100 ns THERMAL SHUTDOWN PWM SMPS MODE Minimum ON−Time Switching Frequency (TA = −40°C to 85°C) FOSC 0.8 1.0 1.2 MHz Internal PFET ON−Resistance (ILX = 100 mA, VIN = 5.0 V, TA = 25°C) (Note 5) RDS(ON)_P − 0.2 0.3 W Internal NFET ON−Resistance (ILX = 100 mA, VIN = 5.0 V, TA = 25°C) (Note 5) RDS(ON)_N − 0.15 0.22 W DMAX − − 100 % Soft−Start Time (VIN = 5.0 V, Vo = 1.2 V, ILOAD = 0 mA, TA = 25°C) (Note 6) TSS − 1.0 − ms Main PFET Switch Current Limit (Note 5) ILIM 2.0 2.5 Enable Threshold High (NCP1595A Only) VEN_H 1.8 Enable Threshold Low VEN_L Maximum Duty Cycle A ENABLE (NCP1595A) Enable bias current ( EN = 0 V) V IEN 500 ICCP 10 ICC 900 ICC_SD 1.5 0.4 V TBD nA Total Device Quiescent Current Into VCCP (VIN = 5 V, VFB = 1.0 V, TA = 25°C) Quiescent Current Into VCC (VIN = 5 V, VFB = 1.0 V, TA = 25°C) Shutdown Quiescent Current into VCC and VCCP (NCP1595A Only) (EN = 0, VIN = 5 V, VFB = 1.0 V, TA = 25°C) 5. Values are design guarantee. 6. Design guarantee, value depends on voltage at VOUT. http://onsemi.com 3 mA mA 3.0 mA NCP1595, NCP1595A PIN FUNCTION DESCRIPTIONS Pin # Symbol Pin Description 1 FB Feedback pin. Part is internally compensated. Only necessary to place a voltage divider or connect the output directly to this pin. 2 GND 3 LX 4 VCCP 5 VCC 6 NC No Connection 1 FB Feedback pin. Part is internally compensated. Only necessary to place a voltage divider or connect the output directly to this pin. 2 GND 3 LX 4 VCCP 5 VCC 6 EN NCP1595 Ground Pin connected internally to power switch. Connect externally to inductor. Power connection to the power switch. IC power connection. NCP1595A VCC NC/EN VIN C1 Ground Pin connected internally to power switch. Connect externally to inductor. Power connection to the power switch. IC power connection. Device Enable pin. This pin has an internal current source pull up. No connect is enable the device. With this pin pulled down below 0.4 V, the device is disabled and enters the shutdown mode. VCCP Power Reset Under Voltage Logout Thermal Shutdown − + Oscillator Over Voltage Protection Soft Start FB + − + LX − + VOUT = 0.8 V to 0.9 VIN L1 Control Logic R1 C2 R2 GND Figure 2. Detail Block Diagram http://onsemi.com 4 NCP1595, NCP1595A EXTERNAL COMPONENT REFERENCE DATA Device VOUT Inductor (L1) CIN (C1) COUT (C2) R1 R2 NCP1595/ NCP1595A 3.3 V CDC5D23 3R3 (1 A) CDRH6D38 3R3 (1.5 A) Inductor Model 3.3 mH 22 mF 22 mF x 2 22 mF 22 mF x 2 31 k 10 k NCP1595/ NCP1595A 2.5 V CDC5D23 3R3 (1 A) CDRH6D38 3R3 (1.5 A) 3.3 mH 22 mF 22 mF x 2 22 mF 22 mF x 2 21 k 10 k NCP1595/ NCP1595A 1.5 V CDC5D23 3R3 (1 A) CDRH6D38 3R3 (1.5 A) 3.3 mH 22 mF 22 mF x 2 22 mF 22 mF x 2 8k 10 k NCP1595/ NCP1595A 1.2 V CDC5D23 3R3 (1 A) CDRH6D38 3R3 (1.5 A) 3.3 mH 22 mF 22 mF x 2 22 mF 22 mF x 2 5k 10 k http://onsemi.com 5 NCP1595, NCP1595A TYPICAL OPERATING CHARACTERISTICS 0.815 FB INPUT THRESHOLD VFB/V LOW SIDE SWITCH ON RESISTANCE/W 0.30 0.25 0.20 0.15 0.10 0.05 0.00 −40 0 25 0.800 0.795 0.790 AMBIENT TEMPERATURE, (TA/°C) Figure 4. Feedback Input Threshold vs. Temperature 85 3.0 1.1 1.0 0.9 0.8 0.7 0 25 AMBIENT TEMPERATURE, (TA/°C) 85 2.8 2.5 2.3 2.0 1.8 1.5 −40 1200 1100 1000 900 800 700 600 0 0 25 AMBIENT TEMPERATURE, (TA/°C) 85 Figure 6. Main P−FET Current Limit vs. Temperature 25 85 SHUTDOWN QUIESCENT CURRENT, ICC_SD/mA Figure 5. Switching Frequency vs. Temperature QUIESCENT CURRENT INTO VCC, ICC/mA 25 Figure 3. Switch ON Resistance vs. Temperature 1.2 −40 0 LOW SIDE AMBIENT TEMPERATURE, (TA/°C) MAIN P−FET CURRENT LIMIT, ILIM/V SWITCH FREQUENCY, FOSC/MHZ 0.805 0.785 −40 85 1.3 −40 0.810 6 5 4 3 2 1 0 −40 AMBIENT TEMPERATURE, (TA/°C) 0 25 AMBIENT TEMPERATURE, (TA/°C) Figure 7. Quiescent Current Into VCC vs. Temperature Figure 8. Shutdown Quiescent Current vs. Temperature http://onsemi.com 6 85 100 1.5 VOUT = 3.3 V L = 3.3 mH CIN = 22 mF COUT = 22 mF 1.0 0.5 OUTPUT EFFICIENCY, % OUTPUT VOLTAGE CHANGE, DVOUT/% NCP1595, NCP1595A VIN = 4.0 V 0.0 VIN = 5.0 V −0.5 −1.0 −1.5 10 100 1000 VIN = 5.0 V 80 70 60 50 30 20 10 10000 100 1000 10000 Figure 10. Efficiency vs. Output Current 100 1.5 VOUT = 1.8 V L = 3.3 mH CIN = 22 mF COUT = 22 mF 1.0 0.5 OUTPUT EFFICIENCY, % OUTPUT VOLTAGE CHANGE, DVOUT/% VOUT = 3.3 V L = 3.3 mH CIN = 22 mF COUT = 22 mF 40 Figure 9. Output Voltage Change vs. Output Current VIN = 4.0 V 0.0 VIN = 5.0 V −0.5 −1.0 −1.5 10 100 1000 VIN = 4.0 V 90 VIN = 5.0 V 80 70 60 50 VOUT = 1.8 V L = 3.3 mH CIN = 22 mF COUT = 22 mF 40 30 20 10 10000 Figure 11. Output Voltage Change vs. Output Current 100 1000 10000 Figure 12. Efficiency vs. Output Current 1.5 100 VOUT = 1.2 V L = 3.3 mH CIN = 22 mF COUT = 22 mF 1.0 0.5 OUTPUT EFFICIENCY, % OUTPUT VOLTAGE CHANGE, DVOUT/% VIN = 4.0 V 90 VIN = 4.0 V 0.0 VIN = 5.0 V −0.5 −1.0 −1.5 10 100 1000 10000 90 VIN = 4.0 V 80 70 VIN = 5.0 V 60 50 VOUT = 1.2 V L = 3.3 mH CIN = 22 mF COUT = 22 mF 40 30 20 10 Figure 14. Output Voltage Change vs. Output Current 100 1000 Figure 13. Efficiency vs. Output Current http://onsemi.com 7 10000 NCP1595, NCP1595A (VIN = 5 V, ILOAD = 100 mA, L = 3.3 mH, COUT = 20 mF) Upper Trace: LX Pin Switching Waveform, 2 V / div. Middle Trace: Output Ripple Voltage, 20 mV / div. Lower Trace: Inductor Current, 1 A / div. (VIN = 5 V, ILOAD = 700 mA, L = 3.3 mH, COUT = 20 mF) Upper Trace: LX Pin Switching Waveform, 2 V / div. Middle Trace: Output Ripple Voltage, 20 mV / div. Lower Trace: Inductor Current, 1 A / div. Figure 15. DCM Switching Waveform for VOUT = 3.3 V Figure 16. CCM Switching Waveform for VOUT = 3.3 V (VIN = 5 V, ILOAD = 100 mA, L = 3.3 mH, COUT = 20 mF) Upper Trace: LX Pin Switching Waveform, 2 V / div. Middle Trace: Output Ripple Voltage, 20 mV / div. Lower Trace: Inductor Current, 1 A / div. (VIN = 5 V, ILOAD = 700 mA, L = 3.3 mH, COUT = 20 mF) Upper Trace: LX Pin Switching Waveform, 2 V / div. Middle Trace: Output Ripple Voltage, 20 mV / div. Lower Trace: Inductor Current, 1 A / div. Figure 17. DCM Switching Waveform for VOUT = 1.2 V Figure 18. CCM Switching Waveform for VOUT = 1.2 V (VIN = 5 V, ILOAD = 10 mA, L = 3.3 mH, COUT = 20 mF x 2) Upper Trace: Input Voltage, 2 V/ div. Middle Trace: Output Voltage, 1 V/ div. Lower Trace: Input Current, 1 A / div. (VIN = 5 V, ILOAD = 10 mA, L = 3.3 mH, COUT = 20 mF x 2) Upper Trace: Input Voltage, 2 V/ div. Middle Trace: Output Voltage, 1 V / div. Lower Trace: Input Current, 1 A / div. Figure 19. Soft−Start Waveforms for VOUT = 3.3 V Figure 20. Soft−Start Waveforms for VOUT = 1.2 V http://onsemi.com 8 NCP1595, NCP1595A (VIN = 5 V, L = 3.3 mH, COUT = 20 mF x 2) Upper Trace: Output Dynamic Voltage, 100 mV / div. Lower Trace: Output Current, 500 mA / div. (VIN = 5 V, L = 3.3 mH, COUT = 20 mF x 2) Upper Trace: Output Dynamic Voltage, 100 mV / div. Lower Trace: Output Current, 500 mA / div. Figure 21. Load Regulation for VOUT = 3.3 V Figure 22. Load Regulation for VOUT = 3.3 V (VIN = 5 V, L = 3.3 H, COUT = 20 mF x 2) Upper Trace: Output Dynamic Voltage, 100 mV / div. Lower Trace: Output Current, 500 mA / div. (VIN = 5 V, L = 3.3 H, COUT = 20 mF x 2) Upper Trace: Output Dynamic Voltage, 100 mV / div. Lower Trace: Output Current, 500 mA / div. Figure 23. Load Regulation for VOUT = 1.2 V Figure 24. Load Regulation for VOUT = 1.2 V http://onsemi.com 9 NCP1595, NCP1595A DETAILED OPERATING DESCRIPTION Introduction Soft−Start and Current Limit NCP1595 operates as a current mode buck converter with switching frequency at 1.0 MHz. The P−Channel main switch is set by the positive edge of the clock cycle going into the PWM latch. The main switch is reset by the PWM latch in the following three cases: 1. PWM comparator output trips as the peak inductor current signal reaches a threshold level established by the error amplifier. 2. The inductor current has reached the current limit. 3. Overvoltage at output occurs. After a minimum dead time, the N−Channel synchronized switch will turn on and the inductor current will ramp down. If the inductor current ramps down to zero before the initiation of next clock cycle, the regulator runs at discontinuous conduction mode (DCM). Otherwise the regulator is at continuous conduction mode (CCM). The N−Channel switch will turn off when the clock cycle starts. The duty cycle is given by the ratio of output voltage to input voltage. The duty cycle is allowed to go to 100% to increase transient load response when going from light load to heavy load. A soft start circuit is internally implemented to reduce the in−rush current during startup. This helps to reduce the output voltage overshoot. The current limit is set to allow peak switch current in excess of 2 A. The intended output current of the system is 1.5 A. The ripple current is calculated to be approximately 350 mA with a 3.3 mH inductor. Therefore, the peak current at 1.5 A output will be approximately 1.7 A. A 2 A set point will allow for transient currents during load step. The current limit circuit is implemented as a cycle−by−cycle current limit. Each on−cycle is treated as a separate situation. Current limiting is implemented by monitoring the P−Channel switch current buildup during conduction with a current limit comparator. The output of the current limit comparator resets the PWM latch, immediately terminating the current cycle. Over−Voltage Protection Overvoltage occurs when the feedback voltage exceeds 5% of its regulated voltage. In this case, the P−Channel main switch will be reset and the N−Channel synchronized switch is turn on to sink current from the output voltage which helps to drop its feedback voltage back to the regulated voltage. Error Amplifier and Slope Compensation A fully internal compensated error amplifier is provided inside NCP1595. No external circuitry is needed to stabilize the device. The error amplifier provides an error signal to the PWM comparator by comparing the feedback voltage (800 mV) with internal voltage reference of 1.2 V. Current mode converter can exhibit instability at duty cycles over 50%. A slope compensation circuit is provided inside NCP1595 to overcome the potential instability. Slope compensation consists of a ramp signal generated by the synchronization block and adding this to the inductor current signal. The summed signal is then applied to the PWM comparator. Thermal Shutdown Internal Thermal Shutdown circuitry is provided to protect the integrated circuit in the event when maximum junction temperature is exceeded. When activated, typically at 160°C, the shutdown signal will disable the P−Channel and N−Channel switch. The thermal shutdown circuit is designed with 30°C of hysteresis. This means that the switching will not start until the die temperature drops by this amount. This feature is provided to prevent catastrophic failures from accidental device overheating. It is not intended as a substitute for proper heat sinking. NCP1595 is contained in the thermally enhanced DFN package. http://onsemi.com 10 NCP1595, NCP1595A APPLICATION INFORMATION Output Voltage Selection ripple current, input voltage, output voltage, output current and operation frequency, the inductor value is given by: The output voltage is programmed through an external resistor divider connect from VOUT to FB then to GND. For internal compensation and noise immunity, the resistor from FB to GND should be in 10 k to 20 k ranges. The relationship between the output voltage and feedback resistor is given by: V OUT + V FB ǒ1 ) R1Ǔ D IL + ǒ1 * VV Ǔ OUT F SW (eq. 2) IN DIL : peak to peak inductor ripple current L: inductor value FSW: switching frequency After selected a suitable value of the inductor, it should be check out the inductor saturation current. The saturation current of the inductor should be higher than the maximum load plus the ripple current. (eq. 1) R2 V OUT L VOUT: Output voltage VFB: Feedback Voltage R1: Feedback resistor from VOUT to FB. R2: Feedback resistor from FB to GND. D IL(MAX) + D IOUT(MAX) ) Input Capacitor selection DIL(MAX) DIOUT(MAX) In the PWM buck converter, the input current is pulsating current with switching noise. Therefore, a bypass input capacitor must choose for reduce the peak current drawn from the power supply. For NCP1595, low ESR ceramic capacitor of 10 mF should be used for most of cases. Also, the input capacitor should be placed as close as possible to the VCCA pin for effective bypass the supply noise. D IL (eq. 3) 2 : Maximum inductor current : Maximum output current Output Capacitor selection Output capacitor value is based on the target output ripple voltage. For NCP1595, the output capacitor is required a ceramic capacitors with low ESR value. Assume buck converter duty cycle is 50%. The output ripple voltage in PWM mode is given by: Inductor selection The inductor parameters are including three items, which are DC resistance, inductor value and saturation current. Inductor DC resistance will effect the convector overall efficiency, low DC resistor value can provide a higher efficiency. Thus, inductor value are depend on the inductor D VOUT [ D IL ǒ4 1 FSW C OUT Ǔ ) ESR (eq. 4) In general, value of ceramic capacitor using 20 mF should be a good choice. ORDERING INFORMATION Package Shipping † NCP1595MNR2G DFN−6 (Pb−Free) 3000 / Tape & Reel NCP1595AMNR2G DFN−6 (Pb−Free) 3000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 11 NCP1595, NCP1595A PACKAGE DIMENSIONS DFN6 3*3 MM, 0.95 PITCH CASE 506AH−01 ISSUE O A D B ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ PIN 1 REFERENCE 2X NOTES: 1. DIMENSIONS AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMESNION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. E DIM A A1 A3 b D D2 E E2 e K L 0.15 C 2X 0.15 C TOP VIEW 0.10 C A 6X 0.08 C SEATING PLANE (A3) SIDE VIEW C A1 SOLDERING FOOTPRINT* 0.450 0.0177 D2 6X L e 1 MILLIMETERS MIN NOM MAX 0.80 0.90 1.00 0.00 0.03 0.05 0.20 REF 0.35 0.40 0.45 3.00 BSC 2.40 2.50 2.60 3.00 BSC 1.50 1.60 1.70 0.95 BSC 0.21 −−− −−− 0.30 0.40 0.50 4X 0.950 0.0374 3 E2 6X K 1.700 0.0685 3.31 0.130 6 4 6X b (NOTE 3) 0.10 C A B BOTTOM VIEW 0.05 C 0.63 0.025 2.60 0.1023 SCALE 10:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 http://onsemi.com 12 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NCP1595/D