SRAM MT5C2565 Austin Semiconductor, Inc. 64K x 4 SRAM SRAM MEMORY ARRAY PIN ASSIGNMENT (Top View) • SMD 5962-89524 • MIL-STD-883 28-Pin DIP (C) (300 MIL) FEATURES 3 2 1 28 27 • • • • OPTIONS MARKING • Timing 15ns access 20ns access 25ns access 35ns access 45ns access 55ns access 70ns access -15 -20 -25 -35 -45 -55* -70* • Package(s) Ceramic DIP (300 mil) Ceramic LCC C EC NC A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 CE\ OE\ Vss 28 27 26 25 24 23 22 21 20 19 18 17 16 15 Vcc A15 A14 A13 A12 A11 A10 NC NC DQ4 DQ3 DQ2 DQ1 WE\ 26 25 24 23 22 21 20 19 18 A2 4 A3 5 A4 6 A5 7 A6 8 A7 9 A8 1 0 A9 1 1 CE\ 1 2 A15 A14 A13 A12 A11 A10 DQ4 DQ3 DQ2 13 14 15 16 17 GENERAL DESCRIPTION The Austin Semiconductor SRAM family employs high-speed, low-power CMOS designs using a four-transistor memory cell. Austin Semiconductor SRAMs are fabricated using double-layer metal, double-layer polysilicon technology. For flexibility in high-speed memory applications, Austin Semiconductor offers chip enable (CE\) and output enable (OE\) capability. These enhancements can place the outputs in High-Z for additional flexibility in system design. Writing to these devices is accomplished when write enable (WE\) and CE\ inputs are both LOW. Reading is accomplished when WE\ remains HIGH and CE\ and OE\ go LOW. The device offers a reduced power standby mode when disabled. This allows system designs to achieve low standby power requirements. The “L” version provides an approximate 50 percent reduction in CMOS standby current (ISBC2) over the standard version. All devices operate from a single +5V power supply and all inputs and outputs are fully TTL compatible. No.108 No. 204 • Operating Temperature Ranges Industrial (-40oC to +85oC) IT Military (-55oC to +125oC) XT L *Electrical characteristics identical to those provided for the 45ns access devices. For more products and information please visit our web site at www.austinsemiconductor.com MT5C2565 Rev. 1.5 1/01 1 2 3 4 5 6 7 8 9 10 11 12 13 14 DQ1 WE\ NC Vss OE\ High Speed: 12, 15, 20, 25, 35, and 45ns Battery Backup: 2V data retention Low power standby High-performance, low-power, CMOS double-metal process • Single +5V (+10%) Power Supply • Easy memory expansion with CE\ • All inputs and outputs are TTL compatible • 2V data retention/low power 28-Pin LCC (EC) A1 A0 NC Vcc NC AVAILABLE AS MILITARY SPECIFICATIONS Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 1 SRAM MT5C2565 Austin Semiconductor, Inc. FUNCTIONAL BLOCK DIAGRAM VCC GND A12 A11 A11 A10 A8 A3 A3 A2 A2 A1 A1 A0 A0 I/O CONTROL A8 DQ4 ROW DECODER A10 A12 262,144-BIT MEMORY ARRAY DQ1 (LSB) CE\ (LCC) COLUMN DECODER (LSB) A7 A6 A5 A4 A9 A15 A14 A13 OE\ WE\ POWER DOWN TRUTH TABLE MODE STANDBY READ READ WRITE MT5C2565 Rev. 1.5 1/01 OE\ X L H X CE\ H L L L WE\ X H H L DQ HIGH-Z Q HIGH-Z D POWER STANDBY ACTIVE ACTIVE ACTIVE Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 2 SRAM MT5C2565 Austin Semiconductor, Inc. ABSOLUTE MAXIMUM RATINGS* *Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Voltage on Any Pin Relative to Vss..................................-0.5V to +7V Voltage on Vcc Supply Relative to Vss.............................-0.5V to +7V Storage Temperature......................................................-65oC to +150oC Power Dissipation..............................................................................1W Short Circuit Output Current.........................................................50mA Lead Temperature (soldering 10 seconds)....................................+260oC Junction Temperature..................................................................+175oC ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS (-55oC < TC < 125oC; VCC = 5V +10%) DESCRIPTION Input High (Logic 1) Voltage CONDITIONS SYM MAX UNITS NOTES VIH MIN 2.2 VCC+0.5 V 1 VIL -0.5 0.8 V 1, 2 0V<VIN<VCC ILI -10 10 µA Output(s) disabled 0V<VOUT<VCC ILO -10 10 µA Output High Voltage IOH=-4.0mA VOH 2.4 Output Low Voltage IOL=8.0mA VOL Input Low (Logic 0) Voltage Input Leakage Current Output Leakage Current PARAMETER Power Supply Current: Operating Power Supply Current: Standby 0.4 V 1 V 1 SYM -15 -20 MAX -25 -35 -45 Icc 160 150 120 120 120 mA CE\ = 2.4V, OE\ = 2.4V, VCC = MAX, f = 0 Hz ISBT2 40 40 20 20 20 mA CE\ > VCC -0.3V; VCC = MAX VIL < VSS +0.2V VIH > VCC -0.2V; f = 0 Hz ISBC2 20 20 10 10 10 mA ISBC2 10 10 10 10 10 mA CONDITIONS CE\ < VIL; VCC = MAX f = MAX = 1/tRC (MIN) Output Open "L" Version Only UNITS NOTES 3 CAPACITANCE DESCRIPTION Input Capacitance Output Capacitance MT5C2565 Rev. 1.5 1/01 CONDITIONS o TA = 25 C, f = 1MHz VCC = 5V SYM MAX UNITS NOTES CI 11 pF 4 CO 11 pF 4 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 3 SRAM MT5C2565 Austin Semiconductor, Inc. ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS (Note 5) (-55oC < TC < 125oC; VCC = 5V +10%) DESCRIPTION READ CYCLE READ cycle time Address access time Chip Enable access time Output hold from address change Chip Enable to output in Low-Z Chip disable to output in High-Z Output Enable access time Output Enable to output in Low-Z Output disable to output in High-Z WRITE CYCLE WRITE cycle time Chip Enable to end of write Address valid to end of write Address setup time Address hold from end of write WRITE pulse width Data setup time Data hold time Write disable to output in Low-Z Write Enable to output in High-Z MT5C2565 Rev. 1.5 1/01 -15 -20 -25 -35 -45 SYMBOL MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX UNITS NOTES tRC tAA tACE tOH tLZCE tHZCE tAOE tLZOE tHZOE 15 tWC tCW tAW tAS tAH tWP tDS tDH 15 10 10 0 0 10 9 0 0 tLZWE tHZWE 20 15 15 3 3 25 20 20 3 3 8 8 0 3 3 0 3 3 0 3 3 0 20 30 0 20 35 25 25 0 0 25 20 0 0 15 45 45 15 25 15 25 20 20 0 0 20 15 0 0 10 45 35 35 15 15 9 20 15 15 0 0 15 10 0 0 7 25 25 10 10 9 35 7 6, 7 4 4 ns ns ns ns ns ns ns ns ns ns 7 6, 7 20 45 30 30 0 0 30 20 0 0 15 ns ns ns ns ns ns ns ns 20 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 4 SRAM MT5C2565 Austin Semiconductor, Inc. +5V AC TEST CONDITIONS +5V 480 Input pulse levels ...................................... Vss to 3.0V Input rise and fall times ......................................... 5ns Input timing reference levels ................................ 1.5V Output reference levels ....................................... 1.5V Output load ................................. See Figures 1 and 2 Q 30pF 255 480 Q 5 pF 255 Fig. 1 Output Load Equivalent Fig. 2 Output Load Equivalent 7. At any given temperature and voltage condition, tHZCE is less than tLZCE, and tHZWE is less than tLZWE and tHZOE is less than tLZOE. 8. WE\ is HIGH for READ cycle. 9. Device is continuously selected. Chip enable is held in its active state. 10. Address valid prior to, or coincident with, latest occurring chip enable. 11. tRC = Read Cycle Time. 12. Chip enable (CE\) and write enable (WE\) can initiate and terminate a WRITE cycle. NOTES 1. 2. 3. All voltages referenced to VSS (GND). -3V for pulse width < 20ns ICC is dependent on output loading and cycle rates. The specified value applies with the outputs unloaded, and f = 1 Hz. t RC (MIN) 4. This parameter is guaranteed but not tested. 5. Test conditions as specified with the output loading as shown in Fig. 1 unless otherwise noted. 6. tHZCE, tHZOE and tHZWE are specified with CL = 5pF as in Fig. 2. Transition is measured ±500mV typical from steady state voltage, allowing for actual tester RC time constant. DATA RETENTION ELECTRICAL CHARACTERISTICS (L Version Only) DESCRIPTION CONDITIONS SYM MIN MAX UNITS VCC for Retention Data CE\ > (VCC - 0.2V) VDR 2 --- V Data Retention Current VIN > (VCC - 0.2V) or < 0.2V 1 mA * --- ns 4 ns 4, 11 VCC = 2V Chip Deselect to Data Retention Time Operation Recovery Time ICCDR tCDR 0 tR tRC NOTES *for -25 and slower only LOW Vcc DATA RETENTION WAVEFORM DATA RETENTION MODE VCC CE\ 4.5V VIH VIL 1234 12345678 123 12345678 123 1234 12345678 123 1234 12345678 123 1234 VDR > 2V t CDR 4.5V tR V DR 12345678 1234 12 12345678 1234 12 12345678 1234 12 12345678 1234 12 123 123 123 123 DON’T CARE 1234 1234 1234 1234UNDEFINED MT5C2565 Rev. 1.5 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 5 SRAM MT5C2565 Austin Semiconductor, Inc. READ CYCLE NO. 1 8, 9 t RC VALID ADDR t AA t OH Q 1234 1234 12 1234 1234 12 1234 1234 12 PREVIOUS DATA VALID DATA VALID READ CYCLE NO. 2 7, 8, 10 tRC CE\ t AOE tHZOE tLZOE OE\ tACE tLZCE DQ HIGH-Z 1234 1234 12 1234 1234 12 1234 1234 12 t PU tHZCE DATA VALID t PD Icc MT5C2565 Rev. 1.5 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 6 SRAM MT5C2565 Austin Semiconductor, Inc. WRITE CYCLE NO. 1 12 (Chip Enabled Controlled) t WC tWC ADDRESS tAW tAW ttAS AS t AH tAH tCW tCW CE\ t WP tWP1 123456789012345678901 1 1 WE\ 123456789012345678901 1123456789012345678901234567890121234567890 1123456789012345678901234567890121234567890 12 t ttDS DS D DH tDH DATA VAILD Q HIGH Z WRITE CYCLE NO. 2 7, 12 (Write Enabled Controlled) tWC tWC ADDRESS tAW tAW 12345678901234567 12 12 12345678901234567 121 CE\ 12345678901234567 ttAS AS WE\ ttAH AH tCW tCW 12345678901234567890123 1 1212345678901234567890123 112345678901234567890123 t WP tWP1 123456789 123456789 123456789 tDS t 1234567890123456 1 1 1234567890123456 11234 1234 1 HZWE 1 1 Q 1234567890123456 11234 1234 1 1234567890123456 D DATA VALID HIGH-Z t DH tDH 121234561 tLZWE1234 1234 121234561 1234 12 1 1234 12123456 1234561 123 123 DON’T CARE 123 1234 1234 1234 1234 UNDEFINED NOTE: Output enable (OE\) is inactive (HIGH). MT5C2565 Rev. 1.5 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 7 SRAM MT5C2565 Austin Semiconductor, Inc. MECHANICAL DEFINITIONS* ASI Case #108 (Package Designator C) SMD #5962-89524, Case Outline X D S2 A Q L Pin 1 S1 e b b2 E NOTE 0o to 15o SYMBOL A b b2 c D E eA e L Q S1 S2 c eA SMD SPECIFICATIONS MIN MAX --0.225 0.014 0.026 0.045 0.065 0.008 0.018 --1.485 0.240 0.310 0.300 BSC 0.100 BSC 0.125 0.200 0.015 0.070 0.005 --0.005 --- NOTE: These dimensions are per the SMD. ASI's package dimensional limits may differ, but they will be within the SMD limits. *All measurements are in inches. MT5C2565 Rev. 1.5 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 8 SRAM MT5C2565 Austin Semiconductor, Inc. MECHANICAL DEFINITIONS* ASI Case #204 (Package Designator EC) SMD# 5962-88681, Case Outline X D1 B2 D2 L2 E3 e E E1 E2 h x 45o D L hx45 o B1 D3 A A1 SYMBOL A A1 B1 B2 D D1 D2 D3 E E1 E2 E3 e h L L2 SMD SPECIFICATIONS MIN MAX 0.060 0.120 0.050 0.088 0.022 0.028 0.072 REF 0.342 0.358 0.200 BSC 0.100 BSC --0.358 0.540 0.560 0.400 BSC 0.200 BSC --0.558 0.050 BSC 0.040 REF 0.045 0.055 0.075 0.095 NOTE: These dimensions are per the SMD. ASI's package dimensional limits may differ, but they will be within the SMD limits. *All measurements are in inches. MT5C2565 Rev. 1.5 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 9 SRAM MT5C2565 Austin Semiconductor, Inc. ORDERING INFORMATION EXAMPLE: MT5C2565EC-45/XT EXAMPLE: MT5C2565C-20L/IT Device Number Device Number Package Speed Options** Process Type ns Package Speed Options** Process Type ns MT5C2565 C -15 L /* MT5C2565 EC -15 L /* MT5C2565 C -20 L /* MT5C2565 EC -20 L /* MT5C2565 C -25 L /* MT5C2565 EC -25 L /* MT5C2565 C -35 L /* MT5C2565 EC -35 L /* MT5C2565 C -45 L /* MT5C2565 EC -45 L /* MT5C2565 C -55 L /* MT5C2565 EC -55 L /* MT5C2565 C -70 L /* MT5C2565 EC -70 L /* *AVAILABLE PROCESSES IT = Industrial Temperature Range XT = Extended Temperature Range 883C = Full Military Processing -40oC to +85oC -55oC to +125oC -55oC to +125oC ** OPTIONS L = 2V Data Retention/Low Power MT5C2565 Rev. 1.5 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 10 SRAM MT5C2565 Austin Semiconductor, Inc. ASI TO DSCC PART NUMBER CROSS REFERENCE* ASI Package Designator C ASI Part # MT5C2565C-15/883C MT5C2565C-20/883C MT5C2565C-25/883C MT5C2565C-35/883C MT5C2565C-45/883C MT5C2565C-55/883C MT5C2565C-70/883C ASI Package Designator EC SMD Part # 5962-8952407XX 5962-8952406XX 5962-8952405XX 5962-8952404XX 5962-8952403XX 5962-8952402XX 5962-8952401XX ASI Part # MT5C2565EC-15/883C MT5C2565EC-20/883C MT5C2565EC-25/883C MT5C2565EC-35/883C MT5C2565EC-45/883C MT5C2565EC-55/883C MT5C2565EC-70/883C SMD Part # 5962-8952407YX 5962-8952406YX 5962-8952405YX 5962-8952404YX 5962-8952403YX 5962-8952402YX 5962-8952401YX * ASI part number is for reference only. Orders received referencing the SMD part number will be processed per the SMD. MT5C2565 Rev. 1.5 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 11