Da t as heet AS1335 1 . 5 A , 1 . 5 M H z , S y n c h r o n o u s D C / D C St e p - D o w n C o n v e r t e r 1 General Description 2 Key Features The AS1335 is a high-efficiency, constant-frequency synchronous buck converter available in a fixed or an adjustable output voltage version. The wide input voltage range (2.6V to 5.25V), the high output current (up to 1.5A) and minimal external component requirements make the AS1335 perfect for any single Li-Ion batterypowered application. Typical supply current with no load is 400µA and decreases to ≤1µA in shutdown mode. The highly efficient duty cycle (100%) provides low dropout operation, prolonging battery life in portable systems. The device also offers a power-ok signal with a 215ms delay, which can be reseted or delayed further via the RSI pin. An internal synchronous switch increases efficiency and eliminates the need for an external Schottky diode. The internally fixed switching frequency (1.5MHz) allows for the use of small surface mount external components. The AS1335 is available in a 10-pin TDFN 3x3mm package. ! High Efficiency: Up to 96% ! Output Current: 1.5A ! Input Voltage Range: 2.6V to 5.25V ! Output Voltage Range: 0.6V to VIN ! Constant Frequency Operation: 1.5MHz ! No Schottky Diode Required ! Power OK with 215ms delay ! Low Dropout Operation: 100% Duty Cycle ! Low Quiescent Supply Current: 400µA ! Shutdown Mode Supply Current: ≤1µA ! Current Mode Operation for Excellent Line/Load Transient Response ! Thermal Protection ! 10-pin TDFN 3x3mm Package 3 Applications The device is ideal for mobile communication devices, laptops and PDAs, ultra-low-power systems, threshold detectors/discriminators, telemetry and remote systems, medical instruments, or any other space-limited application with low power-consumption requirements. Figure 1. AS1335 - Typical Application Diagram 2.2µH VIN 2.6V to 5.25V CIN 22µF VIN SW NC 1.0V, 1.5A PGND AS1335 EN www.austriamicrosystems.com VOUT COUT 22µF GND POK FB GND RSI Revision 1.02 1 - 18 AS1335 Datasheet - P i n o u t 4 Pinout Pin Assignments Figure 2. Pin Assignments (Top View) VIN 1 10 SW NC 2 9 PGND EN 3 AS1335 8 GND POK 4 7 FB 11 GND 5 6 RSI Pin Descriptions Table 1. Pin Descriptions Pin Number Pin Name 1 VIN Positive Supply Voltage. This pin must be closely decoupled to PGND with a ≥ 22µF ceramic capacitor. 2 NC Not Connected. EN Enable Input. Driving this pin above 1.4V enables the device. Driving this pin below 0.3V puts the device in shutdown mode. In shutdown mode all functions are disabled, drawing ≤1µA supply current. Note: This pin should not be left floating. 4 POK Power-OK Output. Open-drain output with 215ms delay. Connect a 100kΩ pull-up resistor to VOUT or pin VIN for logic levels. Leave this pin unconnected if the Power-OK feature is not used. LOW Signal: Out of regulation HIGH signal: Within Regulation (after 215ms delay) 5 GND Analog Ground. 3 6 RSI Description Reset Input for POK. This input resets the 215ms timer of the POK signal. As long as RSI is low the POK signal will work as described above. A high input to RSI will reset the 215ms POK timer and delay the signal as long as RSI stays high. A RSI low-to-high transition restarts the 215ms counter as long as the output voltage is within regulation. Note: Do not leave this pin floating. 7 FB 8 GND 9 PGND 10 SW Feedback Pin. Feedback input to the gm error amplifier. Connect a resistor divider tap to this pin. The output can be adjusted from 0.6V to 5.25V by VOUT = 0.6V[1+(R1/R2)]. If the fixed output voltage version is used, connect this pin to VOUT. 11 Analog Ground. GND and PGND should only have one point connection. Power-Ground. Connect all power grounds to this pin. Switch Node Connection to Inductor. This pin connects to the drains of the internal main and synchronous power MOSFET switches. Exposed Pad. The exposed pad must be connected to PGND. Ensure a good connection to the PCB to achieve optimal thermal performance. www.austriamicrosystems.com Revision 1.02 2 - 18 AS1335 Datasheet - A b s o l u t e M a x i m u m R a t i n g s 5 Absolute Maximum Ratings Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in Electrical Characteristics on page 4 is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 2. Absolute Maximum Ratings Parameter Min Max Units VIN to GND -0.3 6 V SW to GND -0.3 VIN + 0.3 V EN, FB to GND -0.3 VIN V P-Channel Switch Source Current (DC) 1.5 A N-Channel Switch Source Current (DC) 1.5 A Peak SW Sink and Source Current 3 A Thermal Resistance ΘJA 36.7 ºC/W on PCB 100 mA @85°C, JEDEC 78 kV HBM MIL-Std. 883E 3015.7 methods Latch-Up -100 Electrostatic Discharge 2 Operating Temperature Range -40 +85 ºC Storage Temperature Range -65 +150 ºC 125 ºC Junction Temperature Package Body Temperature www.austriamicrosystems.com +260 ºC Revision 1.02 Comments The reflow peak soldering temperature (body temperature) specified is in accordance with IPC/JEDEC J-STD-020D “Moisture/Reflow Sensitivity Classification for Non-Hermetic Solid State Surface Mount Devices”. The lead finish for Pb-free leaded packages is matte tin (100% Sn). 3 - 18 AS1335 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s 6 Electrical Characteristics VIN = EN = 3.6V, VOUT = VIN-0.5V, TAMB = -40°C to +85°C, typ. values @ TAMB = +25ºC (unless otherwise specified). Table 3. Electrical Characteristics Symbol Parameter VIN Input Voltage Range IQ Quiescent Supply 1 Current IOUT Output Current RMS ISHDN Conditions Shutdown Current Min Typ 2.6 Normal Operation; VFB = 0.5V or VOUT = 90% of regulated output voltage, ILOAD = 0 A 300 Max Units 5.25 V 400 µA 1.5 Shutdown Mode; VEN = 0V, VIN = 4.2V A 0.1 1 µA 1.0 1.025 V VIN 0.5V V Regulation VOUT Regulated Output Voltage VFB Regulated Feedback 2,3 Voltage IFB Feedback Current ΔVLNR ΔVLOADREG fixed VOUT 0.975 adjustable VOUT 0.6 TAMB = +25°C 0.5880 0.6 0.6120 TAMB = -40°C to +85°C 0.5850 0.6 0.6150 3 Reference Voltage Line Regulation Output Voltage Load Regulation -30 +30 V nA VIN = 2.6V to 5.25V 100 mV ILOAD = 0A to 1.5A 100 mA DC-DC Switches IPK Peak Inductor Current VIN = 3V, VFB = 0.5V or VOUT = 90% of regulated output voltage, Duty Cycle < 35% 2.4 A RPFET P-Channel FET RDS(ON) ILSW = 100mA 0.4 Ω RNFET N-Channel FET RDS(ON) ILSW = -100mA 0.35 Ω ILSW SW Leakage VEN = 0V, VSW = 0V or 5V, VIN = 5V -1 Input High 1.4 0.01 +1 µA Enable VIH VIL IEN Logic Input Threshold EN Leakage Current Input Low 0.4 V VIN = 3.6V, VEN = 0V to 3.6V -1 0.01 +1 µA Rising 89.5 92 94.5 Falling 85 88 91 % VOUT Rising 108.2 110.7 113.2 Falling 104 107 110 % VOUT 150 215 275 ms 0.3 V Power-OK Output Power Good Low Voltage Threshold VPOK Power Good High Voltage Threshold tDELAY POK Delay Time VOL POK Output Voltage Low www.austriamicrosystems.com ISINK = 1mA, VFB = 0.7V Revision 1.02 4 - 18 AS1335 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s Table 3. Electrical Characteristics Symbol Parameter Conditions IPOK POK Output Leakage Current VPOK = VIN = 3.6V Oscillator Frequency VFB = 0.6V or VOUT = 100% of regulated output voltage Min Typ Max Units 0.01 1 µA 1.5 1.8 MHz Oscillator fOSC 1.2 Thermal Shutdown Thermal Shutdown 150 °C Thermal Shutdown Hysteresis 25 °C 1. The dynamic supply current is higher due to the gate charge delivered at the switching frequency. The Quiescent Current is measured while the DC-DC Converter is not switching. 2. The device is tested in a proprietary test mode where VFB is connected to the output of the DC/DC converter. 3. Only valid for the adjustable version; www.austriamicrosystems.com Revision 1.02 5 - 18 AS1335 Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s 7 Typical Operating Characteristics VOUT = 1.0V, IOUT = 100mA, TAMB = +25°C (unless otherwise specified). Figure 4. Efficiency vs. Output Current, VOUT = 1.5V 100 100 90 90 80 80 70 70 Efficiency (%) Efficiency (%) Figure 3. Efficiency vs. Output Current, VOUT = 1.0V 60 50 40 Vin = 5.5V 30 20 60 50 40 Vin = 4.0V 30 Vin = 3.5V 20 Vi n = 5.5V Vi n = 5.0V Vi n = 4.0V Vin = 3.0V 10 Vi n = 3.6V 10 Vin = 2.5V 0 Vi n = 2.6V 0 10 100 1000 10000 10 Output Current (mA) 1000 10000 Figure 6. Efficiency vs. Output Current, VOUT = 3.0V 100 100 90 90 80 80 70 70 Efficiency (%) Efficiency (%) Figure 5. Efficiency vs. Output Current, VOUT = 2.5V 60 50 40 30 100 Output Current (mA) Vi n = 5.0V 10 Vi n = 3.6V 50 40 30 Vi n = 5.5V 20 60 20 Vi n = 4.0V Vi n = 5.5V Vi n = 5.0V 10 Vi n = 4.0V Vi n = 3.6V 0 0 10 100 1000 10000 10 Output Current (mA) 100 1000 10000 Output Current (mA) Figure 7. Efficiency vs. Output Current, VOUT = 3.5V Figure 8. Efficiency vs. Input Voltage, VOUT = 1.0V 100 100 90 90 70 Efficiency (%) Efficiency (%) 80 60 50 40 30 80 70 60 Iout = 100mA Iout = 300mA Vi n = 5.5V 20 Vi n = 5.0V Iout = 700mA 50 Iout = 1000mA Vi n = 4.5V 10 Vi n = 4.0V Iout = 1500mA 0 40 10 100 1000 10000 2.5 Output Current (mA) www.austriamicrosystems.com 3.5 4.5 5.5 Input Voltage (V) Revision 1.02 6 - 18 AS1335 Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s Figure 10. Load Regulation, VOUT = 1.0V 100 1.05 90 1.03 Output Voltage (V) Efficiency (%) Figure 9. Efficiency vs. Input Voltage, VOUT = 3.5V 80 70 Iout = 400mA 60 1.01 0.99 Vin = 5.5V Vin = 5.0V Vin = 4.5V 0.97 Iout = 600mA Iout = 800mA Vin = 3.5V Vin = 2.5V Iout = 950mA 50 0.95 2.6 3 3.4 3.8 4.2 4.6 5 10 100 Input Voltage (V) Figure 11. Load Regulation, VOUT = 1.5V 10000 Figure 12. Line Regulation, VOUT vs. VIN; 1.02 1.7 1.65 1 1.6 Output Voltage (V) Output Voltage (V) 1000 Output Current (mA) 1.55 1.5 1.45 1.4 Vi n = 5.5V 1.35 0.98 0.96 0.94 Iout Iout Iout Iout Iout 0.92 Vi n = 5.0V = 100mA = 300mA = 700mA = 1000mA = 1500mA Vi n = 3.6V 0.9 1.3 1000 2.5 10000 3.5 4 4.5 5 5.5 200mA/Div IOUT VOUT Figure 14. Load Step 40mA to 1A; VIN = 4V 100mV/Div VOUT IOUT Figure 13. Load Step 40mA to 500mA; VIN = 4V 100µs/Div 100µs/Div www.austriamicrosystems.com 3 Input Voltage (V) Output Current (mA) 500mA/Div 100 50mV/Div 10 Revision 1.02 7 - 18 AS1335 Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s 500mA/Div EN IIN 200µs/Div 1V/Div 1V/Div VOUT 20mA/Div EN IIN VOUT 2V/Div Figure 16. Startup Response; VIN = 3.4V 2V/Div Figure 15. Shutdown Response; VIN = 3.4V 20µs/Div VOUT 100mV/Div VIN 500mV/Div Figure 17. Line Transient Response; VIN = 3.5V to 4.5V, IOUT = 500mA 100µs/Div www.austriamicrosystems.com Revision 1.02 8 - 18 AS1335 Datasheet - D e t a i l e d D e s c r i p t i o n 8 Detailed Description The AS1335 is a high-efficiency buck converter that uses a constant-frequency current-mode architecture. The device contains two internal MOSFET switches and is available with a user-adjustable output voltage. Figure 18. AS1335 - Block Diagram Ramp Compensator – OSCN + ICOMP OSC VIN Frequency Shift FB 0.6V + Error Amp – AS1335 Main – OVDET 0.6V + ΔVOVL + Digital Logic AntiShoot Through – EN 0.6V Reference 0.6V ΔVOVL Shutdown SW + + IRCMP Power-OK Compare Logic – GND RSI POK Main Control Loop During normal operation, the internal top power MOSFET is turned on each cycle when the oscillator sets the RS latch. This switch is turned off when the current comparator (ICOMP) resets the RS latch. The peak inductor current (IPK) at which ICOMP resets the RS latch, is controlled by the error amplifier. When ILOAD increases, VFB decreases slightly relative to the internal 0.6V reference, causing the error amplifier’s output voltage to increase until the average inductor current matches the new load current. When the top MOSFET is off, the bottom MOSFET is turned on until the inductor current starts to reverse as indicated by the current reversal comparator (IRCMP), or the next clock cycle begins. The over-voltage detection comparator (OVDET) guards against transient overshoots >7.8% by turning the main switch off and keeping it off until the transient is removed. www.austriamicrosystems.com Revision 1.02 9 - 18 AS1335 Datasheet - D e t a i l e d D e s c r i p t i o n Short-Circuit Protection This frequency reduction ensures that the inductor current has more time to decay, thus preventing runaway conditions. fOSC will progressively increase to 1.5MHz when VOUT > 0V or VFB > 0V. Dropout Operation The AS1335 is working with a low input-to-output voltage difference by operating at 100% duty cycle. In this state, the PMOS is always on. This is particularly useful in battery-powered applications with a 3.3V output. The AS1335 allows the output to follow the input battery voltage as it drops below the regulation voltage. The quiescent current in this state rises minimally to only 400µA (max), which aids in extending battery life. This dropout (100% duty-cycle) operation achieves long battery life by taking full advantage of the entire battery range. The input voltage requires maintaining regulation and is a function of the output voltage and the load. The difference between the minimum input voltage and the output voltage is called the dropout voltage. The dropout voltage is therefore a function of the on-resistance of the internal PMOS (RDS(ON)PMOS) and the inductor resistance (DCR) and this is proportional to the load current. Note: At low VIN values, the RDS(ON) of the P-channel switch increases (see Electrical Characteristics on page 4). Therefore, power dissipation should be taken in consideration. Shutdown Connecting EN to GND or logic low places the AS1335 in shutdown mode and reduces the supply current to 0.1µA. In shutdown the control circuitry and the internal NMOS and PMOS turn off and SW becomes high impedance disconnecting the input from the output. The output capacitance and load current determine the voltage decay rate. For normal operation connect EN to VIN or logic high. Note: Pin EN should not be left floating. Power-OK Functionality The AS1335’s power-ok circuitry offers a 215ms delayed power-ok signal. As long as the output voltage is outside of the power-ok regulation window the POK pin drives an open-drain low signal. As soon as the output voltage is within the regulation window, the internal open-drain MOSFET is turned off and the POK pin can be externally pulled to high. The output of the power-ok signal is delayed by 215ms. RSI Signal With the RSI signal the internal power-ok timer can be reseted or delayed. As long as the input to RSI is high the POK signal remains low, regardless of the output voltage condition. Thermal Shutdown Due to its high-efficiency design, the AS1335 will not dissipate much heat in most applications. However, in applications where the AS1335 is running at high ambient temperature, uses a low supply voltage, and runs with high duty cycles (such as in dropout) the heat dissipated may exceed the maximum junction temperature of the device. As soon as the junction temperature reaches approximately 150ºC the AS1335 goes in thermal shutdown. In this mode the internal PMOS & NMOS switch are turned off. The device will power up again, as soon as the temperature falls below +125°C again. www.austriamicrosystems.com Revision 1.02 10 - 18 AS1335 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 9 Application Information The AS1335 is perfect for mobile communications equipment, LED matrix displays, bar-graph displays, instrumentpanel meters, dot matrix displays, set-top boxes, white goods, professional audio equipment, medical equipment, industrial controllers to name a few applications. Figure 19. AS1335 - Step-Down Converter, Single Li-Ion to 1.0V / 1.5A fixed Output VIN 2.7V to 4.2V VOUT 2.2µH VIN CIN 1.0V, 1.5A COUT SW 100µF 22µF NC 100kΩ EN PGND AS1335-100 GND POK FB GND RSI Figure 20. AS1335 - Step-Down Converter, Single Li-Ion to 3.3V adjustable Output VIN 3.35V to 5.25V VOUT 2.2µH CIN VIN SW NC PGND 3.3V COUT 100µF 22µF 100kΩ EN AS1335-AD 470kΩ GND POK FB GND RSI 100kΩ www.austriamicrosystems.com Revision 1.02 11 - 18 AS1335 Datasheet - A p p l i c a t i o n I n f o r m a t i o n External Component Selection Inductor Selection For most applications the value of the external inductor should be in the range of 2.2µH to 4.7µH as the inductor value has a direct effect on the ripple current. The selected inductor must be rated for its DC resistance and saturation current. The inductor ripple current (ΔIL) decreases with higher inductance and increases with higher VIN or VOUT. In Equation (EQ 1) the maximum inductor current in PWM mode under static load conditions is calculated. The saturation current of the inductor should be rated higher than the maximum inductor current as calculated with Equation (EQ 2). This is recommended because the inductor current will rise above the calculated value during heavy load transients. V OUT 1 – ------------V IN ΔI L = V OUT × ----------------------L×f (EQ 1) ΔI L I LMAX = I OUTMAX + -------2 (EQ 2) f = Switching Frequency (1.5 MHz typical) L = Inductor Value ILmax = Maximum Inductor current ΔIL = Peak to Peak inductor ripple current The recommended starting point for setting ripple current is ΔIL = 600mA (40% of 1.5A). The DC current rating of the inductor should be at least equal to the maximum load current plus half the ripple current to prevent core saturation. Thus, a 1.8A rated inductor should be sufficient for most applications (1.5A + 300mA). Note: For highest efficiency, a low DC-resistance inductor is recommended. Accepting larger values of ripple current allows the use of low inductance values, but results in higher output voltage ripple, greater core losses, and lower output current capability. The total losses of the coil have a strong impact on the efficiency of the DC/DC conversion and consist of both the losses in the DC resistance and the following frequency-dependent components: 1. The losses in the core material (magnetic hysteresis loss, especially at high switching frequencies). 2. Additional losses in the conductor from the skin effect (current displacement at high frequencies). 3. Magnetic field losses of the neighboring windings (proximity effect). 4. Radiation losses. Output Capacitor Selection The advanced fast-response voltage mode control scheme of the AS1335 allows the use of tiny ceramic capacitors. Because of their lowest output voltage ripple low ESR ceramic capacitors are recommended. X7R or X5R dielectric output capacitor are recommended. At high load currents, the device operates in PWM mode and the RMS ripple current is calculated as: I RMSC OUT V OUT 1 – ------------V IN 1 = V OUT × ----------------------- × ---------------L×f 2× 3 (EQ 3) While operating in PWM mode the overall output voltage ripple is the sum of the voltage spike caused by the output capacitor ESR plus the voltage ripple caused by charging and discharging the output capacitor: www.austriamicrosystems.com Revision 1.02 12 - 18 AS1335 Datasheet - A p p l i c a t i o n I n f o r m a t i o n ΔV OUT V OUT 1 – ------------V IN 1 = V OUT × ----------------------- × ⎛⎝ ------------------------------- + ESR⎞⎠ L×f 8 × C OUT × f (EQ 4) Higher value, low cost ceramic capacitors are available in very small case sizes, and their high ripple current, high voltage rating, and low ESR make them ideal for switching regulator applications. Because the AS1335 control loop is not dependant on the output capacitor ESR for stable operation, ceramic capacitors can be used to achieve very low output ripple and accommodate small circuit size. At light loads, the converter operates in powersave mode and the output voltage ripple is in direct relation to the output capacitor and inductor value used. Larger output capacitor and inductor values minimize the voltage ripple in powersave mode and tighten DC output accuracy in powersave mode. Input Capacitor Selection In continuous mode, the source current of the PMOS is a square wave of the duty cycle VOUT/VIN. To prevent large voltage transients while minimizing the interference with other circuits caused by high input voltage spikes, a low ESR input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given as: V OUT × ( V IN – V OUT ) I RMS = I MAX × ---------------------------------------------------------V IN (EQ 5) where the maximum average output current IMAX equals the peak current minus half the peak-to-peak ripple current, IMAX = ILIM - ΔIL/2 This formula has a maximum at VIN = 2VOUT where IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant deviations only provide negligible affects. The input capacitor can be increased without any limit for better input voltage filtering. Take care when using small ceramic input capacitors. When a small ceramic capacitor is used at the input, and the power is being supplied through long wires, such as from a wall adapter, a load step at the output, or VIN step on the input, can induce ringing at the VIN pin. This ringing can then couple to the output and be mistaken as loop instability, or could even damage the part by exceeding the maximum ratings. Ceramic Input and Output Capacitors When choosing ceramic capacitors for CIN and COUT, the X5R or X7R dielectric formulations are recommended. These dielectrics have the best temperature and voltage characteristics for a given value and size. Y5V and Z5U dielectric capacitors, aside from their wide variation in capacitance over temperature, become resistive at high frequencies and therefore should not be used. Table 4. Recommended External Components Name Part Number Value Rating Type COUT T520B107M006ATE040 100µF 6.3V Tantal CIN, COUT GRM21BR60J226ME39 22µF 6.3V X5R MOS6020-222ML 2.2µH 3.26A 35mΩ MOS6020-472ML 4.7µH 1.82A 50mΩ L Size Manufacturer Kemet B (3.5x2.8x1.9mm) www.kemet.com Murata 0805 www.murata.com Coilcraft 6.8x6.0x2.4mm www.coilcraft.com 6.8x6.0x2.4mm Because ceramic capacitors lose a lot of their initial capacitance at their maximum rated voltage, it is recommended that either a higher input capacity or a capacitance with a higher rated voltage is used. www.austriamicrosystems.com Revision 1.02 13 - 18 AS1335 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Efficiency The efficiency of a switching regulator is equivalent to: Efficiency = (POUT/PIN)x100% (EQ 6) For optimum design, an analysis of the AS1335 is needed to determine efficiency limitations and to determine design changes for improved efficiency. Efficiency can be expressed as: Efficiency = 100% – (L1 + L2 + L3 + ...) (EQ 7) Where: L1, L2, L3, etc. are the individual losses as a percentage of input power. Althought all dissipative elements in the circuit produce losses, those four main sources should be considered for efficiency calculation: Input Voltage Quiescent Current Losses The VIN current is the DC supply current given in the electrical characteristics which excludes MOSFET driver and control currents. VIN current results in a small (<0.1%) loss that increases with VIN, even at no load. The VIN quiescent current loss dominates the efficiency loss at very low load currents. I²R Losses Most of the efficiency loss at medium to high load currents are attributed to I²R loss, and are calculated from the resistances of the internal switches (RSW) and the external inductor (RL). In continuous mode, the average output current flowing through inductor L is split between the internal switches. Therefore, the series resistance looking into the SW pin is a function of both NMOS & PMOS RDS(ON) as well as the the duty cycle (DC) and can be calculated as follows: RSW = (RDS(ON)PMOS)(DC) + (RDS(ON)NMOS)(1 – DC) (EQ 8) The RDS(ON) for both MOSFETs can be obtained from the Electrical Characteristics on page 4. Thus, to obtain I²R losses calculate as follows: I²R losses = IOUT²(RSW + RL) (EQ 9) Switching Losses The switching current is the sum of the control currents and the MOSFET driver. The MOSFET driver current results from switching the gate capacitance of the power MOSFETs. If a MOSFET gate is switched from low to high to low again, a packet of charge dQ moves from VIN to ground. The resulting dQ/dt is a current out of VIN that is typically much larger than the DC bias current. In continuous mode: IGC = f(QPMOS + QNMOS) (EQ 10) Where: QPMOS and QNMOS are the gate charges of the internal MOSFET switches. The losses of the gate charges are proportional to VIN and thus their effects will be more visible at higher supply voltages. Other Losses Basic losses in the design of a system should also be considered. Internal battery resistances and copper trace can account for additional efficiency degradations in battery operated systems. By making sure that CIN has adequate charge storage and very low ESR at the given switching frequency, the internal battery and fuse resistance losses can be minimized. CIN and COUT ESR dissipative losses and inductor core losses generally account for less than 2% total additional loss. www.austriamicrosystems.com Revision 1.02 14 - 18 AS1335 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Checking Transient Response The main loop response can be evaluated by examining the load transient response. Switching regulators normally take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equivalent to: VDROP = ΔILOAD x ESR (EQ 11) Where: ESR is the effective series resistance of COUT. ΔILOAD also begins to charge or discharge COUT, which generates a feedback error signal. The regulator loop then acts to return VOUT to its steady-state value. During this recovery time VOUT can be monitored for overshoot or ringing that would indicate a stability problem. Layout Considerations The AS1335 requires proper layout and design techniques for optimum performance. ! ! ! ! ! The power traces (GND, SW, and VIN) should be kept as short, direct, and wide as is practical. Pin FB should be connected directly to the Output Voltage. The positive plate of CIN should be connected as close to VIN as is practical since CIN provides the AC current to the internal power MOSFETs. Switching node SW should be kept far away from the sensitive FB node. The negative plates of CIN and COUT should be kept as close to each other as is practical. A starpoint to Ground is recommended. www.austriamicrosystems.com Revision 1.02 15 - 18 AS1335 Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s 10 Package Drawings and Markings The device is available in an 10-pin TDFN 3x3mm package. Figure 21. 10-pin TDFN 3x3mm Package D2 SEE DETAIL B A D D2/2 B aaa C 2x E E2 E2/2 L PIN 1 INDEX AREA (D/2 xE/2) K PIN 1 INDEX AREA (D/2 xE/2) N N-1 aaa C 2x e TOP VIEW e b (ND-1) X e ddd bbb C C A B BTM VIEW Terminal Tip DETAIL B A3 ccc C A C 0.08 C SIDE VIEW A1 SEATING PLANE Datum A or B ODD TERMINAL SIDE Symbol A A1 A3 L1 L2 aaa bbb ccc ddd eee ggg Min 0.70 0.00 Typ 0.75 0.02 0.20 REF 0.03 Max 0.80 0.05 0.15 0.13 0.15 0.10 0.10 0.05 0.08 0.10 Notes 1, 2 1, 2 1, 2 1, 2 1, 2 1, 2 1, 2 1, 2 1, 2 1, 2 1, 2 Symbol D BSC E BSC D2 E2 L θ K b e N ND Min 2.20 1.40 0.30 0º 0.20 0.18 Typ 3.00 3.00 0.40 0.25 0.50 10 5 Max 2.70 1.75 0.50 14º 0.30 Notes 1, 2 1, 2 1, 2 1, 2 1, 2 1, 2 1, 2 1, 2, 5 1, 2 1, 2, 5 Notes: 1. Figure 21 is shown for illustration only. 2. All dimensions are in millimeters; angles in degrees. 3. Dimensioning and tolerancing conform to ASME Y14.5 M-1994. 4. N is the total number of terminals. 5. The terminal #1 identifier and terminal numbering convention shall conform to JEDEC 95-1, SPP-012. Details of terminal #1 identifier are optional, but must be located within the zone indicated. The terminal #1 identifier may be either a mold or marked feature. 6. Dimension b applies to metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 7. ND refers to the maximum number of terminals on side D. 8. Unilateral coplanarity zone applies to the exposed heat sink slug as well as the terminals. www.austriamicrosystems.com Revision 1.02 16 - 18 AS1335 Datasheet - O r d e r i n g I n f o r m a t i o n 11 Ordering Information The device is available as the following standard versions. Table 5. Ordering Information Ordering Code Marking Description Delivery Form Package AS1335-BTDT-100 ASSI 1.5A, 1.5MHz, Synchronous DC/DC Step-Down Tape and Reel Converter, fixed VOUT = 1.0V 10-pin TDFN 3x3mm AS1335-BTDT-AD ASSC 1.5A, 1.5MHz, Synchronous DC/DC Step-Down Tape and Reel Converter, user-adjustable Output Voltage 10-pin TDFN 3x3mm Note: All products are RoHS compliant and Pb-free. Buy our products or get free samples online at ICdirect: http://www.austriamicrosystems.com/ICdirect For further information and requests, please contact us mailto:[email protected] or find your local distributor at http://www.austriamicrosystems.com/distributor www.austriamicrosystems.com Revision 1.02 17 - 18 AS1335 Datasheet Copyrights Copyright © 1997-2009, austriamicrosystems AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies. Disclaimer Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems AG rendering of technical or other services. Contact Information Headquarters austriamicrosystems AG Tobelbaderstrasse 30 A-8141 Unterpremstaetten, Austria Tel: +43 (0) 3136 500 0 Fax: +43 (0) 3136 525 01 For Sales Offices, Distributors and Representatives, please visit: http://www.austriamicrosystems.com/contact www.austriamicrosystems.com Revision 1.02 18 - 18