AD AD8013AR-14-REEL7 Single supply, low power, atriple video amplifier Datasheet

a
Single Supply, Low Power,
Triple Video Amplifier
AD8013
FEATURES
Three Video Amplifiers in One Package
Drives Large Capacitive Load
Excellent Video Specifications (RL = 150 V)
Gain Flatness 0.1 dB to 60 MHz
0.02% Differential Gain Error
0.06° Differential Phase Error
Low Power
Operates on Single +5 V to +13 V Power Supplies
4 mA/Amplifier Max Power Supply Current
High Speed
140 MHz Unity Gain Bandwidth (3 dB)
Fast Settling Time of 18 ns (0.1%)
1000 V/ms Slew Rate
High Speed Disable Function per Channel
Turn-Off Time 30 ns
Easy to Use
95 mA Short Circuit Current
Output Swing to Within 1 V of Rails
APPLICATIONS
LCD Displays
Video Line Driver
Broadcast and Professional Video
Computer Video Plug-In Boards
Consumer Video
RGB Amplifier in Component Systems
PRODUCT DESCRIPTION
The AD8013 is a low power, single supply, triple video
amplifier. Each of the three amplifiers has 30 mA of output
current, and is optimized for driving one back terminated video
load (150 Ω) each. Each amplifier is a current feedback amplifier and features gain flatness of 0.1 dB to 60 MHz while offering
G = +2
RL = 150Ω
0.2
PIN CONFIGURATION
14-Pin DIP & SOIC Package
DISABLE 1
1
14 OUT 2
DISABLE 2
2
13 –IN 2
DISABLE 3
3
12 +IN 2
AD8013
+VS
4
+IN 1
5
10 +IN 3
–IN 1
6
9
–IN 3
OUT 1
7
8
OUT 3
11 –VS
differential gain and phase error of 0.02% and 0.06°. This
makes the AD8013 ideal for broadcast and professional video
electronics.
The AD8013 offers low power of 4 mA per amplifier max and
runs on a single +5 V to +13 V power supply. The outputs of
each amplifier swing to within one volt of either supply rail to
easily accommodate video signals. The AD8013 is unique
among current feedback op amps by virtue of its large capacitive
load drive. Each op amp is capable of driving large capacitive
loads while still achieving rapid settling time. For instance it
can settle in 18 ns driving a resistive load, and achieves 40 ns
(0.1%) settling while driving 200 pF.
The outstanding bandwidth of 140 MHz along with 1000 V/µs
of slew rate make the AD8013 useful in many general purpose
high speed applications where a single +5 V or dual power
supplies up to ± 6.5 V are required. Furthermore the AD8013’s
high speed disable function can be used to power down the
amplifier or to put the output in a high impedance state. This
can then be used in video multiplexing applications. The
AD8013 is available in the industrial temperature range of
–40°C to +85°C.
NORMALIZED GAIN – dB
0.1
500mV
0
VS = ± 5V
–0.1
–0.2
500ns
100
9
0
VS = +5V
–0.3
–0.4
1
0
0%
–0.5
5V
1M
100M
10M
FREQUENCY – Hz
1G
Fine-Scale Gain Flatness vs. Frequency, G = +2, RL = 150 Ω
Channel Switching Characteristics for a 3:1 Mux
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
© Analog Devices, Inc., 1995
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
AD8013–SPECIFICATIONS (@ T = +258C, R
A
LOAD
= 150 V, unless otherwise noted)
Model
Conditions
VS
Min
No Peaking, G = +2
No Peaking, G = +2
No Peaking, G = +2
No Peaking, G = +2
2 V Step
6 V Step
0 V to +2 V
4.5 V Step, CLOAD = 200 pF
RLOAD > 1 kΩ, RFB = 4 kΩ
+5 V
±5 V
+5 V
±5 V
+5 V
±5 V
±5 V
±6 V
100
110
Input Voltage Noise
Input Current Noise
Differential Gain (RL = 150 Ω)
fC = 5 MHz, RL = 1 k
fC = 5 MHz, RL = 150 Ω
f = 10 kHz
f = 10 kHz (–IIN)
f = 3.58 MHz, G = +2
Differential Phase (RL = 150 Ω)
f = 3.58 MHz, G = +2
DYNAMIC PERFORMANCE
Bandwidth (3 dB)
Bandwidth (0.1 dB)
Slew Rate
Settling Time to 0.1%
NOISE/HARMONIC PERFORMANCE
Total Harmonic Distortion
DC PERFORMANCE
Input Offset Voltage
Offset Drift
Input Bias Current (–)
Input Bias Current (+)
Open-Loop Transresistance
MHz
MHz
MHz
MHz
V/µs
V/µs
ns
ns
±5 V
±5 V
+5 V, ± 5 V
+5 V, ± 5 V
+5 V1
±5 V
+5 V1
±5 V
–76
–66
3.5
12
0.05
0.02
0.06
0.06
dBc
dBc
nV/√Hz
pA/√Hz
%
%
Degrees
Degrees
TMIN to TMAX
+5 V, ± 5 V
TMIN to TMAX
+5 V, ± 5 V
+5 V, ± 5 V
+5 V
2
7
2
3
800
±5 V
600
650
550
800 k
TMIN to TMAX
±5 V
±5 V
±5 V
±5 V
+5 V
+Input
–Input
Input Capacitance
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
Input Offset Voltage
Input Offset Voltage
–Input Current
+Input Current
OUTPUT CHARACTERISTICS
Output Voltage Swing
RL = 1 kΩ
RL = 150 Ω
+5 V
±5 V
+5 V, ± 5 V
+5 V, ± 5 V
+5 V
±5 V
±5 V
±5 V
Short-Circuit Current
Capacitive Load Drive
G = +2, f = 5 MHz
f = 20 MHz
–2–
0.05
0.12
5
10
15
1.1 M
650
200
150
2
3.8
1.2
52
52
VOL–VEE
VCC–VOH
VOL–VEE
VCC–VOH
Output Current
MATCHING CHARACTERISTICS
Dynamic
Crosstalk
Gain Flatness Match
DC
Input Offset Voltage
–Input Bias Current
Units
125
140
50
60
400
1000
18
40
TMIN to TMAX
INPUT CHARACTERISTICS
Input Resistance
AD8013A
Typ
Max
25
56
56
0.2
5
0.8
0.8
1.1
1.1
30
30
95
1000
mV
µV/°C
µA
µA
kΩ
kΩ
Ω
kΩ
3.8
kΩ
Ω
pF
±V
+V
0.4
7
dB
dB
µA/V
µA/V
1.0
1.0
1.3
1.3
V
V
V
V
mA
mA
mA
pF
+5 V, ± 5 V
±5 V
70
0.1
dB
dB
+5 V, ± 5 V
+5 V, ± 5 V
0.3
1.0
mV
µA
REV. A
AD8013
Model
Conditions
POWER SUPPLY
Operating Range
VS
Single Supply
Dual Supply
Power Supply Rejection Ratio
Input Offset Voltage
–Input Current
+Input Current
DISABLE CHARACTERISTICS
Off Isolation
Off Output Impedance
Turn-On Time
Turn-Off Time
Switching Threshold
AD8013A
Typ
Max
+4.2
± 2.1
Quiescent Current/Amplifier
Quiescent Current/Amplifier
Min
+5 V
±5 V
± 6.5 V
+5 V
±5 V
Power Down
VS = ± 2.5 V to ± 5 V
+5 V, ± 5 V
+5 V, ± 5 V
70
+5 V, ± 5 V
+5 V, ± 5 V
f = 6 MHz
G = +1
–VS + xV
1.3
3.0
3.4
3.5
0.25
0.3
0.35
0.4
V
V
mA
mA
mA
mA
mA
76
0.03
0.07
0.2
1.0
dB
µA/V
µA/V
1.9
dB
pF
ns
ns
V
–70
12
50
30
1.6
+13
± 6.5
3.5
4.0
Units
NOTES
1
The test circuit for differential gain and phase measurements on a +5 V supply is ac coupled.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS 1
Maximum Power Dissipation
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 13.2 V Total
Internal Power Dissipation2
Plastic (N) . . . . . . . . . 1.6 Watts (Observe Derating Curves)
Small Outline (R) . . . . 1.0 Watts (Observe Derating Curves)
Input Voltage (Common Mode) . . Lower of ± VS or ± 12.25 V
Differential Input Voltage . . . . . . . . Output ± 6 V (Clamped)
Output Voltage Limit
Maximum . . . . . . . . . Lower of (+12 V from –VS) or (+VS)
Minimum . . . . . . . . . Higher of (–12.5 V from +VS) or (–VS)
Output Short Circuit Duration
. . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves
Storage Temperature Range
N and R Package . . . . . . . . . . . . . . . . . . . –65°C to +125°C
Operating Temperature Range
AD8013A . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . +300°C
The maximum power that can be safely dissipated by the AD8013
is limited by the associated rise in junction temperature. The
maximum safe junction temperature for the plastic encapsulated
parts is determined by the glass transition temperature of the
plastic, about 150°C. Exceeding this limit temporarily may
cause a shift in parametric performance due to a change in the
stresses exerted on the die by the package. Exceeding a junction
temperature of 175°C for an extended period can result in
device failure.
While the AD8013 is internally short circuit protected, this may
not be enough to guarantee that the maximum junction temperature is not exceeded under all conditions. To ensure proper
operation, it is important to observe the derating curves.
It must also be noted that in (noninverting) gain configurations
(with low values of gain resistor), a high level of input overdrive
can result in a large input error current, which may result in a
significant power dissipation in the input stage. This power
must be included when computing the junction temperature rise
due to total internal power.
NOTES
1
Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in
the operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2
Specification is for device in free air:
14-Pin Plastic DIP Package: θJA = 75°C/Watt
14-Pin SOIC Package: θJA = 120°C/Watt
ORDERING GUIDE
Model
Temperature
Range
Package
Description
Package
Options
AD8013AN
AD8013AR-14
AD8013AR-14-REEL
AD8013AR-14-REEL7
AD8013ACHIPS
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
14-Pin Plastic DIP
14-Pin Plastic SOIC
14-Pin Plastic SOIC
14-Pin Plastic SOIC
Die Form
N-14
R-14
R-14
R-14
MAXIMUM POWER DISSIPATION – Watts
2.5
TJ = +150°C
2.0
14-PIN DIP PACKAGE
1.5
14-PIN SOIC
1.0
0.5
–50 –40 –30 –20 –10 0 10 20 30 40 50 60 70
AMBIENT TEMPERATURE – °C
80 90
Maximum Power Dissipation vs. Ambient Temperature
REV. A
–3–
AD8013
METALIZATION PHOTO
Contact factory for latest dimensions.
Dimensions shown in inches and (mm).
+vs
+IN1
5
4
DISABLE 3
3
–IN1 6
2 DISABLE 2
OUT1 7
1 DISABLE 1
0.044 (1.13)
14 OUT 2
OUT3 8
–IN3 9
10
+IN3
12
+IN2
11
–VS
13
–IN2
0.071 (1.81)
6
12
5
10
OUTPUT VOLTAGE SWING – V p-p
COMMON-MODE VOLTAGE RANGE – ± Volts
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD8013 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
4
3
2
1
0
1
2
3
4
5
SUPPLY VOLTAGE – ± Volts
6
Figure 1. Input Common-Mode Voltage Range vs.
Supply Voltage
ESD SENSITIVE DEVICE
NO LOAD
8
RL = 150Ω
6
4
2
0
7
WARNING!
1
2
3
4
5
SUPPLY VOLTAGE – ± Volts
6
7
Figure 2. Output Voltage Swing vs. Supply Voltage
–4–
REV. A
AD8013
3
VS = ±5V
8
2
INPUT BIAS CURRENT – µA
OUTPUT VOLTAGE SWING – V p-p
10
6
4
VS = +5V
2
1
0
–IB
–1
–2
+IB
0
10
1k
100
LOAD RESISTANCE – Ω
–3
–60
10k
Figure 3. Output Voltage Swing vs. Load Resistance
–20
0
20
40
60
80
100
JUNCTION TEMPERATURE – °C
120
140
Figure 6. Input Bias Current vs. Junction Temperature
2
12
INPUT OFFSET VOLTAGE – mV
11
SUPPLY CURRENT – mA
–40
VS = ± 5V
10
9
VS = +5V
8
1
0
–1
VS = +5V
–2
VS = ±5V
–3
7
6
–60
–40
–20
0
20
40
60
80
100
JUNCTION TEMPERATURE – °C
120
–4
–60
140
Figure 4. Total Supply Current vs. Junction Temperature
–40 –20
0
20
40
60
80
100
JUNCTION TEMPERATURE – °C
120
140
Figure 7. Input Offset Voltage vs. Junction
Temperature
140
11
SHORT CIRCUIT CURRENT – mA
VS = ± 5V
SUPPLY CURRENT – mA
TA = +25°C
10
9
8
7
1
2
3
4
5
SUPPLY VOLTAGE – ± Volts
6
SOURCE
120
SINK
100
90
80
–60
7
Figure 5. Supply Current vs. Supply Voltage
REV. A
130
–40
–20
0
20
40
60
80
100
JUNCTION TEMPERATURE – °C
120
140
Figure 8. Short Circuit Current vs. Junction
Temperature
–5–
AD8013
70
G = +2
R
R
COMMON-MODE REJECTION – dB
CLOSED-LOOP OUTPUT RESISTANCE – Ω
1k
100
10
VS = ±5V
1
0.1
0.01
100k
10M
FREQUENCY – Hz
1M
100M
VCM
60
R
50
40
30
20
10
100k
1G
Figure 9. Closed-Loop Output Resistance vs.
Frequency
R
1M
10M
FREQUENCY – Hz
Figure 12. Common-Mode Rejection vs. Frequency
100k
80
VS = ±5V
POWER SUPPLY REJECTION – dB
70
OUTPUT RESISTANCE – Ω
1G
100M
10k
1k
100
60
50
+PSR
40
30
–PSR
20
10
100M
10M
FREQUENCY – Hz
0
100k
1G
Figure 10. Output Resistance vs. Frequency, Disabled
State
10M
FREQUENCY – Hz
100M
140
0
TRANSIMPEDANCE – dB
100
NONINVERTING I
10
INVERTING I
10
–45
–90
120
CURRENT NOISE pA/ √ Hz
VOLTAGE NOISE nV/ √ Hz
VS = ±5V
RL = 1k
100
1G
Figure 13. Power Supply Rejection Ratio vs. Frequency
1k
1k
1M
–135
PHASE – Degrees
10
1M
–180
100
80
60
VNOISE
1
100
1
1k
10k
FREQUENCY – Hz
100k
40
10k
1M
Figure 11. Input Current and Voltage Noise vs.
Frequency
100k
1M
10M
FREQUENCY – Hz
100M
1G
Figure 14. Open-Loop Transimpedance vs. Frequency
(Relative to 1 Ω)
–6–
REV. A
–30
G = +2
VO = 2V p-p
VS = ±5V
–50
–60
+1
–70
0
2nd
RL = 150Ω
–80
–90
3rd
RL = 1kΩ
–100
2nd
RL = 1kΩ
–110
3rd
RL = 150Ω
–120
1k
10k
VS = +5V
0
–90
–180
–270
GAIN
–1
VS = ±5V
–2
–3
VS = +5V
–4
100k
1M
FREQUENCY – Hz
10M
–6
1M
100M
100M
10M
FREQUENCY – Hz
1G
Figure 18. Closed-Loop Gain and Phase vs. Frequency,
G = +1, RL = 150 Ω
1800
2000
1400
1800
G = +10
G = +10
1600
SLEW RATE – V/µs
VS = ±5V
RL = 500Ω
1600
SLEW RATE – V/µs
VS = ±5V
–5
Figure 15. Harmonic Distortion vs. Frequency
1200
G = –1
1000
G = +2
800
600
G = +1
1400
G = –1
1200
G = +2
1000
800
G = +1
600
400
400
200
200
1
2
3
4
5
6
OUTPUT STEP SIZE – V p-p
7
1.5
8
2V
500mV
20ns
VOUT
3.5
4.5
5.5
SUPPLY VOLTAGE – ±Volts
6.5
7.5
20ns
100
100
VIN
2.5
Figure 19. Maximum Slew Rate vs. Supply Voltage
Figure 16. Slew Rate vs. Output Step Size
90
VIN
10
VOUT
90
10
0%
0%
500mV
2V
Figure 20. Small Signal Pulse Response, Gain = +1,
(RF = 2 kΩ, RL = 150 Ω, VS = ± 5 V)
Figure 17. Large Signal Pulse Response, Gain = +1,
(RF = 2 kΩ, RL = 150 Ω, VS = ± 5 V)
REV. A
G = +1
RL = 150Ω
PHASE
CLOSED-LOOP GAIN
(NORMALIZED) – dB
HARMONIC DISTORTION – dBc
–40
PHASE SHIFT – Degrees
AD8013
–7–
AD8013
50mV
2V
20ns
100
VOUT
100
90
VIN
10
VOUT
90
10
0%
0%
2V
500mV
VS = ±5V
VS = +5V
CLOSED-LOOP GAIN
(NORMALIZED) – dB
+1
0
–90
–180
0
–270
GAIN
–1
–2
VS = +5V
+1
VS = +5V
–3
G = –1
RL = 150Ω
PHASE
CLOSED-LOOP GAIN
(NORMALIZED) – dB
G = +10
RL = 150Ω
PHASE
Figure 24. Large Signal Pulse Response, Gain = –1,
(RF = 698 Ω, RL = 150 Ω, VS = ± 5 V)
PHASE SHIFT – Degrees
Figure 21. Large Signal Pulse Response, Gain = +10,
RF = 301 Ω, RL = 150 Ω, VS = ± 5 V)
VS = ±5V
–4
–5
VS = ±5V
180
90
0
–90
0
GAIN
–1
–2
PHASE SHIFT – Degrees
VIN
20ns
VS = ±5V
–3
VS = +5V
–4
–5
–6
1M
10M
100M
FREQUENCY – Hz
–6
1M
1G
Figure 22. Closed-Loop Gain and Phase vs. Frequency,
G = +10, RL = 150 Ω
50mV
10M
100M
FREQUENCY – Hz
Figure 25. Closed-Loop Gain and Phase vs. Frequency,
G = –1, RL = 150 Ω
500mV
20ns
100
VIN
1G
20ns
100
90
VIN
VOUT 10
VOUT
0%
90
10
0%
500mV
500mV
Figure 26. Small Signal Pulse Response, Gain = –1,
(RF = 698 Ω, RL = 150 Ω, VS = ± 5 V)
Figure 23. Small Signal Pulse Response, Gain = +10,
(RF = 301 Ω, RL = 150 Ω, VS = ± 5 V)
–8–
REV. A
AD8013
VS = ±5V
VS = +5V
CLOSED-LOOP GAIN
(NORMALIZED) – dB
+1
0
180
90
0
–90
GAIN
–1
PHASE SHIFT – Degrees
G = –10
RL = 150Ω
PHASE
To estimate the –3 dB bandwidth for closed-loop gains of 2 or
greater, for feedback resistors not listed in the following table,
the following single pole model for the AD8013 may be used:
G
ACL . 1 + SC (R + Gn rin )
T
F
where:
CT = transcapacitance > 1 pF
RF = feedback resistor
G = ideal closed loop gain

RF 
Gn = 1 + R  = noise gain

G
rin = inverting input resistance > 150 Ω
ACL = closed loop gain
–2
–3
VS = +5V
VS = ±5V
–4
–5
–6
1M
100M
10M
FREQUENCY – Hz
The –3 dB bandwidth is determined from this model as:
1
f3 . 2 π C (R + Gn rin )
T
F
1G
Figure 27. Closed-Loop Gain and Phase vs. Frequency,
G = –10, RL = 150 Ω
This model will predict –3 dB bandwidth to within about 10%
to 15% of the correct value when the load is 150 Ω and VS =
± 5 V. For lower supply voltages there will be a slight decrease in
bandwidth. The model is not accurate enough to predict either
the phase behavior or the frequency response peaking of the
AD8013.
General
The AD8013 is a wide bandwidth, triple video amplifier that
offers a high level of performance on less than 4.0 mA per
amplifier of quiescent supply current. The AD8013 uses a
proprietary enhancement of a conventional current feedback
architecture, and achieves bandwidth in excess of 200 MHz with
low differential gain and phase errors, making it an extremely
efficient video amplifier.
It should be noted that the bandwidth is affected by attenuation
due to the finite input resistance. Also, the open-loop output
resistance of about 12 Ω reduces the bandwidth somewhat when
driving load resistors less than about 250 Ω. (Bandwidths will
be about 10% greater for load resistances above a few hundred
ohms.)
The AD8013’s wide phase margin coupled with a high output
short circuit current make it an excellent choice when driving
any capacitive load. High open-loop gain and low inverting
input bias current enable it to be used with large values of
feedback resistor with very low closed-loop gain errors.
It is designed to offer outstanding functionality and performance
at closed-loop inverting or noninverting gains of one or greater.
Table I. –3 dB Bandwidth vs. Closed-Loop Gain and Feedback
Resistor, RL = 150 Ω (SOIC)
VS – Volts
±5
Choice of Feedback & Gain Resistors
Because it is a current feedback amplifier, the closed-loop bandwidth of the AD8013 may be customized using different values
of the feedback resistor. Table I shows typical bandwidths at
different supply voltages for some useful closed-loop gains when
driving a load of 150 Ω.
+5
The choice of feedback resistor is not critical unless it is
important to maintain the widest, flattest frequency response.
The resistors recommended in the table are those (chip
resistors) that will result in the widest 0.1 dB bandwidth without
peaking. In applications requiring the best control of bandwidth,
1% resistors are adequate. Package parasitics vary between the
14-pin plastic DIP and the 14-pin plastic SOIC, and may result
in a slight difference in the value of the feedback resistor used to
achieve the optimum dynamic performance. Resistor values and
widest bandwidth figures are shown in parenthesis for the SOIC
where they differ from those of the DIP. Wider bandwidths than
those in the table can be attained by reducing the magnitude of
the feedback resistor (at the expense of increased peaking),
while peaking can be reduced by increasing the magnitude of
the feedback resistor.
RF – Ohms
2000
845 (931)
301
698 (825)
499
2000
887 (931)
301
698 (825)
499
BW – MHz
230
150 (135)
80
140 (130)
85
180
120 (130)
75
130 (120)
80
Driving Capacitive Loads
When used in combination with the appropriate feedback
resistor, the AD8013 will drive any load capacitance without
oscillation. The general rule for current feedback amplifiers is
that the higher the load capacitance, the higher the feedback
resistor required for stable operation. Due to the high open-loop
transresistance and low inverting input current of the AD8013,
the use of a large feedback resistor does not result in large closedloop gain errors. Additionally, its high output short circuit current
makes possible rapid voltage slewing on large load capacitors.
For the best combination of wide bandwidth and clean pulse
response, a small output series resistor is also recommended.
Table II contains values of feedback and series resistors which
result in the best pulse responses. Figure 29 shows the AD8013
driving a 300 pF capacitor through a large voltage step with
virtually no overshoot. (In this case, the large and small signal
pulse responses are quite similar in appearance.)
Increasing the feedback resistor is especially useful when driving
large capacitive loads as it will increase the phase margin of the
closed-loop circuit. (Refer to the section on driving capacitive
loads for more information.)
REV. A
Gain
+1
+2
+10
–1
–10
+1
+2
+10
–1
–10
–9–
AD8013
RF
1.0µF
0.1µF
RG
4
AD8013
11
VIN
15Ω
1.0µF
RS
VO
CL
High Performance Video Line Driver
0.1µF
RT
–VS
Figure 28. Circuit for Driving a Capacitive Load
Table II. Recommended Feedback and Series Resistors vs.
Capacitive Load and Gain
CL – pF
RF – Ohms
RS – Ohms
G=2
G≥3
20
50
100
200
300
≥500
2k
2k
3k
4k
6k
7k
25
25
20
15
15
15
500mV
As noted in the warning under “Maximum Power Dissipation,”
a high level of input overdrive in a high noninverting gain circuit
can result in a large current flow in the input stage. Though this
current is internally limited to about 30 mA, its effect on the
total power dissipation may be significant.
At a gain of +2, the AD8013 makes an excellent driver for a
back terminated 75 Ω video line (Figures 31, 32, and 33). Low
differential gain and phase errors and wide 0.1 dB bandwidth
can be realized. The low gain and group delay matching errors
ensure excellent performance in RGB systems. Figures 34 and
35 show the worst case matching.
+VS
15
15
15
15
15
15
50ns
RF
RG
0.1µF
75Ω
75Ω CABLE
4
75Ω
CABLE
AD8013
VIN
11
VOUT
75Ω
0.1µF
75Ω
–VS
Figure 31. A Video Line Driver Operating at a Gain of +2
(RF = RG from Table I)
100
VIN
90
G = +2
RL = 150Ω
PHASE
0
VS = ±5V
0%
1V
Figure 29. Pulse Response Driving a Large Load Capacitor.
CL = 300 pF, G = +2, RF = 6k, RS = 15 Ω
–180
–270
GAIN
–1
VS = ±5V
–2
–3
VS = +5V
–4
–5
Overload Recovery
–6
1M
The three important overload conditions are: input commonmode voltage overdrive, output voltage overdrive, and input
current overdrive. When configured for a low closed-loop gain,
the amplifier will quickly recover from an input commonmode voltage overdrive; typically in under 25 ns. When configured for a higher gain, and overloaded at the output, the
recovery time will also be short. For example, in a gain of +10,
with 15% overdrive, the recovery time of the AD8013 is about
20 ns (see Figure 30). For higher overdrive, the response is
somewhat slower. For 6 dB overdrive, (in a gain of +10), the
recovery time is about 65 ns.
100M
10M
FREQUENCY – Hz
1G
Figure 32. Closed-Loop Gain & Phase vs. Frequency
for the Line Driver
G = +2
RL = 150Ω
+0.2
+0.1
NORMALIZED GAIN – dB
500mV
50ns
100
VIN
0
10
CLOSED-LOOP GAIN
(NORMALIZED) – dB
VOUT
–90
VS = +5V
+1
PHASE SHIFT – Degrees
+VS
90
0
–0.1
VS = ±5V
–0.2
–0.3
VS = +5V
–0.4
–0.5
1M
VOUT
10
10M
100M
FREQUENCY – Hz
1G
0%
5V
Figure 33. Fine-Scale Gain Flatness vs. Frequency,
G = +2, RL = 150 Ω
Figure 30. 15% Overload Recovery, G = +10 (RF = 300 Ω,
RL = 1 kΩ, VS = ± 5 V)
–10–
REV. A
AD8013
1.5
+5V
VI
8k
G = +2
RL = 150Ω
1.0
TO DISABLE PIN
GAIN MATCHING – dB
0.5
4k
10k
0
–5V
VS = +5V
V I HIGH => AMPLIFIER ENABLED
V I LOW => AMPLIFIER DISABLED
–0.5
VS = ±5V
–1.0
Figure 36. Level Shifting to Drive Disable Pins on Dual
Supplies
–1.5
–2.0
1M
100M
10M
FREQUENCY – Hz
1G
Figure 34. Closed-Loop Gain Matching vs. Frequency
G = +2
RL = 150Ω
GROUP DELAY – ns
6
VS = +5V
4
2
VS = ±5V
3:1 Video Multiplexer
Wiring the amplifier outputs together will form a 3:1 mux with
excellent switching behavior. Figure 37 shows a recommended
configuration which results in –0.1 dB bandwidth of 35 MHz
and OFF channel isolation of 60 dB at 10 MHz on ± 5 V
supplies. The time to switch between channels is about 50 ns.
Switching time is virtually unaffected by signal level.
10
8
The AD8013’s input stages include protection from the large
differential input voltages that may be applied when disabled.
Internal clamps limit this voltage to about ±3 V. The high input to
output isolation will be maintained for voltages below this limit.
DELAY
665Ω
1.0
0.5
G = +2
RL = 150Ω
+VS
VS = ±5V
0
6
–0.5
–1.0
100k
845Ω
DELAY
MATCHING
10M
1M
FREQUENCY – Hz
4
84Ω
VS = +5V
7
5
VIN1
1
75Ω
100M
DISABLE 1
845Ω
665Ω
Figure 35. Group Delay and Group Delay Matching
vs. Frequency, G = +2, RL = 150 Ω
13
84Ω
75Ω
CABLE
VOUT
14
Disable Mode Operation
12
VIN2
2
75Ω
75Ω
Pulling the voltage on any one of the Disable pins about 1.6 V
up from the negative supply will put the corresponding
amplifier into a disabled, powered down, state. In this
condition, the amplifier’s quiescent current drops to about
0.3 mA, its output becomes a high impedance, and there is
a high level of isolation from input to output. In the case of
the gain of two line driver for example, the impedance at the
output node will be about the same as for a 1.6 kΩ resistor
(the feedback plus gain resistors) in parallel with a 12 pF
capacitor and the input to output isolation will be about
66 dB at 5 MHz.
DISABLE 2
665Ω
845Ω
9
84Ω
8
11
10
VIN3
3
75Ω
–VS
DISABLE 3
Figure 37. A Fast Switching 3:1 Video Mux (Supply
Bypassing Not Shown)
Leaving the Disable pin disconnected (floating) will leave
the corresponding amplifier operational, in the enabled
state. The input impedance of the disable pin is about 40 kΩ
in parallel with a few picofarads. When driven to 0 V, with
the negative supply at –5 V, about 100 µA flows into the
disable pin.
500mV
200ns
100
90
When the disable pins are driven by complementary output
CMOS logic, on a single 5 V supply, the disable and enable
times are about 50 ns. When operated on dual supplies,
level shifting will be required from standard logic outputs to
the Disable pins. Figure 36 shows one possible method
which results in a negligible increase in switching time.
10
0%
5V
Figure 38. Channel Switching Characteristic for the
3:1 Mux
REV. A
–11–
AD8013
Configuring two amplifiers as unity gain followers and using the
third to set the gain results in a high performance 2:1 mux
(Figures 39 and 40). This circuit takes advantage of the very low
crosstalk between Channels 2 and 3 to achieve the OFF channel
isolation shown in Figure 40. This circuit can achieve
differential gain and phase of 0.03% and 0.07° respectively.
The AD8013 can be used to build a circuit for switching between
any two arbitrary gains while maintaining a constant input
impedance. The example of Figure 41 shows a circuit for switching
between a noninverting gain of 1 and an inverting gain of 1. The
total time for channel switching and output voltage settling is
about 80 ns.
698Ω
C2084–18–10/95
2:1 Video Multiplexer
698Ω
+5V
R1
2kΩ
13
2
12
VINA
14
R4
10Ω
10
3
9
1
6
8
R2
2kΩ
3
1k
10
R5
845Ω
15Ω
VOUT
DIS 3
3
9
1k
R6
845Ω
DISABLE
7
DIS 1
12
50Ω
VOUT
7
1
14
100Ω
VIN
5
4
5
13
R3
10Ω
2
DISABLE
VINB
6
2k
11
8
–5V
845Ω
845Ω
Figure 39. 2:1 Mux with High Isolation and Low
Differential Gain and Phase Errors
Figure 41. Circuit to Switch Between Gains of –1 and +1
2
1
500mV
GAIN
200ns
500mV
100
90
–1
–2
–3
–30
–4
–40
–5
–50
FEEDTHROUGH
–60
–6
–7
–70
–8
–80
1G
100M
10M
FREQUENCY – Hz
1M
FEEDTHROUGH – dB
CLOSED-LOOP GAIN – dB
0
10
0%
5V
Figure 42. Switching Characteristic for Circuit of Figure 41
Figure 40. 2:1 Mux ON Channel Gain and Mux OFF Channel
Feedthrough vs. Frequency
Gain Switching
OUTLINE DIMENSIONS
14-Lead SOIC (R-14)
14-Lead Plastic DIP (N-14)
0.3444 (8.75)
0.3367 (8.55)
0.795 (20.19)
0.725 (18.42)
14
8
1
7
PIN 1
0.280 (7.11)
0.240 (6.10)
0.060 (1.52)
0.015 (0.38)
0.210 (5.33)
MAX
0.130
(3.30)
MIN
0.160 (4.06)
0.115 (2.93)
0.022 (0.558)
0.014 (0.356)
PRINTED IN U.S.A.
Dimensions shown in inches and (mm).
0.100 0.070 (1.77)
(2.54) 0.045 (1.15)
BSC
SEATING
PLANE
0.1574 (4.00)
0.1497 (3.80)
0.325 (8.25)
0.300 (7.62) 0.195 (4.95)
0.115 (2.93)
14
8
1
7
PIN 1
0.0098 (0.25)
0.0040 (0.10)
0.015 (0.381)
0.008 (0.204)
SEATING
PLANE
–12–
0.0500
(1.27)
BSC
0.2440 (6.20)
0.2284 (5.80)
0.0688 (1.75)
0.0532 (1.35)
0.0192 (0.49)
0.0138 (0.35)
0.0098 (0.25)
0.0075 (0.19)
0.0196 (0.50)
x 45°
0.0099 (0.25)
8°
0°
0.0500 (1.27)
0.0160 (0.41)
REV. A