LINER LTC3708 Fast 2-phase, no rsense buck controller with output tracking Datasheet

LTC3708
Fast 2-Phase, No RSENSE
Buck Controller with
Output Tracking
DESCRIPTION
FEATURES
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The LTC®3708 is a dual, 2-phase synchronous step-down
switching regulator with output voltage up/down tracking
capability. The IC allows either coincident or ratiometric
tracking. Multiple LTC3708s can be daisy-chained in applications requiring more than two voltages to be tracked.
Power supply sequencing is accomplished using an
external soft-start timing capacitor.
Very Low Duty Factor Operation (tON(MIN) < 85ns)
No RSENSE™ Option for Maximum Efficiency
Very Fast Transient Response
Programmable Output Voltage Up/Down Tracking
2-Phase Operation Reduces Input Capacitance
0.6V ±1% Output Voltage Reference
External Frequency Synchronization
Monotonic Soft-Start
Onboard High Current MOSFET Drivers
Wide VIN Range: Up to 36V
Adjustable Cycle-by-Cycle Current Limit
Instant Output Overvoltage Protection
Optional Short-Circuit Shutdown Timer
Power Good Output with 100μs Masking
Available in 5mm × 5mm QFN Package
The LTC3708 uses a constant on-time, valley current mode
control architecture to deliver very low duty factors without
requiring a sense resistor. Operating frequency is selected
by an external resistor and is compensated for variations in
input supply voltage. An internal phase-locked loop allows
the IC to be synchronized to an external clock.
Fault protection is provided by an output overvoltage
comparator and an optional short-circuit shutdown timer.
The regulator current limit level is user programmable. A
wide supply range allows voltages as high as 36V to be
stepped down to 0.6V output.
APPLICATIONS
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Digital Signal Processors
Network Servers
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
No RSENSE is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
High Efficiency Dual Output Step-Down Converter
5V
10Ω
1μF
4.7μF
VOUT1 (0.5V/DIV)
VIN
3.3V TO 28V
10μF
50V
s4
100k
VOUT2 (0.5V/DIV)
+
VOUT1
2.5V
15A POSCAP +
330μF
4V
s2
M3
BG1
SENSE1–
PGND1
19.1k
1.5M
6.04k
33k
10k
LTC3708
180pF
L2
1.2μH
+
B340A
M4
SENSE2–
PGND2
VFB1
VFB2
TRACK2
FCB
ION1
ION2
ITH1
ITH2
INTLPF
EXTLPF
RUN/SS
TRACK1
VRNG2
SGND
VRNG1
0.1μF
0.22μF
BG2
0.01μF
0.01μF
M2
SW2
SENSE2+
SW1
SENSE1+
B340A
VIN
6.04k
0.22μF
DRVCC PGOOD
VCC
TG1
TG2
BOOST2
BOOST1
25k
3708 TA01b
100
9.0
95
7.5
90
6.0
12.1k
fIN
1M
VIN
1k
100k
5V
6.04k
33k
0.1μF
80
20VIN TO 2.5VOUT
5VIN TO 2.5VOUT
20VIN TO 1.8VOUT
5VIN TO 1.8VOUT
3.0
1.5
75
70
0.01
180pF
M1, M2: RENESAS HAT2168
M3, M4: RENESAS HAT2165
4.5
85
0.01μF
3708 TA01
L1: PANASONIC ETQP3HIR4BF
L2: PANASONIC ETQP2HIR2BF
2ms/DIV
VOUT2
1.8V
POSCAP 15A
470μF
2.5V
s2
POWER LOSS (W)
12.1k
M1
EFFICIENCY (%)
L1
1.4μH
0
1
0.1
LOAD CURRENT (A)
10
3708 TA01c
3708fb
1
LTC3708
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
Input Supply Voltage (VCC, DRVCC) ............. 7V to –0.3V
Boosted Topside Driver Supply Voltage
BOOST1, 2 ............................................ 42V to –0.3V
Switch Voltage (SW1, 2) .............................. 36V to –5V
SENSE1+, SENSE2+ Voltages ....................... 36V to –5V
SENSE1–, SENSE2– Voltages .................... 10V to –0.3V
ION1, ION2 Voltages .................................... 21V to –0.3V
(BOOST – SW) Voltages .............................. 7V to –0.3V
RUN/SS, PGOOD Voltages .......................... 7V to –0.3V
PGOOD DC Current ................................................. 5mA
TRACK1, TRACK2 Voltages ..............VCC + 0.3V to –0.3V
VRNG1, VRNG2 Voltages .................... VCC + 0.3V to –0.3V
ITH1, ITH2 Voltages.................................... 2.7V to –0.3V
VFB1, VFB2 Voltages .................................. 2.7V to –0.3V
INTLPF, EXTLPF Voltages ......................... 2.7V to –0.3V
FCB Voltages ............................................... 7V to –0.3V
Operating Temperature Range (Note 5).... –40°C to 85°C
Junction Temperature (Note 2) ........................... 125°C
Storage Temperature Range................... –65°C to 125°C
Reflow Peak Body Temperature ........................... 260°C
SENSE1+
SW1
TG1
BOOST1
ION1
PGOOD
FCB
VRNG1
TOP VIEW
32 31 30 29 28 27 26 25
24 SENSE1–
RUN/SS 1
ITH1 2
23 PGND1
VFB1 3
22 BG1
TRACK1 4
21 DRVCC
33
SGND 5
20 BG2
19 PGND2
TRACK2 6
18 SENSE2–
VFB2 7
ITH2 8
17 VCC
SENSE2+
SW2
TG2
BOOST2
ION2
VRNG2
INTLPF
EXTLPF
9 10 11 12 13 14 15 16
UH PACKAGE
32-LEAD (5mm s 5mm) PLASTIC QFN
TJMAX = 125°C, θJA = 34°C/W
EXPOSED PAD (PIN 33) IS SGND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3708EUH#PBF
LTC3708EUH#TRPBF
3708
32-Lead (5mm × 5mm) Plastic QFN
–40°C to 85°C
LEAD BASED FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3708EUH
LTC3708EUH#TR
3708
32-Lead (5mm × 5mm) Plastic QFN
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, DRVCC = 5V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
2.4
250
3
400
mA
μA
–50
–100
nA
0.594
0.591
0.600
0.600
0.606
0.609
V
V
0.594
0.600
0.606
Main Control Loop
IQ
Input DC Supply Current
Normal
Shutdown
IFB1,2
Feedback Pin Input Current
ITH = 1.2V (Notes 3, 4)
VREF
Internal Reference Voltage
ITH = 1.2V, 0°C to 85°C (Notes 3, 4)
ITH = 1.2V (Notes 3, 4)
VFB1,2
Feedback Voltage
ITH = 1.2V (Note 3)
ΔVFB(LINEREG)1,2
Feedback Voltage Line Regulation
VCC = 4.5V to 6.5V (Note 3)
l
0.02
V
%/V
3708fb
2
LTC3708
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, DRVCC = 5V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
–0.05
–0.2
%
1.2
1.45
1.7
mS
94
186
116
233
138
280
ns
ns
50
85
ns
270
350
ns
160
110
220
mV
mV
mV
ΔVFB(LOADREG)1,2 Feedback Voltage Load Regulation
ITH = 0.5V to 1.9V (Note 3)
gm(EA)1,2
Error Amplifier Transconductance
ITH = 1.2V (Note 3)
tON1,2
On-Time
ION = 60μA, VFCB = 0V
ION = 30μA, VFCB = 0V
tON(MIN)1,2
Minimum On-Time
ION = 180μA
tOFF(MIN)1,2
Minimum Off-Time
ION = 30μA
VSENSE(MAX)1,2
Maximum Current Sense Threshold
VRNG = 1V, VFB = 0.565V
VRNG = 0V, VFB = 0.565V
VRNG = VCC, VFB = 0.565V
143
100
200
VSENSE(MIN)1,2
Minimum Current Sense Threshold
VRNG = 1V, VFB = 0.635V
VRNG = 0V, VFB = 0.635V
VRNG = VCC, VFB = 0.635V
ΔVFB(OV)1,2
Overvoltage Fault Threshold
8.5
10
11.5
%
ΔVFB(UV)1,2
Undervoltage Fault Threshold
–380
–420
–460
mV
VRUN/SS(ON)
RUN Pin Start Threshold
0.8
1.3
1.8
V
VRUN/SS(LE)
RUN Pin Latchoff Enable Threshold
RUN/SS Pin Rising
2.6
3
3.3
V
VRUN/SS(LT)
RUN Pin Latchoff Threshold
RUN/SS Pin Falling
2.2
2.5
2.8
V
l
125
90
180
–62
–42
–88
l
mV
mV
mV
IRUN/SS(C)
Soft-Start Charge Current
VRUN/SS = 0V
–0.5
–1.2
–2
μA
IRUN/SS(D)
Soft-Start Discharge Current
VRUN/SS = VRUN/SS(LE), VFB1,2 = 0V
0.8
2
3
μA
VCC(UVLO)
Undervoltage Lockout
VCC Falling
3.2
3.6
V
VCC(UVLOR)
Undervoltage Lockout Release
VCC Rising
3.5
3.8
V
TG RUP1,2
TG Driver Pull-Up On-Resistance
TG High (Note 6)
TG RDOWN1,2
TG Driver Pull-Down On-Resistance
TG Low (Note 6)
2
Ω
BG RUP1,2
BG Driver Pull-Up On-Resistance
BG High (Note 6)
3
Ω
BG RDOWN1,2
BG Driver Pull-Down On-Resistance
BG Low (Note 6)
1
Ω
ITRACK1,2
TRACK Pin Input Current
ITH = 1.2V, VTRACK = 0.2V (Note 3)
VFB(TRACK1,2)
Feedback Voltage at Tracking
VTRACK = 0V, ITH = 1.2V (Note 3)
VTRACK = 0.2V, ITH = 1.2V (Note 3)
VTRACK = 0.4V, ITH = 1.2V (Note 3)
ΔVFBH1,2
PGOOD Upper Threshold
ΔVFBL1,2
2
Ω
Tracking
–100
–150
nA
–10
190
390
0
200
400
–10
210
410
mV
mV
mV
Either VFB Rising
8.5
10
11.5
%
PGOOD Lower Threshold
Either VFB Falling
–8.5
–10
–11.5
%
ΔVFB(HYS)1,2
PGOOD Hysteresis
VFB Returning
3
5
%
VPGL
PGOOD Low Voltage
IPGOOD = 5mA
0.1
0.4
V
±1
μA
PGOOD Output
IPGOOD
PGOOD Leakage Current
VPGOOD = 7V
PG Delay
PGOOD Delay
VFB Falling
100
1.9
2.1
2.3
V
1
1.5
2
V
μs
Phase-Locked Loops
VFCB(DC)
Forced Continuous Threshold
Measured with a DC Voltage at FCB Pin
VFCB(AC)
Clock Input Threshold
Measured with a AC Pulse at FCB Pin
IEXTLPF
External Phase Detector Output Current
Sourcing Capability
Sinking Capability
fFCB < fSW1, VEXTLPF = 0V
fFCB > fSW1, VEXTLPF = 2.4
20
–20
μA
μA
3708fb
3
LTC3708
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, DRVCC = 5V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
IINTLPF
Internal Phase Detector Output Current
Sourcing Capability
Sinking Capability
fSW1 < fSW2, VINTLPF = 0V
fSW1 > fSW2, VINTLPF = 2.4
tON1 Modulation Range by External PLL
Up Modulation
Down Modulation
ION1 = 60μA, VEXTLPF = 1.8V
ION1 = 60μA, VEXTLPF = 0.6V
186
tON2 Modulation Range by Internal PLL
Up Modulation
Down Modulation
ION1 = 60μA, VEXTLPF = 1.8V
ION1 = 60μA, VEXTLPF = 0.6V
186
tON(PLL)1
tON(PLL)2
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliabilty and lifetime.
Note 2: TJ is calculated from the ambient temperature TA and power
dissipation PD as follows:
TJ = TA + (PD • 34°C/W)
Note 3: The LTC3708 is tested in a feedback loop that adjusts VFB to
achieve a specified error amplifier output voltage (ITH).
MIN
TYP
MAX
UNITS
20
–20
μA
μA
233
58
80
ns
ns
233
58
80
ns
ns
Note 4: Internal reference voltage is tested indirectly by extracting error
amplifier offset from the feedback voltage.
Note 5: The LTC3708E is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 6: RDS(ON) limit is guaranteed by design and/or correlation to static
test.
TYPICAL PERFORMANCE CHARACTERISTICS
Load Transient on Channel 1
Load Transient on Channel 2
IOUT1
10A/DIV
IOUT2
10A/DIV
VOUT1
100mV/DIV
VOUT1
100mV/DIV
VOUT2
100mV/DIV
VOUT2
100mV/DIV
20μs/DIV
3708 G01
20μs/DIV
Coincident Tracking
3708 G02
Ratiometric Tracking
VOUT1
0.5V/DIV
VOUT1
0.5V/DIV
VOUT2
0.5V/DIV
VOUT2
0.5V/DIV
2ms/DIV
3708 G03
2ms/DIV
3708 G04
3708fb
4
LTC3708
TYPICAL PERFORMANCE CHARACTERISTICS
Soft-Start
Power Loss vs Input Voltage
6
VOUT1
2V/DIV
VOUT2
2V/DIV
POWER LOSS (W)
5
RUN/SS
5V/DIV
IL1
5A/DIV
VOUT = 2.5V
4
3
VOUT = 1.8V
2
1
3708 G05
50ms/DIV
IOUT = 15A
0
5
10
15
20
INPUT VOLTAGE (V)
25
3708 G06
Power Loss vs Load Current
VIN = 5V
3.0
VOUT = 2.5V
Frequency vs Load Current
250
IOUT = 15A
240
2.5
FREQUENCY (kHz)
POWER LOSS (W)
Frequency vs Input Voltage
260
VOUT = 1.8V
2.0
1.5
1.0
220
200
FREQUENCY (kHz)
3.5
EXTERNAL SYNCHRONIZATION (ANY IOUT)
IOUT = 0A
200
180
0.5
0
10
100
1000
10000
160
100000
5
10
15
20
0
25
10
5
LOAD CURRENT (A)
0
3708 G09
Current Sense Threshold
vs ITH Voltage
On-Time vs Temperature
10000
300
300
CURRENT SENSE THRESHOLD (mV)
ION = 30μA
250
ON-TIME (ns)
1000
200
150
ION = 60μA
100
100
50
10
1000
3708 G10
15
3708 G08
On-Time vs ION Current
ON-TIME (ns)
FORCED CONTINUOUS MODE
EXTERNAL
SYNCHRONIZATION
DISCONTINUOUS MODE
INPUT VOLTAGE (V)
3707 G07
10
100
ION CURRENT (μA)
100
50
LOAD (mA)
1
150
0
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
3708 G11
VRNG =
250
2V
1.4V
200
1V
150
0.7V
100
0.5V
50
0
–50
–100
–150
–200
0
0.5
1.5
1
ITH VOLTAGE (V)
2
2.5
3708 G12
3708fb
5
LTC3708
TYPICAL PERFORMANCE CHARACTERISTICS
Maximum Current Sense
Threshold vs Temperature
300
250
200
150
100
50
0
0.5
1.5
1.25
1
VRNG VOLTAGE (V)
0.75
1.75
2
160
Load Regulation
(Figure 13 Circuit)
0
VRNG = 1V
–0.1
FORCED
CONTINUOUS
MODE
150
–0.2
$VOUT (%)
350
MAXIMUM CURRENT SENSE THRESHOLD (mV)
MAXIMUM CURRENT SENSE THRESHOLD (mV)
Maximum Current Sense
Threshold vs VRNG Voltage
140
130
–0.3
–0.4
DISCONTINUOUS
MODE
–0.5
120
–0.6
110
–50 –25
–0.7
0
3708 G13
3
0
25 50
75 100 125 150
TEMPERATURE (°C)
6
9
3708 G15
3708 G14
Error Amplifier gm
vs Temperature
SENSE Pin Input Current
vs Temperature
RUN/SS Pin Current
vs Temperature
150
1.6
15
12
LOAD CURRENT (A)
3
140
1.5
120
ISENSE (μA)
1.4
gm (mS)
RUN/SS PIN CURRENT (μA)
130
1.3
1.2
ISENSE–
110
100
ISENSE+
90
80
70
1.1
2
PULL-DOWN CURRENT
1
0
PULL-UP CURRENT
–1
60
1.0
–50 –25
0
50
–50 –25
25 50 75 100 125 150
TEMPERATURE (°C)
0
3708 G16
700
Undervoltage Lockout Threshold
vs Temperature
UNDERVOLTAGE LOCKOUT THRESHOLD (V)
4.0
RUN/SS THRESHOLD (V)
600
VFB (mV)
400
300
200
3.5
LATCHOFF ENABLE
3.0
2.5
LATCHOFF THRESHOLD
100
1
1.25
2
1.75
1.5
RUN/SS VOLTAGE (V)
2.25
2.5
3708 G19
2.0
–50 –25
0
125
100
3708 G18
RUN/SS Latch-Off Thresholds
vs Temperature
500
50
25
0
75
TEMPERATURE (°C)
–25
3708 G17
Feedback Voltage vs RUN/SS
(Soft-Start)
0
–2
–50
25 50 75 100 125 150
TEMPERATURE (°C)
25 50 75 100 125 150
TEMPERATURE (°C)
3708 G20
4.5
4.0
3.5
3.0
2.5
2.0
–50 –25
0
25 50
75 100 125 150
TEMPERATURE (°C)
3708 G21
3708fb
6
LTC3708
TYPICAL PERFORMANCE CHARACTERISTICS
On-Time vs EXTLPF Voltage
500
450
450
400
400
ION1 = 30μA
350
300
250
200
ION1 = 60μA
150
VSW1
10V/DIV
250
200
100
50
0
1.2
1.1
1.3
EXTLPF VOLTAGE (V)
1.4
VSW2
10V/DIV
ION2 = 60μA
150
50
1
IIN
2A/DIV
VIN
200mV/DIV
300
100
0
2-Phase Operation
ION2 = 30μA
350
tON2 (ns)
tON1 (ns)
On-Time vs INTLPF Voltage
500
0.6
0.8
1.2 1.4
1
1.6
INTLPF VOLTAGE (V)
1.8
2.0
VIN = 15V
1μs/DIV
VOUT1 = 5V
VOUT2 = 3.3V
IOUT5 = IOUT3 = 2A
3708 G024
3708 G23
3708 G22
Load Transient Response Without
External Synchronization
IOUT1
10A/DIV
Load Transient Response with
External Synchronization
IOUT1
10A/DIV
fS = 200kHz
fS = 240kHz
fS = 220kHz
SW1
10V/DIV
SW1
10V/DIV
VOUT1
50mV/DIV
VOUT1
50mV/DIV
10μs/DIV
3708 G25
10μs/DIV
Discontinuous Mode Operation
VOUT
20mV/DIV
fS = 220kHz
3708 G26
Power Good Mask
VFB
0.2V/DIV
PGOOD
2V/DIV
IL
0.5A/DIV
VIN = 15V
VOUT = 5V
VFCB = 5V
IOUT = 20mA
2μs/DIV
3708 G027
100μs/DIV
3708 G28
3708fb
7
LTC3708
PIN FUNCTIONS
RUN/SS (Pin 1): Run Control and Soft-Start Input. A
capacitor to ground at this pin sets the ramp rate of the
output voltage (approximately 0.5s/μF) and the time delay
for overcurrent latchoff (see Applications Information).
Forcing this pin below 0.8V shuts down the LTC3708.
ITH1, ITH2 (Pins 2, 8): Error Amplifier Compensation Point
and Current Control Threshold. The current comparator
threshold increases with this control voltage. The voltage
ranges from 0V to 2.4V with 0.8V corresponding to zero
sense voltage (zero current).
VFB1, VFB2 (Pins 3, 7): Error Amplifier Feedback Input.
This pin connects the error amplifier input to an external
resistive divider from VOUT . Additional compensation can
be implemented, if desired, using this pin.
TRACK1, TRACK2 (Pins 4, 6): Tie TRACK2 pin to a resistive divider connected to the output of channel 1 for
either coincident or ratiometric output tracking. TRACK1
is used in the same manner between multiple LTC3708s
(see Applications Information). To disable this feature, tie
the pins to VCC. Do Not Float These Pins.
SGND (Pins 5, 33): Signal Ground. All small-signal components and compensation components should connect to
this ground and eventually connect to PGND at one point.
The Exposed Pad of the LTC3708EUH must be soldered
to the PCB.
EXTLPF (Pin 9): Filter Connection for the External PLL. This
PLL is used to synchronize the LTC3708 to an external clock.
If external clock is not used, leave this pin floating.
INTLPF (Pin 10): Filter Connection for the Internal PLL.
This PLL is used to phase shift the second channel to the
first channel by 180°.
VCC (Pin 17): Main Input Supply. Decouple this pin to
SGND with an RC filter (10Ω, 1μF for example).
DRVCC (Pin 21): Driver Supply. Provides supply to the
drivers for the bottom gates. Also used for charging the
bootstrap capacitors.
BG1, BG2 (Pins 22, 20): Bottom Gate Drive. Drives the
gate of the bottom N-channel MOSFET between ground
and DRVCC.
PGND1, PGND2 (Pins 23, 19): Power Ground. Connect this
pin closely to the source of the bottom N-channel MOSFET,
the (–) terminal of CDRVCC and the (–) terminal of CIN.
SENSE1–, SENSE2– (Pins 24, 18): Current Sense Comparator Input. The (–) input to the current comparator is
used to accurately Kelvin sense the bottom side of the
sense resistor or MOSFET.
SENSE1+, SENSE2+ (Pins 25, 16): Current Sense Comparator Input. The (+) input to the current comparator is
normally connected to the SW node unless using a sense
resistor (See Applications Information).
SW1, SW2 (Pins 26, 15): Switch Node. The (–) terminal of the
bootstrap capacitor CB connects here. This pin swings from
a Schottky diode voltage drop below ground up to VIN.
TG1, TG2 (Pins 27, 14): Top Gate Drive. Drives the top
N-channel MOSFET with a voltage swing equal to DRVCC
superimposed on the switch node voltage SW.
BOOST1, BOOST2 (Pins 28, 13): Boosted Floating Driver
Supply. The (+) terminal of the bootstrap capacitor CB
connects here. This pin swings from a diode voltage drop
below DRVCC up to VIN + DRVCC.
ION1, ION2 (Pins 29, 12): On-Time Current Input. Tie a
resistor from VIN to this pin to set the one-shot timer
current and thereby set the switching frequency.
PGOOD (Pin 30): Power Good Output. Open-drain logic
output that is pulled to ground when either or both output
voltages are not within ±10% of the regulation point. The
output voltage must be out of regulation for at least 100μs
before the power good output is pulled to ground.
FCB (Pin 31): Forced Continuous and External Clock Input.
Tie this pin to ground to force continuous synchronous
operation or to VCC to enable discontinuous mode operation at light load. Feeding an external clock signal into this
pin will synchronize the LTC3708 to the external clock and
enable forced continuous mode.
VRNG1, VRNG2 (Pins 32, 11): Sense Voltage Range Input.
The voltage at this pin is ten times the nominal sense voltage at maximum output current and can be programmed
from 0.5V to 2V. The sense voltage defaults to 70mV when
this pin is tied to ground, 140mV when tied to VCC.
3708fb
8
LTC3708
FUNCTIONAL DIAGRAM
RIPLL
CIPLL
INTLPF
FCB
ION
CLOCK DETECTOR
RON
FROM CHANNEL 2
TG
ENABLE
PHASE DETECTOR
(PD2)
EXTLPF
0.6V
REF
PHASE DETECTOR
(PD1)
VIN
+
VCC
CIN
CVCC
REPLL
CEPLL
BOOST
TO CHANNEL 2 OST
OST
tON = 0.7 (10pF)
IION
TG
FCNT
R
M1
ON
Q
SW
S
20k
+
SENSE+
SWITCH
LOGIC
+
ICMP
L1
VOUT
+
DB
COUT
DRVCC
IREV
–
CB
–
SHDN
BG
OV
CDRVCC
M2
1.4V
PGND
VRNG
SENSE–
s
0.7V
–
OV
3.3μA
–
EA
VFB
R2
+
1
240k
0.66V
SGND
Q4
R1
+
–
ITH
UV
CC
0.54V
+
RC
PGOOD
Q1
Q2
VREF
0.6V
Q3
+
–
TRACK
ENABLE
>100μs
BLANKING
1.3V
RUN
SHDN
FROM CHANNEL 2
OV AND UV COMPARATORS
1.2μA
DUPLICATE FOR SECOND
CHANNEL CONTROLLER
6V
–+
1.3V
RUN/SS
CSS
NOTE: THE RUN/SS PIN ONLY CLAMPS
VREF FOR PHASE 1 NOT PHASE 2.
3708 FD
3708fb
9
LTC3708
OPERATION
(Refer to Functional Diagram)
Main Control Loop
The LTC3708 uses a constant on-time, current mode stepdown architecture with two control channels operating at
180 degrees out of phase. In normal operation, each top
MOSFET is turned on for a fixed interval determined by its
own one-shot timer OST. When the top MOSFET is turned
off, the bottom MOSFET is turned on until the current
comparator ICMP trips, restarting the one-shot timer and
repeating the cycle. The trip level of the current comparator
is set by the ITH voltage which is the output of each error
amplifier, EA. Inductor current is determined by sensing
the voltage between the SENSE– and SENSE+ pins using
either the bottom MOSFET on-resistance or a separate
sense resistor. At low load currents, the inductor current
can drop to zero and become negative. This is detected by
current reversal comparator IREV, which then shuts off M2
resulting in discontinuous operation. Both switches will
remain off with the output capacitor supplying the load
current until the ITH voltage rises above the zero current
level (0.8V) to initiate another cycle. Discontinuous mode
operation is disabled when the FCB pin is brought below
1.9V, forcing continuous synchronous operation.
The main control loop is shut down by pulling the RUN/SS
pin low, turning off both M1 and M2. Releasing the pin allows an internal 1.2μA current source to charge an external
soft-start capacitor, CSS. When this voltage reaches 1.3V,
the controller turns on and begins switching, but with the
effective reference voltage clamped at 0V. As CSS continues
to charge, the effective reference ramps up at the same
rate and controls the rise rate of the output voltage.
Operating Frequency
The operating frequency is determined implicitly by the top
MOSFET on-time and the duty cycle required to maintain
regulation. The one-shot timer generates an on-time that is
proportional to the ideal duty cycle, thus holding frequency
approximately constant with changes in VIN. The nominal
frequency can be adjusted with an external resistor RON.
When the LTC3708 is synchronized to an external clock,
the operating frequency will then be solely determined by
the external clock.
Output Overvoltage Protection
An overvoltage comparator OV guards against transient
overshoots (>10%) as well as other more serious conditions that may overvoltage the output. In this condition,
M1 is turned off and M2 is turned on and held on until
the condition is cleared.
Short-Circuit Detection and Protection
After the controller has been started and given adequate
time to charge the output capacitors, the RUN/SS capacitor
is used as the short-circuit time-out capacitor. If either one
of the output voltages falls to less than 70% of its nominal
output voltage, the RUN/SS capacitor begins discharging
on the assumption that the output is in an overcurrent
and/or short-circuit condition. If the condition lasts for
a long enough period, as determined by the size of the
RUN/SS capacitor, both controllers will be shut down until
the RUN/SS pin voltage is recycled. This built-in latchoff
can be overridden by providing >5μA pull-up at a compliance of 5V to the RUN/SS pin. This current shortens the
soft-start period but also prevents net discharge of the
RUN/SS capacitor during an overcurrent and/or shortcircuit condition.
Power Good (PGOOD) Pin
Overvoltage and undervoltage comparators OV and UV
pull the PGOOD output low if the output feedback voltage exceeds a ±10% window around the regulation point.
In addition, the output feedback voltage must be out of
this window for a continuous duration of at least 100μs
before PGOOD is pulled low. This is to prevent any glitch
on the feedback voltage from creating a false power bad
signal. The PGOOD will indicate high immediately when
the feedback voltage is in regulation.
3708fb
10
LTC3708
OPERATION
(Refer to Functional Diagram)
DRVCC
Power for the top and bottom MOSFET drivers is derived
from the DRVCC pin. The top MOSFET driver is powered
from a floating bootstrap capacitor, CB. This capacitor
is normally recharged from DRVCC through an external
Schottky diode, DB, when the top MOSFET is turned off.
2-Phase Operation
For the LTC3708 to operate optimally as a 2-phase controller,
the resistors connected to the ION pins must be selected
such that the free-running frequency of each channel is
close to that of the other. An internal phase-locked loop
(PLL) will then ensure that channel 2 operates at the same
frequency as channel 1, but phase shifted by 180°. The
loop filter connected to the INTLPF pin provides stability to
the PLL. For external clock synchronization, a second PLL
is incorporated to adjust the on-time of channel 1 until its
frequency is the same as the external clock. Compensation
for the external PLL is through the EXTLPF pin.
The loop filter components tied to the INTLPF and EXTLPF
pins are used to compensate the internal PPL and external
PLL respectively. The typical value ranges are:
INTLPF: RIPLL = 2kΩ to 10kΩ, CIPLL = 10nF to 100nF
EXTLPF: REPLL ≤ 1kΩ, CEPLL = 10nF to 100nF
For noise suppression, a capacitor with a value of 1nF or
less should be placed from INTLPF to ground and EXTLPF
to ground.
The LTC3708’s 2-phase operation brings considerable
benefits to portable applications and automatic electronics. It lowers the input filtering requirement, reduces
electromagnetic interference (EMI) and increases the
power conversion efficiency. Until the introduction of the
2-phase operation, dual switching regulators operated
both channels in phase (i.e., single phase operation).
This means that both controlling switches turned on at
the same time, causing current pulses of up to twice the
amplitude of those for one regulator to be drawn from the
input capacitor or battery. Such operation results in higher
input RMS current, larger and/or more expensive input
capacitors, more power loss and worse EMI in the input
source (whether a wall adapter or a battery).
In contrast to single phase operation, the two channels of
a 2-phase switching regulator are operated 180 degrees
out of phase. This effectively interleaves the current pulses
drawn by the switches, greatly reducing the overlap time
where they add together. The result is a significant reduction in total RMS input current, which in turn allows less
expensive input capacitors to be used, reduces shielding
requirements for EMI and improves real world operating
efficiency.
Figure 1 compares the input waveforms for a representative
single phase dual switching regulator to the 2-phase dual
switching regulator. An actual measurement of the RMS
input current under these conditions shows that 2-phase
dropped the input current from 2.53ARMS to 1.55ARMS.
5V SWITCH
20V/DIV
3.3V SWITCH
20V/DIV
INPUT CURRENT
5A/DIV
INPUT VOLTAGE
500mV/DIV
IIN(MEAS) = 2.53ARMS
(1a)
IIN(MEAS) = 1.55ARMS
3708 F01
(1b)
Figure 1. Input Waveforms Comparing Single Phase (1a) and 2-Phase (1b) Operation
for Dual Switching Regulators Converting 12V to 5V and 3.3V at 3A Each
3708fb
11
LTC3708
(Refer to Functional Diagram)
While this is an impressive reduction in itself, remember
that the power losses are proportional to I2RMS, meaning
that the actual power wasted is reduced by a factor of
2.66. The reduced input ripple current also means that
less power is lost in the input power path, which could
include batteries, switches, trace/connector resistances
and protection circuitry. Improvements in both conducted
and radiated EMI also directly accrue as a result of the
reduced RMS input current and voltage.
Of course, the improvement afforded by 2-phase operation is a function of the dual switching regulator’s relative
duty cycles which, in turn, are dependent upon the input
voltage, VIN. Figure 2 shows how the RMS input current
varies for single phase and 2-phase operation for 3.3V and
5V regulators over a wide input voltage range.
It can readily be seen that the advantages of 2-phase operation are not just limited to a narrow operating range, but in
fact extend over a wide region. A good rule of thumb for
most applications is that 2-phase operation will reduce the
input capacitance requirement to that for just one channel
operating at maximum current and 50% duty cycle.
3.0
SINGLE PHASE
DUAL CONTROLLER
2.5
INPUT RMS CURRENT (A)
OPERATION
2.0
1.5
2-PHASE
DUAL CONTROLLER
1.0
0.5
0
VO1 = 5V/3A
VO2 = 3.3V/3A
0
10
20
30
INPUT VOLTAGE (V)
40
3708 F02
Figure 2. RMS Input Current Comparison
3708fb
12
LTC3708
APPLICATIONS INFORMATION
The basic LTC3708 application circuit is shown on the first
page of this data sheet. External component selection is
primarily determined by the maximum load current and
begins with the selection of the power MOSFET switches
and/or sense resistor. For the LTC3708, the inductor current is determined by the RDS(ON) of the synchronous
MOSFET or by a sense resistor when the user opts for
more accurate current sensing. The desired amount of
ripple current and operating frequency largely determines
the inductor value. Finally, CIN is selected for its ability to
handle the large RMS current into the converter and COUT
is chosen with low enough ESR to meet the output voltage
ripple specification.
across this resistor, connect the SENSE+ pin to the source
of the synchronous MOSFET and the SENSE– pin to the
other end of the resistor. The SENSE+ and SENSE– pins
provide the Kelvin connections, ensuring accurate voltage
measurement across the resistor. Using a sense resistor
provides a well-defined current limit, but adds cost and
reduces efficiency. Alternatively, one can use the synchronous MOSFET as the current sense element by simply
connecting the SENSE+ pin to the switch node SW and
the SENSE– pin to the source of the synchronous MOSFET,
eliminating the sense resistor. This improves efficiency,
but one must carefully choose the MOSFET on-resistance
as discussed below.
Maximum Sense Voltage and VRNG Pin
Power MOSFET Selection
Inductor current is determined by measuring the voltage
across the RDS(ON) of the synchronous MOSFET or through
a sense resistor that appears between the SENSE+ and
SENSE– pins. The maximum sense voltage is set by the
voltage applied to the VRNG pin and is equal to approximately
VRNG/7. The current mode control loop will not allow the
inductor current valleys to exceed VRNG/(7 • RSENSE). In
practice, one should allow some margin for variations in
the LTC3708 and external component values. A good guide
for selecting the sense resistance is:
Each output stage of the LTC3708 requires two external
N-channel power MOSFETs, one for the top (main) switch
and one for the bottom (synchronous) switch. Important
parameters for the power MOSFETs are the breakdown
voltage V(BR)DSS, threshold voltage VGS(TH), on-resistance
RDS(ON), reverse transfer capacitance, CRSS, and maximum
current, IDS(MAX).
RSENSE =
VRNG
10 • IOUT (MAX)
The voltage of the VRNG pin can be set using an external
resistive divider from VCC between 0.5V and 2V, resulting
in nominal sense voltages of 50mV to 200mV. Additionally,
the VRNG pin can be tied to ground or VCC, in which case
the nominal sense voltage defaults to 70mV or 140mV,
respectively. The maximum allowed sense voltage is about
1.4 times this nominal value.
Connecting the SENSE+ and SENSE– Pins
The LTC3708 provides the user with an optional method
to sense current through a sense resistor instead of using
the RDS(ON) of the synchronous MOSFET. When using a
sense resistor, it is placed between the source of the synchronous MOSFET and ground. To measure the voltage
The gate drive voltage is set by the 5V DRVCC supply.
Consequently, logic-level threshold MOSFETs must be
used in LTC3708 applications. If the driver’s voltage is
expected to drop below 5V, then sub-logic level threshold
MOSFETs should be considered.
When the bottom MOSFET is used as the current sense
element, particular attention must be paid to its on-resistance. MOSFET on-resistance is typically specified
with a maximum value RDS(ON)(MAX) at 25°C. Additional
margin is required to accommodate the rise in MOSFET
on-resistance with temperature:
RDS(ON)(MAX) =
RSENSE
ρT
The ρT term is a normalization factor (unity at 25°C) accounting for the significant variation in on-resistance with
temperature, typically about 0.4%/°C. For a maximum
junction temperature of 100°C, using a value ρ100°C =
1.3 is reasonable (see Figure 3).
3708fb
13
LTC3708
APPLICATIONS INFORMATION
Operating Frequency
The choice of operating frequency is a trade-off between
efficiency and component size. Low frequency operation
improves efficiency by reducing MOSFET switching and
driving losses but requires larger inductance and/or capacitance to maintain low output ripple voltage.
1.5
1.0
0.5
0
–50
50
100
0
JUNCTION TEMPERATURE (°C)
150
3708 F03
The operating frequency of LTC3708 applications is determined implicitly by the one-shot timer that controls the on
time, tON, of the top MOSFET switch. The on time is set
by the current into the ION pin according to:
tON =
Figure 3. RDS(ON) vs Temperature
The power dissipated by the top and bottom MOSFETs
strongly depends upon their respective duty cycles and the
load current. When the LTC3708 is operating in continuous
mode, the duty cycles for the MOSFETs are:
D TOP
DBOT
V
= OUT
VIN
V –V
= IN OUT
VIN
PTOP = DTOP • IOUT(MAX)2 • ρT(TOP) • RDS(ON) +
• IOUT(MAX) • CRSS • f •
⎛
1
1 ⎞
RDR • ⎜
+
⎟
VGS(TH) ⎠
⎝ DRVCC – VGS(TH)
(
)
Tying a resistor, RON, from VIN to the ION pin yields an
on time inversely proportional to VIN. For a step-down
converter, this results in approximately constant frequency
operation as the input supply varies:
f=
VOUT
0.7 • RON (10pF )
Figure 4 shows how RON relates to switching frequency
for several common output voltages.
The resulting power dissipation in the MOSFETs at maximum output current are:
(0.5) • VIN2
(
0.7
10pF
IION
)
PBOT = DBOT • IOUT(MAX)2 • ρT(BOT) • RDS(ON)
Both MOSFETs have I2R losses and the top MOSFET includes an additional term for transition losses, which are
largest at high input voltages. The bottom MOSFET losses
are greatest when the bottom duty cycle is near 100%,
during a short circuit or at high input voltage.
1000
SWITCHING FREQUENCY (kHz)
RT NORMALIZED ON-RESISTANCE
2.0
VOUT = 3.3V
VOUT = 1.5V
VOUT = 2.5V
100
100
1000
RON (kΩ)
10000
3708 F04
Figure 4. Switching Frequency vs RON
3708fb
14
LTC3708
APPLICATIONS INFORMATION
PLL and Frequency Synchronization
In the LTC3708, there are two onboard phase-locked loops
(PLL). One PLL is used to achieve frequency locking and
180° phase shift between the two channels while the second PLL locks onto the rising edge of an external clock.
Since the LTC3708 uses a constant on-time architecture,
the error signal generated by the phase detector of the PLL
is used to vary the on time to achieve frequency locking
and phase separation. The variable on-time range is from
0.5 • tON to 2 • tON, where tON is the initial on time set by
the RON resistor.
To fully utilize the frequency synchronization range of the
PLL, it is advisable to set the initial on time properly so
that the two channels have close free-running frequencies.
Frequencies far apart may exceed the synchronization
capability of the PLL. If the two output voltages are VOUT1
and VOUT2, for example, RON resistors should then be
selected proportionally:
RON1 VOUT1
=
RON2 VOUT2
Lower ripple current reduces core losses in the inductor,
ESR losses in the output capacitors and ripples in the
output voltage. Highest efficiency operation is obtained at
low frequency with small ripple current. However, achieving
this requires a large inductor. There is a trade-off between
component size and efficiency.
A reasonable starting point is to choose a ripple current
that is about 40% of IOUT(MAX). Note that the largest ripple
current occurs at the highest VIN. To guarantee that ripple
current does not exceed a specified maximum, the inductance should be chosen according to:
⎛ VOUT ⎞ ⎛
⎞
V
L=⎜
1 – OUT ⎟
⎟
⎜
⎝ f • ΔIL(MAX) ⎠ ⎝ VIN(MAX) ⎠
Once the value for L is known, the type of inductor must be
selected. A variety of inductors designed for high current,
low voltage applications are available from manufacturers
such as Sumida and Panasonic.
Schottky Diode Selection
In this case, channel 1 will first be synchronized to the
external frequency and channel 2 will then be synchronized
to channel 1 with 180° phase separation.
The Schottky diodes in parallel with both bottom MOSFETs
conduct during the dead time between the conduction of
the power MOSFET switches. They are intended to prevent
the body diode of the bottom MOSFET from turning on
and storing charge during the dead time, which causes a
modest (about 1%) efficiency loss. The diodes can be rated
for about one-half to one-fifth of the full load current since
they are on for only a fraction of the duty cycle. In order
for the diodes to be effective, the inductance between them
and the bottom MOSFETs must be as small as possible,
mandating that these components be placed as close as
possible in the circuit board layout. The diodes can be
omitted if the efficiency loss is tolerable.
Inductor Selection
CIN and COUT Selection
Given the desired input and output voltages, the inductor value and operating frequency determine the ripple
current:
The selection of CIN is simplified by the 2-phase architecture and its impact on the worst-case RMS current drawn
through the input network (battery/fuse/capacitor). It can
be shown that the worst-case RMS current occurs when
only one controller is operating. The controller with the
Similarly, if the external PLL is engaged to synchronize
to an external frequency of fEXT, RON1 should be selected
close to:
RON1 =
VOUT1
0.7 • fEXT • 10pF
⎛
⎞
VOUT2
hence, ⎜ RON2 =
⎟
⎝
0.7 • fEXT • 10pF ⎠
⎛V ⎞⎛ V ⎞
ΔIL = ⎜ OUT ⎟ ⎜ 1 – OUT ⎟
VIN ⎠
⎝ f •L ⎠ ⎝
3708fb
15
LTC3708
APPLICATIONS INFORMATION
highest (VOUT)(IOUT) product needs to be used in the
formula below to determine the maximum RMS current
requirement. Increasing the output current, drawn from
the other out-of-phase controller, will actually decrease
the input RMS ripple current from this maximum value
(see Figure 2).
The type of input capacitor, value and ESR rating have efficiency effects that need to be considered in the selection
process. The capacitance value chosen should be sufficient
to store adequate charge to keep pulsating input currents
down. 20μF to 40μF is usually sufficient for a 25W output
supply operating at 200kHz. The ESR of the capacitor
is important for capacitor power dissipation as well as
overall efficiency. All of the power (RMS ripple current2
• ESR) not only heats up the capacitor but wastes power
from the battery.
Medium voltage (20V to 35V) ceramic, tantalum, OS-CON
and switcher-rated electrolytic capacitors can be used
as input capacitors, but each has drawbacks: ceramic
voltage coefficients are very high and may have audible
piezoelectric effects; tantalums need to be surge-rated;
OS-CONs suffer from higher inductance, larger case
size and limited surface-mount applicability; electrolytics’ higher ESR and dryout possibility require several to
be used. 2-phase systems allow the lowest amount of
capacitance overall. As little as one 22μF or two to three
10μF ceramic capacitors are an ideal choice in a 20W to
35W power supply due to their extremely low ESR. Even
though the capacitance at 20V is substantially below their
rating at zero-bias, very low ESR loss makes ceramics
an ideal candidate for highest efficiency battery operated
systems. Also consider parallel ceramic and high quality
electrolytic capacitors as an effective means of achieving
ESR and bulk capacitance goals.
In continuous mode, the current of the top N-channel
MOSFET is approximately a square wave of duty cycle
VOUT/VIN. To prevent large voltage transients, a low ESR
input capacitor sized for the maximum RMS current of
one channel must be used. The maximum RMS capacitor
current is given by:
IRMS ≈ IMAX
(
)
1/ 2
⎡ VOUT VIN − VOUT ⎤
⎣
⎦
VIN
This formula has a maximum at VIN = 2VOUT , where IRMS
= IOUT/2. This simple worst-case condition is commonly
used for design because even significant deviations do not
offer much relief. Note that capacitor manufacturer’s ripple
current ratings are often based on only 2000 hours of life.
This makes it advisable to further derate the capacitor, or
to choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to meet
size or height requirements in the design. Always consult
the manufacturer if there is any question.
The benefit of the LTC3708 2-phase operation can be
calculated by using the equation above for the higher
power channel and then calculating the loss that would
have resulted if both controller channels switch on at the
same time. The total RMS power lost is lower when both
controllers are operating due to the interleaving of current
pulses through the input capacitor’s ESR. This is why the
input capacitor’s requirement calculated above for the
worst-case controller is adequate for the dual controller
design. Remember that input protection fuse resistance,
battery resistance and PC board trace resistance losses
are also reduced due to the reduced peak currents in a
2-phase system. The overall benefit of a 2-phase design
will only be fully realized when the source impedance of
the power supply/battery is included in the efficiency
testing. The drains of the two top MOSFETS should be
placed within 1cm of each other and share a common
CIN(s). Separating the drains and CIN may produce undesirable voltage and current resonances at VIN.
The selection of COUT is driven by the effective series
resistance (ESR) required to minimize voltage ripple
and load step transients. The output ripple (ΔVOUT) is
determined by:
⎛
1 ⎞
ΔVOUT ≈ ΔIL ⎜ ESR +
⎟
⎝
8fC OUT ⎠
where f = operating frequency, COUT = output capacitance,
and ΔIL = ripple current in the inductor. The output ripple
is highest at maximum input voltage since ΔIL increases
with input voltage. Typically, once the ESR requirement
is satisfied, the capacitance is adequate for filtering and
has the necessary RMS current rating.
3708fb
16
LTC3708
APPLICATIONS INFORMATION
Manufacturers such as Nichicon, United Chemi-Con and
Sanyo can be considered for high performance throughhole capacitors. The OS-CON semiconductor dielectric
capacitor available from Sanyo has the lowest (ESR)(size)
product of any aluminum electrolytic at a somewhat
higher price. An additional ceramic capacitor in parallel
with OS-CON capacitors is recommended to reduce the
inductance effects.
In surface mount applications multiple capacitors may
need to be used in parallel to meet the ESR, RMS current
handling and load step requirements of the application.
Aluminum electrolytic, dry tantalum and special polymer
capacitors are available in surface mount packages. Special
polymer capacitors offer very low ESR but have lower
storage capacity per unit volume than other capacitor
types. These capacitors offer a very cost-effective output
capacitor solution and are an ideal choice when combined
with a controller having high loop bandwidth. Tantalum
capacitors offer the highest capacitance density and are
often used as output capacitors for switching regulators
having controlled soft-start. Several excellent surge-tested
choices are the AVX TPS, AVX TPSV or the KEMET T510
series of surface mount tantalums, available in case heights
ranging from 2mm to 4mm. Aluminum electrolytic capacitors can be used in cost-driven applications providing that
consideration is given to ripple current ratings, temperature
and long term reliability. A typical application will require
several to many aluminum electrolytic capacitors in parallel. A combination of the above mentioned capacitors will
often result in maximizing performance and minimizing
overall cost. Other capacitor types include Nichicon PL
series, Sanyo POSCAP, NEC Neocap, Cornell Dubilier ESRE
and Sprague 595D series. Consult manufacturers for other
specific recommendations.
Top MOSFET Driver Supply
(CB, DB in the Functional Diagram)
An external bootstrap capacitor, CB, connected to the
BOOST pin supplies the gate drive voltage for the topside
MOSFET. This capacitor is charged through diode DB from
DRVCC when the switch node is low. Note that the average
voltage across CB is approximately DRVCC. When the top
MOSFET turns on, the switch node rises to VIN and the
BOOST pin rises to approximately VIN + DRVCC. The boost
capacitor needs to store about 100 times the gate charge
required by the top MOSFET. In most applications 0.1μF
to 0.47μF is adequate.
Discontinuous Mode Operation and FCB Pin
The FCB pin determines whether the bottom MOSFET
remains on when current reverses in the inductor. Tying
this pin above its 2.3V threshold (typically to VCC) enables
discontinuous operation where the bottom MOSFET turns
off when inductor current reverses. The load current at
which current reverses and discontinuous operation begins
depends on the amplitude of the inductor ripple current
and the ripple current depends on the choice of inductor
value and operating frequency as well as the input and
output voltages.
Tying the FCB pin below 1.9V forces continuous synchronous operation, allowing current to reverse at light loads
and maintaining high frequency operation.
Besides providing a logic input to force continuous operation, the FCB pin acts as the input for external clock
synchronization. Upon detecting the presence of an external clock signal, channel 1 will lock on to this external
clock and this will be followed by channel 2 (see PLL and
Frequency Synchronization).
The LTC3708 defaults to forced continuous mode when
sychronized to an external clock or when the PGOOD
signal is low.
Fault Conditions: Current Limit
The maximum inductor current is inherently limited in a
current mode controller by the maximum sense voltage.
In the LTC3708, the maximum sense voltage is controlled
by the voltage on the VRNG pin. With valley current control,
the maximum sense voltage and the sense resistance
determine the maximum allowed inductor valley current.
The corresponding output current limit is:
ILIMIT =
VSNS(MAX )
RDS(ON) • ρT
+
1
• ΔIL
2
3708fb
17
LTC3708
APPLICATIONS INFORMATION
Caution should be used when setting the current limit based
upon the RDS(ON) of the MOSFETs. The maximum current
limit is determined by the minimum MOSFET on-resistance.
Data sheets typically specify nominal and maximum values
for RDS(ON), but not a minimum. A reasonable assumption
is that the minimum RDS(ON) lies the same amount below
the typical value as the maximum lies above it. Consult the
MOSFET manufacturer for further guidelines.
For a more accurate current limiting, a sense resistor
can be used. Sense resistors in the 1W power range can
be easily available in the 5%, 2% or 1% tolerance. The
temperature coefficient of these resistors is very low,
ranging from ±250ppm/°C to ±75ppm/°C. In this case, the
(RDS(ON) • ρT) product in the above equation can simply
be replaced by the RSENSE value.
2.0
SWITCHING FREQUENCY (MHz)
The current limit value should be checked to ensure that
ILIMIT(MIN) > IOUT(MAX). The minimum value of current
limit generally occurs with the largest VIN at the highest
ambient temperature, conditions which cause the largest
power loss in the converter. Note that it is important to
check for self-consistency between the assumed junction
temperature and the resulting value of ILIMIT , which heats
the junction.
1.5
DROPOUT
REGION
1.0
0.5
0
0
3708 F05
Figure 5. Maximum Switching Frequency vs Duty Cycle
Soft-Start and Latchoff with the RUN/SS Pin
The RUN/SS pin provides a means to shut down the
LTC3708 as well as a timer for soft-start and overcurrent
latchoff.
Pulling the RUN/SS pin below 0.8V shuts down the
LTC3708. Releasing the pin allows an internal 1.2μA internal current source to charge the external capacitor, CSS.
If RUN/SS has been pulled all the way to ground, there is
a delay before starting of about:
Minimum Off Time and Dropout Operation
The minimum off time tOFF(MIN) is the smallest amount of
time that the LTC3708 is capable of turning on the bottom
MOSFET, tripping the current comparator and turning the
MOSFET back off. This time is generally about 270ns.
The minimum off time limit imposes a maximum duty
cycle of tON/(tON + tOFF(MIN)). If the maximum duty cycle
is reached, due to a dropping input voltage for example,
then the output will drop out of regulation. The minimum
input voltage to avoid dropout is:
VIN(MIN) = VOUT
tON + tOFF(MIN)
tON
A plot of maximum frequency vs duty cycle is shown in
Figure 5.
1.0
0.25
0.50
0.75
DUTY CYCLE (VOUT/VIN)
tDELAY =
(
)
1.3V
• C = 1.1s/μF CSS
1.2μA SS
When the RUN/SS voltage reaches the ON threshold
(typically 1.3V), the LTC3708 begins operating with a
clamp on channel 1’s reference voltage. The clamp level
is one threshold voltage below RUN/SS. As the voltage on
RUN/SS continues to rise, channel 1’s reference is raised
at the same rate, achieving monotonic output voltage
soft-start (Figure 6). When RUN/SS rises 0.6V above the
ON threshold, the reference clamp is invalidated and the
internal precision reference takes over. When channel 2 is
tracked to channel 1, soft-start on channel 2 is automatically achieved (see Output Voltage Tracking).
3708fb
18
LTC3708
APPLICATIONS INFORMATION
VIN
3.3V OR 5V
RUN/SS
D1
$V = 0.6V
RUN/SS
RSS*
ON
ON THRESHOLD
CSS
TIME
3708 F07
VOUT1
*OPTIONAL TO OVERRIDE
OVERCURRENT LATCHOFF
Figure 7. RUN/SS Pin Interfacing with Latchoff Defeated
TIME
Output Voltage Tracking
3708 F06
Figure 6. Monotonic Soft-Start Waveforms
Controlled soft-start requires that the timing capacitor, CSS,
be made large enough to guarantee that the output can
track the voltage rise on the RUN/SS pin. The minimum
CSS capacitance can be calculated:
CSS >
R1 + R2 30μA • RSENSE
•
• COUT
R1
VRNG
where R1 and R2 are the feedback resistive dividers
(Functional Diagram), COUT is the output capacitance
and RSENSE is the current sense resistance. When bottom
MOSFET RDS(ON) is used for current sensing, RSENSE should
be replaced with the worst-case RDS(ON)(MAX). Generally,
0.1μF is more than sufficient for CSS.
After the controller has been started and given adequate
time to charge the output capacitor, CSS is used as a shortcircuit timer. After the RUN/SS pin charges above 3V and
if either output voltage falls below 70% of its regulated
value, a short-circuit fault is assumed. A 2μA current then
begins discharging CSS. If the fault condition persists
until the RUN/SS pin drops to 2.5V, the controller turns
off all power MOSFETs, shutting down both channels. The
RUN/SS pin must be actively pulled down to ground in
order to restart operation.
Overcurrent latchoff operation is not always needed or
desired and can prove annoying during troubleshooting.
This feature can be overridden by adding a pull-up current of >5μA to the RUN/SS pin (Figure 7). The additional
current prevents the discharge of CSS during a fault and
also shortens the soft-start period.
The LTC3708 allows the user to program how the second
channel output ramps up and down by means of the TRACK2
pin. Through this pin, the second channel output can be
set up to either coincidently or ratiometrically track the
channel 1 output, as shown in Figure 8.
Similar to RUN/SS, the TRACK2 pin acts as a clamp on
channel 2’s reference voltage. VOUT2 is referenced to the
TRACK2 voltage when the TRACK2 < 0.6V and to the
internal precision reference when TRACK2 > 0.6V.
To implement the tracking in Figure 8a, connect an extra
resistive divider to the output of channel 1 and connect
its midpoint to the TRACK2 pin. The ratio of this divider
should be selected the same as that of channel 2’s feedback
divider (Figure 9a). In this tracking mode, VOUT1 must
be set higher than VOUT2. To implement the ratiometric
tracking in Figure 8b, no extra divider is needed; simply
connect the TRACK2 pin to the VFB1 pin (Figure 9b).
By selecting different resistors, the LTC3708 can achieve
different modes of tracking including the two in Figure 8.
So which mode should be programmed? While either
mode in Figure 8 satisfies most practical applications,
there does exist some trade-off. The ratiometric mode
saves a pair of resistors but the coincident mode offers
better output regulation. This can be better understood
with the help of Figure 10. At the input stage of channel
2’s error amplifier, two common anode diodes are used to
clamp the equivalent reference voltage and an additional
diode is used to match the shifted common mode voltage.
The top two current sources are of the same amplitude. In
the coincident mode, the TRACK2 voltage is substantially
higher than 0.6V at steady state and effectively turns off
3708fb
19
LTC3708
APPLICATIONS INFORMATION
VOUT1
OUTPUT VOLTAGE
OUTPUT VOLTAGE
VOUT1
VOUT2
VOUT2
3708 F08
TIME
TIME
(8a) Coincident Tracking
(8b) Ratiometric Tracking
Figure 8. Two Different Modes of Output Voltage Tracking
VOUT1
VOUT2
R3
R1
TO
VFB1
PIN
TO
TRACK2
PIN
R4
VOUT1
R3
VOUT2
R1
TO
TRACK2
PIN
TO
VFB2
PIN
R2
R4
R3
TO
VFB1
PIN
R2
TO
VFB2
PIN
R4
3708 F09
(9a) Coincident Tracking Setup
(9b) Ratiometric Tracking Setup
Figure 9. Setup for Coincident and Ratiometric Tracking
⎛ R1 VOUT1
R3 VOUT 2 ⎞
⎜⎝ R2 = 0.6 − 1, R4 = 0.6 − 1⎟⎠
I
I
+
D1
D2
EA2
TRACK2
0.6V
–
D3
VFB2
3708 F10
I-V characteristic of the diodes, it does impose a finite
amount of output voltage deviation. Further, when channel
1’s output experiences dynamic excursions (under load
transient, for example), channel 2 will be affected as well.
For better output regulation, use the coincident tracking
mode instead of ratiometric.
Figure 10. Equivalent Input Circuit of
Error Amplifier of Channel 2
The number of resistors in Figure 9a can be further reduced
with the scheme in Figure 11.
D1. D2 and D3 will therefore conduct the same current
and offer tight matching between VFB2 and the internal
precision 0.6V reference. In the ratiometric mode, however,
TRACK2 equals 0.6V even at steady state. D1 will divert
part of the bias current and make VFB2 slightly lower than
0.6V. Although this error is minimized by the exponential
In a system that requires more than two tracked supplies,
multiple LTC3708s can be daisy-chained through the
TRACK1 pin. TRACK1 clamps channel 1’s reference in the
same manner TRACK2 clamps channel 2. To eliminate the
possibility of multiple LTC3708s coming on at different
times, only the master LTC3708’s RUN/SS pin should be
3708fb
20
LTC3708
APPLICATIONS INFORMATION
connected to a soft-start capacitor. All other LTC3708s
should have their RUN/SS pins pulled up to VCC with a
resistor between 50k and 300k. Figure 12 shows the circuit
with four outputs. Three of them are programmed in the
coincident mode while the fourth one tracks ratiometrically.
If output tracking is not needed, connect the TRACK pins
to VCC. Do Not Float These Pins.
Although all dissipative elements in the circuit produce
losses, four main sources account for most of the losses
in LTC3708 circuits:
VOUT2
R1
R4
R2
R5
TO VFB2 PIN
TO TRACK2 PIN
1. DC I2R Losses. These arise from the resistances of the
MOSFETs, inductor and PC board traces and cause the
efficiency to drop at high output currents. In continuous
mode, the average output current flows through L, but is
chopped between the top and bottom MOSFETs. If the two
MOSFETs have approximately the same RDS(ON), then the
resistance of one MOSFET can simply be summed with the
resistances of L and the board traces to obtain the DC I2R
loss. For example, if RDS(ON) = 0.01Ω and RL = 0.005Ω,
the loss will range from 15mW up to 1.5W as the output
current varies from 1A to 10A.
TO VFB1 PIN
R3
3708 F11
Figure 11. Alternative Setup for Coincident Tracking
⎛ R1+ R2 VOUT1
R1
R4 VOUT 2 ⎞
⎜⎝ R3 = 0.6 – 1, R2 + R3 = R5 = 0.6 − 1⎟⎠
TRACK1 TRACK2
TO VCC
VOUT1
R4
R5
LTC3708
“MASTER”
R1
VFB1
R2
R2
R2
VOUT2
R3
VFB2
RUN/SS
VOUT1
R2
CSS
TO VCC
VOUT3
R4
100k
TRACK1 TRACK2
LTC3708
“SLAVE”
VFB1
R2
RUN/SS
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement.
VOUT4
OUTPUT VOLTAGE
VOUT1
Efficiency Considerations
VOUT3
VOUT4
R5
VOUT2
VFB2
R2
3708 F12
TIME
(12a) Circuit Setup
(12b) Output Voltage
Figure 12. Four Outputs with Tracking and Ratiometric Sequencing
⎛ R1 VOUT1
R5 VOUT 4 ⎞
R3 VOUT 2
R4 VOUT 3
⎜⎝ R2 = 0.6 − 1, R2 = 0.6 − 1, R2 = 0.6 − 1, R2 = 0.6 − 1⎟⎠
3708fb
21
LTC3708
APPLICATIONS INFORMATION
2. Transition Loss. This loss arises from the brief amount
of time the top MOSFET spends in the saturated region
during switch node transitions. It depends upon the input
voltage, load current, driver strength and MOSFET capacitance, among other factors. The loss is significant at input
voltages above 20V and can be estimated from:
Transition Loss ≈
(0.5) • VIN2 • IOUT • CRSS • f •
⎛
1
1 ⎞
RDS(ON)_ DRV ⎜
+
⎟
⎝ DRVCC − VGS(TH) VGS(TH) ⎠
3. DRVCC and VCC Current. This is the sum of the MOSFET
driver and control currents. The driver current supplies the
gate charge QG required to switch the power MOSFETs.
This current is typically much larger than the control circuit
current. In continuous mode operation:
IGATECHG = f(QG(TOP) + QG(BOT))
4. CIN Loss. The input capacitor has the difficult job of
filtering the large RMS input current to the regulator. It
must have a very low ESR to minimize the AC I2R loss and
sufficient capacitance to prevent the RMS current from
causing additional upstream losses in fuses or batteries.
The LTC3708 2-phase architecture typically halves this CIN
loss over the single phase solutions.
Other losses, including COUT ESR loss, Schottky conduction loss during dead time and inductor core loss generally
account for less than 2% additional loss.
When making any adjustments to improve efficiency, the
final arbiter is the total input current for the regulator at
your operating point. If you make a change and the input
current decreases, then you improve the efficiency. If there
is no change in input current, then there is no change in
efficiency.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to ΔILOAD (ESR), where ESR is the effective series
resistance of COUT . ΔILOAD also begins to charge or discharge COUT generating a feedback error signal used by the
regulator to return VOUT to its steady-state value. During
this recovery time, VOUT can be monitored for overshoot
or ringing that would indicate a stability problems. The
ITH pin external components shown in Figure 13 will provide adequate compensation for most applications. For a
detailed explanation of switching control loop theory see
Linear Technology Application Note 76.
Design Example
As a design example, take a supply with the following
specifications: VIN = 7V to 28V (15V nominal), VOUT1
= 2.5V, VOUT2 = 1.8V, IOUT1(MAX) = IOUT2(MAX) = 10A,
f = 500kHz and VOUT2 to track VOUT1.
First calculate the timing resistor:
RON1 =
2.5V
= 714k
(0.7V)(500kHz)(10pF )
Select a standard value of 715k.
RON2 =
1.8 V
= 514k
(0.7V)(500kHz)(10pF )
Select a standard value of 511k.
Next, choose the feedback resistors:
R1 2.5V
=
– 1 = 3.17
R2 0.6 V
Select R1 = 31.6k, R2 = 10k.
R3 1.8 V
=
– 1= 2
R4 0.6 V
Select R3 = 20k, R4 = 10k.
For VOUT2 to coincidently track VOUT1 at start-up, connect
an extra pair of R3 and R4 across VOUT1 with its midpoint
tied to the TRACK2 pin.
3708fb
22
LTC3708
APPLICATIONS INFORMATION
Third, design the inductors for about 40% ripple current
at the maximum VIN:
L1 =
2.5V
⎛ 2.5V ⎞
⎜ 1–
⎟ = 1.1μH
(500kHz)(0.4)(10A) ⎝ 28V ⎠
A standard 1μH inductor will result in 45% of ripple current
(4.5A) at worst case.
L2 =
1.8 V
⎛ 1.8 V ⎞
⎜ 1–
⎟ = 0.8 μH
(500kHz)(0.4)(10A) ⎝ 28V ⎠
L2 can also use 1μH to save some BOM (Bill of Material)
cost; the resulting ripple current is 3.4A.
The selection of MOSFETs is simplified by the fact that both
channels have the same maximum output current. Select
the top and bottom MOSFETs for one channel and the
same MOSFETs can be used for the other. Take channel 1
for calculation and begin with the bottom synchronous
MOSFET. As stated previously in the Power MOSFET Selection section, the major criterion in selecting the bottom
MOSFET is low RDS(ON). Choose an Si4874 for example:
RDS(ON) = 0.0083Ω (nom) 0.010Ω (max), θJA = 40°C/W.
The nominal sense voltage is:
VSNS(NOM) = (10A)(1.3)(0.0083) = 108mV
Tying VRNG1 to 1.1V will set the current sense voltage
range for a nominal value of 110mV with the current
limit occurring at 146mV. To check if the current limit is
acceptable, assume a junction temperature of about 80°C
above a 70°C ambient with ρ150°C = 1.5:
ILIMIT ≥
146mV
1
+ (4.1A ) = 11.8 A
(1.5)(0.010Ω) 2
and double check the assumed TJ in the MOSFET:
PBOT =
28 V – 2.5V
2
11.8 A ) (1.5)(0.010Ω) = 1.9W
(
28 V
TJ = 70°C + (1.90W)(40°C/W) = 146°
Because the top MOSFET is on for only a short time,
an Si4884 will be sufficient: RDS(ON) = 0.0165Ω (max),
CRSS = 190pF, VGS(TH) = 1V, θJA = 42°C/W. Checking its
power dissipation at current limit with ρ130°C = 1.6:
2.5V
2
2
11.8 A ) (1.6)(0.0165Ω) + (0.5)(28 V )
(
28 V
(11.8A)(190pF )(500kHz)(2Ω)⎛⎜⎝ 5V 1– 1V + 11V ⎞⎟⎠
= 0.33W + 1.10W = 1.43W
PTOP =
TJ = 70°C + (1.43W)(42°C/W) = 130°
The junction temperatures for both top and bottom
MOSFETs will be significantly less at nominal current, but
the above analysis shows that careful attention to PCB
layout and heat sinking will be necessary in this circuit.
The same MOSFETs (Si4874 and Si4884) can be used
for channel 2.
Finally, an input capacitor is chosen for an RMS current
rating of about 5A at 85°C and the output capacitors are
chosen for a low ESR of 0.013Ω to minimize output voltage changes due to inductor ripple current and load steps.
The ripple voltage will be only:
⎛
⎞
1
ΔVOUT1(RIPPLE) = ΔIL1 • ⎜ ESR +
⎟
⎝
8 • f • COUT ⎠
⎛
⎞
1
= 4.5A • ⎜ 0.013Ω +
⎟
8 • 500kHz • 470μF ⎠
⎝
= 60mV
⎛
⎞
1
ΔVOUT2(RIPPLE) = ΔIL2 • ⎜ ESR +
⎟
⎝
8 • f • COUT ⎠
⎛
⎞
1
= 3.4A • ⎜ 0.013Ω +
⎟
8 • 500kHz • 470μF ⎠
⎝
= 46mV
However, a 0A to 10A load step will cause an output
change of up to:
ΔVOUT(STEP) = ΔILOAD(ESR) = (10A)(0.013Ω) = 130mV
An optional 22μF ceramic output capacitor is included
to minimize the effect of ESL in the output ripple. The
complete circuit is shown in Figure 13.
3708fb
23
LTC3708
APPLICATIONS INFORMATION
VIN
7V TO 28V
CIN
10μF
35V
s4
BAT54A
5V
+
10Ω
4.7μF
1μF
BOOST2
VCC
PGND1
17
4
31
21
VCC TRACK1 FCB DRVCC
27
TG1
TG2
28
BOOST2
BOOST1
0.22μF 26
SW2
SW1
25
SENSE2+
SENSE1+
22
BG1 LTC3708EUH BG2
24
SENSE2–
SENSE1–
23
PGND1
PGND2
32
VRNG2
VRNG1
VRNG2
29
ION1
ION2
3
VFB2
VFB1
6
TRACK2
PWRGD
9
EXTLPF
INTLPF
0.01μF
2
ITH1
ITH2
1μF
1μF
VOUT1
2.5V
10A
22μF
6.3V
X7R
L1
1μH
+
COUT1
470μF
4V
B340A
M1
M3
PGND1
20k
1%
56pF
10k
1%
31.6k
1%
VIN
R2
10k
1%
715k
RUN/SS
100pF
20k
680pF
1
SGND
5
0.1μF
14
13 BOOST2
M2
L2
1μH
0.22μF
15
16
+
20
B340A
M4
VOUT1
1.8V
10A
COUT2
470μF
4V
22μF
6.3V
X7R
18
19
11
511k
12
7
30
10
8
39k
VIN VCC
20k
1%
56pF 5V
100k
PGOOD
10k
11k
20k
100pF
680pF
10k
1%
0.022μF
0.01μF
1nF
3708 F13
CIN: UNITED CHEMI-CON THCR60EIH106ZT
COUT1, COUT2: SANYO POSCAP 4TPD470M
L1, L2: SUMIDA CEP125-1R0M
M1, M2: VISHAY Si4884
M3, M4: VISHAY Si4874
Figure 13. Design Example: 2.5V/10A and 1.8V/10A at 500kHz with Output Tracking
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3708. These items are also illustrated graphically in
Figure 14. Figure 15 further shows the current waveforms
present in the various branches of the 2-phase synchronous
Buck regulators operating in the continuous mode.
• Place the loop of M1, M3 and CIN1 in a compact area.
This loop conducts high pulsating current and its area
needs to be minimized. Place M2, M4 and CIN2 in the
same way.
• Place CIN1 and CIN2 within the distance of 1cm. Longer
distance may cause a large resonant loop.
• Connect the negative plates of COUT1 and CDR1 to PGND1
before it joins PGND2 at the ground plane. Connect
COUT2 and CDR2 in the same way so that power grounds
are separated before they meet at a single point.
• Cover the board area under the LTC3708 with a SGND
plane. For the LTC3708EUH, solder the back of the IC
to this plane. Separate SGND from the power ground
and connect all signal components (ITH, VFB, ION, VCC,
EXTLPF, INTLPF, VRNG, TRACK and RUN/SS) to the
SGND plane before it joins PGND. Connect SGND to
the gound plane at a single point.
• Run SENSE+ and SENSE– across the bottom MOSFET
(or RSENSE when a separate current sensing resistor
is used) with Kelvin connection (Figure 16). Route
SENSE+ and SENSE– together with minimum PC trace
separation. The filter capacitor (when used) between
SENSE+ and SENSE– should be as close to the LTC3708
as possible.
• Keep the high dV/dt nodes SW, TG and BOOST away
from sensitive small-signal nodes.
3708fb
24
LTC3708
APPLICATIONS INFORMATION
RON1
FCB
TG1
R1
PGOOD
VFB1
R3
SW1
ITH1
BOOST
ION1
CB1
COUT1
SENSE1+ EXTLPF
D1
L1
SENSE1– TRACK1
PGND1
VRNG1
M3
CDR1
CIN1
VIN
CIN2
CVCC
LTC3708
DRVCC
5V
SGND
CDR2
BG2
M2
5V
VCC
BG1
M1
M4
PGND2
CSS
RUN/SS
VRNG2
SENSE2– TRACK2
L2
D2
SENSE2+
COUT2
INTLPF
BOOST2
ION2
SW2
ITH2
TG2
VFB2
CB2
R4
R2
RON2
3708 F15
Figure 14. LTC3708 Layout Diagram
• Connect the decoupling capacitors CDR1 and CDR2
close to the DRVCC and PGND pins. Connect CB1 and
CB2 close to the BOOST and SW pins.
• Connect the decoupling capacitor CVCC right across the
VCC pin and SGND plane. Connect the EA compensation
components close to the ITH pins. Connect the PLL loop
filter close to the EXTLPF and INTLPF pins. Connect the
ION decoupling capacitor close to the ION pins.
• Flood all unused areas on all layers with copper.
Flooding will reduce the temperature rise of the power
components. You can connect the copper area to any
DC net (VIN, VOUT , GND or to any other DC rail in your
system).
3708fb
25
LTC3708
APPLICATIONS INFORMATION
SW1
L1
D1
VOUT1
COUT1
+
RL1
CERAMIC
VIN
RIN
CIN
+
SW2
L2
D2
BOLD LINES INDICATE
HIGH, SWITCHING
CURRENT LINES.
KEEP LINES TO A
MINIMUM LENGTH.
VOUT2
COUT2
+
RL2
CERAMIC
3708 F15
Figure 15. Branch Current Waveforms
D
G
D
S
D
S
D
S
RSENSE
MOSFET
SENSE+ SENSE–
SENSE+ SENSE–
(16a) Sensing the Bottom MOSFET
3708 F16
(16b) Sensing a Resistor
Figure 16. Kelvin Sensing
3708fb
26
LTC3708
APPLICATIONS INFORMATION
5V
10Ω
1μF
4.7μF
DB1
B340LA
M3
19.1k
1%
VIN
6.04k
1%
CB1
0.1μF
6.04k
1%
15k
470pF
1000pF
3.32k
470pF
LTC3708
150pF
CSS
0.1μF
L2
1.22μH
+
B340LA
M4
BG2
SENSE2–
PGND2
VFB1
VFB2
TRACK2
FCB
ION1
ION2
ITH1
ITH2
INTLPF
EXTLPF
RUN/SS
TRACK1
VRNG2
SGND
VRNG1
0.01μF
M2
CB2
0.1μF
SW2
SENSE2+
SW1
SENSE1+
SENSE1–
PGND1
RON1
1.5M
DB2
VCC
DRVCC PGOOD
TG1
TG2
BOOST2
BOOST1
BG1
56pF
100k
+
VOUT1
2.5V
15A COUT1 +
330μF
4V
s2
12.1k
1%
M1
L1
1.43μH
VIN
7V TO 24V
CIN
10μF
25V
s6
COUT2
470μF
2.5V
s2
VOUT2
1.8V
15A
12.1k
1%
FREQ = 220kHz
fIN
VIN
RON2
1.1M
475Ω
130k
24.9k
1000pF
5V
0.047μF
6.04k
1%
15k
150pF
1000pF
470pF
3708 F17
COUT1: SANYO POSCAP 4TPD330M
COUT2: SANYO POSCAP 2R5TPD470M
CIN: TAIYO YUDEN: TMK325BJ106KM
DB1, DB2: CMDSH-3
L1: PANASONIC ETQP3H1R4BF
L2: PANASONIC ETQP2H1R2BF
M1, M2: RENESAS HAT2168H
M3, M4: RENESAS HAT2165H
Figure 17. High Efficiency, Dual Output Power Supply with External Frequency Synchronization
3708fb
27
28
+
VIN
RUN/SS
SGND
GND
1.8V
6A
GND
9V TO 20V
10k
1%
30.1k
1%
COUT1
470μF
2.5V
100pF
6.04k
1%
100pF
B240A
L1
2.2μH
C1
10μF
25V
12.1k
1%
C2
10μF
25V
10k
59k
VIN
VCC
Si4860DY
Si4860DY
1.2M
0Ω
0Ω
BOOST1
1nF
15k
150pF
100pF
0.22μF
0Ω
BOOST2
BAT54A
1nF
*
1μF
VCC
10Ω
VCC
5V
1M
VIN
SW2
SENSE2+
*
VFB2
PWRGD
INTLPF
ITH2
SGND
ION2
SENSE2–
BG2
PGND2
VRNG2
0.1μF
VFB1
TRACK2
EXTLPF
ITH1
RUN/SS
ION1
SENSE1–
BG1
PGND1
VRNG1
TG2
BOOST2
LTC3708EUH
SENSE1+
SW1
BOOST1
TG1
VCC TRACK1 FCB DRVCC
2.2μF
6.3V
X5R
5V
15k
1nF
100pF
VIN
VCC
10nF
9.09k
604k
0Ω
0Ω
BOOST2
470pF
10k
30.9k
Si4860DY
B240A
Si4860DY
10k
1%
L2
2.2μH
C3
10μF
25V
3708 TA03
10k
1%
100pF
B240A
*SIGNAL GROUND, ROUTED SEPARATELY
COUT1, COUT2: SANYO 2R5TPD470M
C1 TO C4: TAIYO YUDEN TMK325BJ106MM
L1, L2: SUMIDA CDEP105-2R2MC-88
1nF
150pF
0.22μF
0Ω
2.2μF
2.2μF
DDR II Supplies with Transient Coupling
+
5V
0.9V
±4A
100k
PGOOD
COUT2
470μF
2.5V
GND
C4
10μF
25V
LTC3708
TYPICAL APPLICATIONS
3708fb
LTC3708
TYPICAL APPLICATIONS
Dual-Phase, 30A Power Supply with 10mV Output Ripple
VIN
5V
+
CIN1
100μF
6.3V
CIN2-CIN7
4.7μF
6.3V s6
TRACK
BAT54A
1μF
PGND1
10Ω
1μF
BOOST2
VCC
1μF
VOUT
1V
30A
COUT1
1μF
6.3V
M1
L1
0.19μH
+
0.22μF
PGND2
VCC TRACK1 FCB DRVCC
TG1
TG2
BOOST2
BOOST1
SW1
B340A
M3
100k
R1 VCC
10k
0.1%
274k
VIN
LTC3708
BG2
PGND1
PGND2
VRNG1
VRNG2
RUN/SS
0.01μF
1000pF
220pF
CIN1: SANYO OS-CON 6SVP100M
COUT3, COUT4: SANYO POSCAP 2R5TPD470M
L1, L2: PANASONIC ETQP4LR19
M1 TO M4: RENESAS HAT2165
22.1k
VRNG1
B340A
M4
COUT4
470μF
2.5V s2
+
COUT2
1μF
6.3V
VIN
274k
VIN
ION2
VFB2
PWRGD
INTLPF
ITH2
100k
PGOOD
1nF
SGND
220pF
100k
VCC
22k
100pF
SENSE2–
SENSE1–
ION1
VFB1
TRACK2
EXTLPF
ITH1
R2
15k
0.1%
L2
0.19μH
0.22μF
SW2
BG1
100pF
M2
SENSE2+
SENSE1+
COUT3
470μF
2.5V s2
BOOST2
10k
0.01μF
0.01μF
3708 TA05
3708fb
29
LTC3708
TYPICAL APPLICATIONS
12V/12A and 5V/12A at 300kHz Application
VIN
20V TO 28V
+
100μF
50V
C1
3.3μF
50V
X5R
C2
3.3μF
50V
X5R
5V
BAT54A
BOOST1
BOOST2
10Ω
5V
VCC
C3
3.3μF
50V
X5R
C4
3.3μF
50V
X5R
C6
1μF V TRACK1 FCB DRV
CC
CC
Q1
HAT2167H
0Ω
TG2
TG1
BOOST1
VOUT1
12V
12A
L1
3.5μH
0.1μF
COUT1
150μF
16V
s2
B340LA
22pF
75k
10k
191k
10k
22pF
Q2
HAT2167H
0Ω
100pF
24.9k
SENSE1+
SENSE2+
100pF
BG2
PGND2
VRNG2
ION1
1nF
1nF
88.7k
+
75k
SGND
5V
47pF
100k
5.11k
24.9k
10k
150pF
470pF
1.5nF
0.1μF
COUT2
220μF
6.3V
s2
VOUT2
5V
12A
PGOOD
ITH2
RUN/SS
2.2nF
33.2k
VIN
VCC
D3
B340LA
VFB2
PGOOD
INTLPF
ITH1
150pF
Q4
HAT2167H
2.2M
ION2
VFB1
TRACK2
EXTLPF
0Ω
0Ω
SENSE2–
PGND1
VRNG1
5.6M
L2
2.4μH
0.1μF
SW2
SENSE1–
88.7k VIN
VCC
C6
3.3μF
50V
X5R
BOOST2
LTC3708EUH
BG1
0Ω
Q3
HAT2167H
0Ω
BOOST2
SW1
+
2.2μF
C5
3.3μF
50V
X5R
15k
47pF
22nF
3708 TA04
COUT1: SANYO 16SVP150M
COUT2: SANYO 6TPD220M
C1 TO C6: TDK C4532X5R1H335M
L1: SUMIDA CDEP147-3R5MC-H
L2: SUMIDA CDEP147-2R4MC
3708fb
30
LTC3708
PACKAGE DESCRIPTION
UH Package
32-Lead Plastic QFN (5mm × 5mm)
(Reference LTC DWG # 05-08-1693 Rev D)
0.70 ±0.05
5.50 ±0.05
4.10 ±0.05
3.45 ± 0.05
3.50 REF
(4 SIDES)
3.45 ± 0.05
PACKAGE OUTLINE
0.25 ± 0.05
0.50 BSC
RECOMMENDED SOLDER PAD LAYOUT
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
5.00 ± 0.10
(4 SIDES)
BOTTOM VIEW—EXPOSED PAD
0.75 ± 0.05
R = 0.05
TYP
0.00 – 0.05
PIN 1 NOTCH R = 0.30 TYP
OR 0.35 s 45° CHAMFER
R = 0.115
TYP
31 32
0.40 ± 0.10
PIN 1
TOP MARK
(NOTE 6)
1
2
3.50 REF
(4-SIDES)
3.45 ± 0.10
3.45 ± 0.10
(UH32) QFN 0406 REV D
0.200 REF
NOTE:
1. DRAWING PROPOSED TO BE A JEDEC PACKAGE OUTLINE
M0-220 VARIATION WHHD-(X) (TO BE APPROVED)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
0.25 ± 0.05
0.50 BSC
3708fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
31
LTC3708
TYPICAL APPLICATION
Area = 650mm2, Height = 3mm
VIN
7V TO 24V
5V
BAT54A
2.2μF
6.3V
BOOST1
BOOST2
5V
10Ω
1μF
VCC
C9
10μF
25V
1μF
Q1A
Si4816BDY
VCC TRACK1 FCB DRVCC
TG1
C16
100μF
6.3V
L1
1.8μH
0.1μF
BOOST2
Q1B
Si4816BDY
20k
31.6k
100k
SENSE2+
SENSE1–
VIN
VCC
SENSE2–
PGND1
VRNG1
PGND2
VRNG2
ION1
10k
10k
150pF
220pF
VIN
VCC
1000pF
20k
220pF
560pF
100k
5.11k
20k
10k
150pF
470pF
560pF
0.1μF
5V
PGOOD
ITH2
RUN/SS SGND SGND
20k
100k
VFB2
PGOOD
INTLPF
ITH1
20k
VOUT2
1.8V
5A
C15
100μF
6.3V
+
750k
ION2
1000pF
VFB1
TRACK2
EXTLPF
C13
150μF
4V
Q2B
Si4816BDY
BG2
BG1
1M
220pF
L2
1.8μH
0.1μF
SW2
SENSE1+
C1
150μF
4V
BOOST2
LTC3708EUH
SW1
+
Q2A
Si4816BDY
TG2
BOOST1
VOUT1
2.5V
5A
C11
10μF
25V
1μF
220pF
22nF
15k
3708 TA06
SGND
VIN
RUN/SS
BAT54W
C1, C13: SANYO 4TPE150MAZB
C9, C11: TAIYO YUDEN TMK325BJ106KM
C15, C16: TDK C3225X5R0J107M
L1, L2: TOKO FDV0630-1R8M
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
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LTC3709
2-Phase, No RSENSE Step-Down Controller with Tracking/Sequencing
Single Output, Remote Sensing
LTC3728
Dual, 550kHz, 2-Phase Synchronous Step-Down Switching Regulator
Fixed Frequency, Dual Output
LTC3729
550kHz, PolyPhase®, High Efficiency, Synchronous Step-Down
Switching Regulator
Fixed Frequency, Single Output, Up to 12-Phase Operation
LTC3731
3-Phase, 600kHz, Synchronous Buck Switching Regulator Controller
3-Phase, Single Output
LTC3778
Wide Operating Range, No RSENSE Step-Down Controller
Single Channel, Separate VON Programming
PolyPhase is a registered trademark of Linear Technology Corporation
3708fb
32 Linear Technology Corporation
LT 1207 REV B • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2006