Estek MAX810XTR 3-pin microprocessor reset monitor Datasheet

MAX809, MAX810
3-Pin Microprocessor
Reset Monitors
The MAX809 and MAX810 are cost–effective system supervisor
circuits designed to monitor VCC in digital systems and provide a reset
signal to the host processor when necessary. No external components
are required.
The reset output is driven active within 20 µsec of VCC falling
through the reset voltage threshold. Reset is maintained active for a
minimum of 140msec after VCC rises above the reset threshold. The
MAX810 has an active–high RESET output while the MAX809 has
an active–low RESET output. The output of the MAX809 is
guaranteed valid down to VCC = 1V. Both devices are available in a
SOT–23 package.
The MAX809/810 are optimized to reject fast transient glitches on
the VCC line. Low supply current of 17µA (VCC = 3.3V) makes these
devices suitable for battery powered applications.
SOT–23
(TO–236)
CASE 318
PIN CONFIGURATION
(Top View)
Features
• Precision VCC Monitor for 3.0V, 3.3V, and 5.0V Supplies
• 140msec Guaranteed Minimum RESET, RESET
•
•
•
•
•
•
GND
Output Duration
RESET Output Guaranteed to VCC = 1.0V (MAX809)
Low 17µA Supply Current
VCC Transient Immunity
Small SOT–23 Package
No External Components
Wide Operating Temperature: –40°C to 85°C
3
RESET
(RESET)**
ORDERING INFORMATION
Device
VCC
RESET
GND
2
NOTE: *SOT–23 is equivalent to JEDEC (TO–236)
** RESET is for MAX809
** RESET is for MAX810
TYPICAL APPLICATION DIAGRAM
MAX809
VCC
SOT–23*
Typical Applications
• Computers
• Embedded Systems
• Battery Powered Equipment
• Critical µP Power Supply Monitoring
VCC
1
VCC
PROCESSOR
Package
Shipping
MAX809xTR
SOT–23
3000 Tape/Reel
MAX810xTR
SOT–23
3000 Tape/Reel
NOTE: The ”x” denotes a suffix for VCC threshold –
see table below
RESET
INPUT
Suffix
GND
L
M
J*
T
S
R
Reset VCC Threshold (V)
4.63
4.38
4.00
3.08
2.93
2.63
NOTE: *J version is available for MAX809 only
1
MAX809, MAX810
MAX809, MAX810
ABSOLUTE MAXIMUM RATINGS*
Symbol
Parameter
Supply Voltage (VCC to GND)
Unit
6.0
V
–0.3 to (VCC + 0.3)
V
Input Current, VCC
20
mA
Output Current, RESET, RESET
20
mA
dV/dt (VCC)
100
V/µsec
Power Dissipation (TA ≤ 70°C)
SOT–23 (derate 4mW/°C above +70°C)
230
RESET, RESET
PD
Value
mW
TA
Operating Temperature Range
–40 to +85
°C
Tstg
Storage Temperature Range
–65 to +150
°C
Tsol
Lead Temperature (Soldering, 10 Seconds)
+260
°C
* Maximum Ratings are those values beyond which damage to the device may occur.
2
MAX809, MAX810
MAX809, MAX810
ELECTRICAL CHARACTERISTICS (VCC = Full Range, TA = –40°C to +85°C unless otherwise noted. typical values are at TA
= +25C, VCC = 5V for L/M/J, 3.3V for T/S, 3.0V for R) (Note NO TAG)
Characteristic
Min
Typ
Max
VCC Range
TA = 0°C to +70°C
TA = –40°C to +85°C
1.0
1.2
—
—
5.5
5.5
Supply Current
MAX8xxL/M/J: VCC < 5.5V
MAX8xxR/S/T: VCC < 3.6V
—
—
24
17
60
50
4.56
4.50
4.31
4.25
3.93
3.89
3.04
3.00
2.89
2.85
2.59
2.55
4.63
—
4.38
—
4.00
—
3.08
—
2.93
—
2.63
—
4.70
4.75
4.45
4.50
4.06
4.10
3.11
3.15
2.96
3.00
2.66
2.70
Reset Threshold Temperature Coefficient
—
30
—
ppm/°C
VCC to Reset Delay VCC = VTH to (VTH – 100mV)
—
20
—
µsec
140
240
560
msec
—
—
—
—
—
—
0.3
0.4
0.3
0.8 VCC
VCC – 1.5
—
—
—
—
—
—
—
—
0.3
0.4
0.8 VCC
—
—
Symbol
ICC
VTH
V
µA
Reset Threshold (Note NO TAG)
MAX8xxL: TA = 25°C
TA = –40°C to +85°C
MAX8xxM: TA = 25°C
TA = –40°C to +85°C
MAX809J: TA = 25°C
TA = –40°C to +85°C
MAX8xxT: TA = 25°C
TA = –40°C to +85°C
MAX8xxS: TA = 25°C
TA = –40°C to +85°C
MAX8xxR: TA = 25°C
TA = –40°C to +85°C
V
Reset Active Timeout Period
VOL
RESET Output Voltage Low (MAX809)
MAX809R/S/T: VCC = VTH min, ISINK = 1.2mA
MAX809L/M/J: VCC = VTH min, ISINK = 3.2mA
VCC > 1.0V, ISINK = 50µA
VOH
V
RESET Output Voltage High (MAX809)
MAX809R/S/T: VCC > VTH max, ISOURCE = 500µA
MAX809L/M/J: VCC > VTH max, ISOURCE = 800µA
VOL
V
RESET Output Voltage Low (MAX810)
MAX810R/S/T: VCC = VTH max, ISINK = 1.2mA
MAX810L/M/J: VCC = VTH max, ISINK = 3.2mA
VOH
Unit
V
RESET Output Voltage High (MAX810)
1.8 < VCC < VTH min, ISOURCE = 150µA
V
1. Production testing done at TA = 25°C, over temperature limits guaranteed by design.
PIN DESCRIPTION
ÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
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ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
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ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Pin No.
Symbol
Description
1
GND
2
RESET (MAX809)
RESET output remains low while VCC is below the reset voltage threshold, and for 240msec (typ.)
after VCC rises above reset threshold
2
RESET (MAX810)
RESET output remains high while VCC is below the reset voltage threshold, and for 240msec (typ.)
after VCC rises above reset threshold
3
VCC
Ground
Supply Voltage (typ.)
3
MAX809, MAX810
MAX809, MAX810
APPLICATIONS INFORMATION
VCC Transient Rejection
hold the output low (Figure 2). This resistor value, though
not critical, should be chosen such that it does not
appreciably load RESET under normal operation (100kW
will be suitable for most applications). Similarly, a pull–up
resistor to VCC is required for the MAX810 to ensure a valid
high RESET for VCC below 1.0V.
The MAX809/810 provides accurate VCC monitoring and
reset timing during power–up, power–down, and
brownout/sag conditions, and rejects negative–going
transients (glitches) on the power supply line. Figure 1
shows the maximum transient duration vs. maximum
negative excursion (overdrive) for glitch rejection. Any
combination of duration and overdrive which lies under the
curve will not generate a reset signal. Combinations above
the curve are detected as a brownout or power–down.
Transient immunity can be improved by adding a capacitor
in close proximity to the VCC pin of the MAX809/810.
VCC
VCC
MAX809
RESET
VCC
R1
100 k
GND
VTH
Overdrive
Figure 2. Ensuring RESET Valid to VCC = 0 V
MAXIMUM TRANSIENT DURATION ( m sec)
Duration
Processors With Bidirectional I/O Pins
400
TA = +25° C
Some µP’s (such as Motorola 68HC11) have
bi–directional reset pins. Depending on the current drive
capability of the processor pin, an indeterminate logic level
may result if there is a logic conflict. This can be avoided
by adding a 4.7kW resistor in series with the output of the
MAX809/810 (Figure 3). If there are other components in
the system which require a reset signal, they should be
buffered so as not to load the reset line. If the other
components are required to follow the reset I/O of the µP, the
buffer should be connected as shown with the solid line.
320
240
160
MAX8xxL/M/J
90
MAX8xxR/S/T
0
1
10
100
1000
RESET COMPARATOR OVERDRIVE,
(VTH – VCC (mV)
BUFFER
BUFFERED RESET
TO OTHER SYSTEM
COMPONENTS
VCC
Figure 1. Maximum Transient Duration vs. Overdrive
for Glitch Rejection at 25° C
VCC
MAX809
RESET Signal Integrity During Power–Down
47 k
The MAX809 RESET output is valid to VCC = 1.0V.
Below this voltage the output becomes an ”open circuit” and
does not sink current. This means CMOS logic inputs to the
µP will be floating at an undetermined voltage. Most digital
systems are completely shutdown well above this voltage.
However, in situations where RESET must be maintained
valid to VCC = 0V, a pull–down resistor must be connected
from RESET to ground to discharge stray capacitances and
RESET
GND
VCC
mP
RESET
GND
Figure 3. Interfacing to Bidirectional Reset I/O
4
MAX809, MAX810
MAX809, MAX810
TYPICAL CHARACTERISTICS
35
30
VCC = 5 V
VCC = 5 V
25
SUPPLY CURRENT ( mA)
SUPPLY CURRENT ( mA)
30
25
20
VCC = 3 V
15
10
20
10
0
–40
–20
0
20
40
TEMPERATURE (C°)
60
VCC = 1 V
5
VCC = 1 V
5
VCC = 3 V
15
0
–40
85
–20
Figure 4. Supply Current vs Temperature
(No Load, MAX8xxR/S/T)
80
VOD = 10 mV
40
20
0
–40
VOD = 100 mV
VOD = 200 mV
–20
0
20
40
TEMPERATURE (C°)
60
VOD = VTH – VCC
120
VOD = 10 mV
100
80
40
VOD = 100 mV
20
0
–40
85
VOD = 200 mV
–20
0
20
40
TEMPERATURE (C°)
60
85
Figure 7. Power–Down Reset Delay vs
Temperature and Overdrive (MAX8xxL/M/J)
250
1.003
NORMALIZED THRESHOLD
POWER–UP RESET TIMEOUT (msec)
VOD = 20 mV
60
Figure 6. Power–Down Reset Delay vs
Temperature and Overdrive (MAX8xxR/S/T)
245
MAX8xxL/M/J
240
235
MAX8xxR/S/T
230
225
–40
85
140
VOD = VTH – VCC
VOD = 10 mV
60
60
Figure 5. Supply Current vs Temperature
(No Load, MAX8xxL/M/J/)
POWER–DOWN RESET DELAY ( m sec)
POWER–DOWN RESET DELAY ( m sec)
100
0
20
40
TEMPERATURE (C°)
1.002
1.001
1.000
0.999
0.998
0.997
–20
0
20
40
TEMPERATURE (C°)
60
85
–40
Figure 8. Power–Up Reset Timeout vs
Temperature
–20
0
20
40
TEMPERATURE (C°)
60
Figure 9. Normalized Reset Threshold vs
Temperature
5
85
MAX809, MAX810
MAX809, MAX810
TAPING FORM
Component Taping Orientation for 3L SOT–23 (JEDEC–236) Devices
USER DIRECTION OF FEED
DEVICE
MARKING
PIN 1
Standard Reel Component Orientation
(Mark Right Side Up)
Tape & Reel Specifications Table
Package
Carrier Width (W)
Pitch (P)
Part Per Full Reel
Reel Size
SOT–23
8 mm
4 mm
3000
7 inches
MARKING DIAGRAM
SOT–23
x
x
Y
W
YW = Date Code
MARKING
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ÁÁÁÁÁÁÁÁÁÁÁÁ
ON Semiconductor Part #
Reset Threshold or Address
Marking
MAX809L
4.63
J1YW
MAX809M
4.38
J2YW
MAX809T
3.08
J3YW
MAX809S
2.93
J4YW
MAX809R
2.63
J5YW
MAX809J
4.00
J6YW
MAX810L
4.63
K1YW
MAX810M
4.38
K2YW
MAX810T
3.08
K3YW
MAX810S
2.93
K4YW
MAX810R
2.63
K5YW
YW = Date code
6
MAX809, MAX810
MAX809, MAX810
PACKAGE DIMENSIONS
SOT–23
PLASTIC PACKAGE (TO–236)
CASE 318–08
ISSUE AF
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
A
L
3
B S
1
V
DIM
A
B
C
D
G
H
J
K
L
S
V
2
G
C
D
H
K
J
7
INCHES
MIN
MAX
0.1102 0.1197
0.0472 0.0551
0.0350 0.0440
0.0150 0.0200
0.0701 0.0807
0.0005 0.0040
0.0034 0.0070
0.0140 0.0285
0.0350 0.0401
0.0830 0.1039
0.0177 0.0236
MILLIMETERS
MIN
MAX
2.80
3.04
1.20
1.40
0.89
1.11
0.37
0.50
1.78
2.04
0.013
0.100
0.085
0.177
0.35
0.69
0.89
1.02
2.10
2.64
0.45
0.60
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