PD - 94230
SMPS MOSFET
IRFP23N50L
HEXFET® Power MOSFET
Applications
VDSS
RDS(on) typ.
l Switch Mode Power Supply (SMPS)
500V
0.190Ω
l UninterruptIble Power Supply
l High Speed Power Switching
l Motor Drive
Benefits
l Low Gate Charge Qg results in Simple Drive Requirement
l Improved Gate, Avalanche and Dynamic dv/dt Ruggedness
l Fully Characterized Capacitance and Avalanche Voltage and
Current
l Enhanced Body Diode dv/dt Capability
Trr typ. ID
170ns
23A
TO-247AC
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
dv/dt
TJ
TSTG
Max.
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case )
Mounting torqe, 6-32 or M3 screw
23
15
92
370
2.9
± 30
14
-55 to + 150
300
Units
A
W
W/°C
V
V/ns
°C
10 lbf•in (1.1N•m)
Diode Characteristics
Symbol
IS
VSD
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
ISM
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
––– ––– 23
MOSFET symbol
showing the
A
G
––– ––– 92
integral reverse
S
p-n junction diode.
––– ––– 1.5
V
TJ = 25°C, IS = 14A, VGS = 0V
––– 170 250
TJ = 25°C
IF = 23A
ns
––– 220 330
TJ = 125°C
di/dt = 100A/µs
––– 560 840
nC
TJ = 25°C
––– 980 1500 nC
TJ = 125°C
––– 7.6
11
A
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Typical SMPS Topologies
l
Bridge Converters
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l
All Zero Voltage Switching
1
11/28/01
IRFP23N50L
Static @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS
RDS(on)
VGS(th)
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
∆V(BR)DSS/∆TJ
Min. Typ. Max. Units
Conditions
500 ––– –––
V
VGS = 0V, ID = 250µA
––– 0.27 ––– V/°C Reference to 25°C, ID = 1mA
––– 0.190 0.235
Ω
VGS = 10V, ID = 14A
3.0
––– 5.0
V
VDS = V GS, ID = 250µA
––– ––– 50
VDS = 500V, VGS = 0V
µA
––– –––
2
VDS = 400V, VGS = 0V, TJ = 125°C
––– ––– 100
VGS = 30V
nA
––– ––– -100
VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
Min.
12
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
–––
–––
–––
26
94
53
45
3600
380
37
4800
100
220
Max. Units
Conditions
–––
S
VDS = 50V, ID = 14A
150
ID = 23A
44
nC
VDS = 400V
72
VGS = 10V, See Fig. 6 and 13
–––
VDD = 250V
–––
ID = 23A
ns
–––
RG = 6.0Ω
–––
VGS = 10V,See Fig. 10
–––
VGS = 0V
–––
VDS = 25V
–––
pF
ƒ = 1.0MHz, See Fig. 5
–––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 400V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 0V to 400V
Avalanche Characteristics
Symbol
EAS
IAR
EAR
Parameter
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Typ.
Max.
Units
–––
–––
–––
410
23
37
mJ
A
mJ
Typ.
Max.
Units
–––
0.24
–––
0.34
–––
40
°C/W
Thermal Resistance
Symbol
RθJC
RθCS
RθJA
Parameter
Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See Fig. 11)
Starting TJ = 25°C, L = 1.5mH, RG = 25Ω,
IAS = 23A, dv/dt = 14V/ns (See Figure 12a)
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
ISD ≤ 23A, di/dt ≤ 430A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 150°C
2
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IRFP23N50L
100
100
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
10
1
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
0.1
4.5V
0.01
20µs PULSE WIDTH
Tj = 25°C
10
1
4.5V
20µs PULSE WIDTH
Tj = 150°C
0.001
0.1
0.1
1
10
100
1
10
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
1000.00
3.0
I D = 23A
2.5
T J = 25°C
T J = 150°C
10.00
VDS = 15V
20µs PULSE WIDTH
1.00
1.0
6.0
11.0
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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16.0
2.0
(Normalized)
100.00
R DS(on) , Drain-to-Source On Resistance
ID, Drain-to-Source Current (Α )
100
1.5
1.0
0.5
V GS = 10V
0.0
-60
-40
-20
0
20
40
60
TJ , Junction Temperature
80
100
120
140
160
( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRFP23N50L
100000
1000
Coss
100
V DS = 250V
10
VGS, Gate-to-Source Voltage (V)
Ciss
ID = 23
V DS = 400V
Coss = Cds + Cgd
10000
C, Capacitance(pF)
12
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
V DS = 100V
7
5
2
Crss
10
0
1
10
100
0
1000
24
48
72
96
120
Q G, Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
100.00
OPERATION IN THIS AREA LIMITED
BY R
TJ = 150°C
I D , Drain Current (A)
ISD, Reverse Drain Current (A)
DS(on)
100
10.00
T J = 25°C
1.00
100us
10
1ms
VGS = 0V
0.10
1
0.0
0.5
1.0
1.5
VSD , Source-toDrain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
2.0
10us
TC = 25 ° C
TJ = 150 ° C
Single Pulse
10
10ms
100
1000
10000
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRFP23N50L
25
RD
VDS
VGS
20
D.U.T.
RG
+
ID , Drain Current (A)
-VDD
10V
15
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
10
Fig 10a. Switching Time Test Circuit
VDS
5
90%
0
25
50
75
100
TC , Case Temperature
125
150
( °C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
(Z thJC)
10
1
Thermal Response
D = 0.50
0.1
0.20
0.10
P DM
0.05
0.01
0.02
0.01
t1
SINGLE PULSE
(THERMAL RESPONSE)
t2
Notes:
1. Duty factor D =
2. Peak T
0.001
0.00001
0.0001
0.001
0.01
J
t1/ t 2
= P DM x Z thJC
+TC
0.1
1
t 1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFP23N50L
750
5.0
TOP
10A
15A
EAS , Single Pulse Avalanche Energy (mJ)
600
BOTTOM
23A
450
300
150
VGS(th) Gate threshold Voltage (V)
ID
4.5
4.0
ID = 250µA
3.5
3.0
2.5
2.0
1.5
1.0
0
25
50
75
100
125
150
-75
-50
-25
( °C)
Starting T , Junction
Temperature
J
0
25
50
75
100 125 150
T J , Temperature ( °C )
Fig 12a. Maximum Avalanche Energy
Vs. Drain Current
Fig 14. Threshold Voltage Vs. Temperature
1 5V
V (B R )D SS
D R IV E R
L
VDS
D .U .T
RG
+
- VD D
IA S
20V
tp
A
0 .0 1 Ω
tp
IAS
Fig 12c. Unclamped Inductive Test Circuit
Fig 12d. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
QG
50KΩ
12V
.2µF
VGS V
.3µF
D.U.T.
QGS
+
V
- DS
QGD
VG
VGS
3mA
IG
ID
Current Sampling Resistors
Fig 13a. Gate Charge Test Circuit
6
Charge
Fig 13b. Basic Gate Charge Waveform
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IRFP23N50L
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
•
•
•
•
RG
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Driver Gate Drive
P.W.
Period
D=
+
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® Power MOSFETs
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7
IRFP23N50L
TO-247AC Package Outline
Dimensions are shown in millimeters (inches)
-D-
3 .65 (.1 43 )
3 .55 (.1 40 )
15 .90 (.6 26 )
15 .30 (.6 02 )
-B -
0.25 (.0 1 0) M
D B M
-A 5 .50 (. 217 )
2 0 .3 0 (.80 0)
1 9 .7 0 (.77 5)
2X
1
2
5 .3 0 (.2 09 )
4 .7 0 (.1 85 )
2 .5 0 (.08 9)
1 .5 0 (.05 9)
4
NO TES :
5.5 0 (.2 17)
4.5 0 (.1 77)
1 D IME N SION ING & TO LE R AN CING
P E R A NS I Y14.5M, 1982.
2 C ON TR OLLIN G D IME N SIO N : IN CH .
3 C ON F OR MS TO JED E C OU TLIN E
T O-247-A C .
3
-C-
14 .8 0 (.5 83 )
14 .2 0 (.5 59 )
2 .40 (. 094 )
2 .00 (. 079 )
2X
5.45 (.21 5)
2X
4.3 0 (.1 70)
3.7 0 (.1 45)
0 .80 (.03 1)
3 X 0 .40 (.01 6)
1 .40 (.0 56 )
3X 1 .00 (.0 39 )
0 .2 5 (.0 10 ) M
3 .40 (.13 3)
3 .00 (.11 8)
2 .60 (.1 0 2)
2 .20 (.0 8 7)
C A S
LE AD A S SIG N MEN TS
1
2
3
4
-
GA TE
DR AIN
SO UR C E
DR AIN
TO-247AC Part Marking Information
EXAMPLE:
THIS IS AN IRFPE30
WITH ASSEMBLY
LOT CODE 5657
ASSEMBLED ON WW 35, 2000
IN THE ASSEMBLY LINE "H"
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
IRFPE30
56
ASSEMBLY
LOT CODE
035H
57
DATE CODE
YEAR 0 = 2000
WEEK 35
LINE H
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.11/01
8
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