Microsemi APT25M100J N-channel mosfet Datasheet

APT25M100J
1000V, 25A, 0.33Ω Max
N-Channel MOSFET
S
S
Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET.
A proprietary planar stripe design yields excellent reliability and manufacturability. Low
switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure
help control slew rates during switching, resulting in low EMI and reliable paralleling,
even when switching at very high frequency. Reliability in flyback, boost, forward, and
other circuits is enhanced by the high avalanche energy capability.
D
G
SO
2
T-
27
"UL Recognized"
file # E145592
ISOTOP ®
D
APT25M100J
Single die MOSFET
G
S
TYPICAL APPLICATIONS
FEATURES
• Fast switching with low EMI/RFI
• PFC and other boost converter
• Low RDS(on)
• Buck converter
• Ultra low Crss for improved noise immunity
• Two switch forward (asymmetrical bridge)
• Low gate charge
• Single switch forward
• Avalanche energy rated
• Flyback
• RoHS compliant
• Inverters
Absolute Maximum Ratings
Symbol
ID
Parameter
Unit
Ratings
Continuous Drain Current @ TC = 25°C
25
Continuous Drain Current @ TC = 100°C
16
A
IDM
Pulsed Drain Current
VGS
Gate-Source Voltage
±30
V
EAS
Single Pulse Avalanche Energy 2
2165
mJ
IAR
Avalanche Current, Repetitive or Non-Repetitive
18
A
1
140
Thermal and Mechanical Characteristics
Min
Typ
Max
Unit
W
PD
Total Power Dissipation @ TC = 25°C
545
RθJC
Junction to Case Thermal Resistance
0.23
RθCS
Case to Sink Thermal Resistance, Flat, Greased Surface
TJ,TSTG
Operating and Storage Junction Temperature Range
VIsolation
RMS Voltage (50-60hHz Sinusoidal Waveform from Terminals to Mounting Base for 1 Min.)
WT
Torque
Package Weight
-55
150
°C
V
2500
1.03
oz
29.2
g
10
in·lbf
1.1
N·m
Terminals and Mounting Screws.
MicrosemiWebsite-http://www.microsemi.com
°C/W
0.15
Rev B 5-2009
Characteristic
050-8100
Symbol
Static Characteristics
TJ = 25°C unless otherwise specified
Symbol
Parameter
VBR(DSS)
Drain-Source Breakdown Voltage
ΔVBR(DSS)/ΔTJ
Breakdown Voltage Temperature Coefficient
RDS(on)
Drain-Source On Resistance
VGS(th)
Gate-Source Threshold Voltage
ΔVGS(th)/ΔTJ
IGSS
Gate-Source Leakage Current
Dynamic Characteristics
Symbol
VDS = 1000V
VGS = 0V
Forward Transconductance
Ciss
Input Capacitance
Crss
Reverse Transfer Capacitance
Coss
Output Capacitance
Typ
Max
1.15
0.29
4
-10
0.33
5
TJ = 25°C
100
500
±100
TJ = 125°C
VGS = ±30V
Unit
V
V/°C
Ω
V
mV/°C
µA
nA
TJ = 25°C unless otherwise specified
Parameter
gfs
3
VGS = VDS, ID = 2.5mA
Threshold Voltage Temperature Coefficient
Zero Gate Voltage Drain Current
Min
1000
VGS = 10V, ID = 18A
3
IDSS
Test Conditions
VGS = 0V, ID = 250µA
Reference to 25°C, ID = 250µA
APT25M100J
Min
Test Conditions
VDS = 50V, ID = 18A
4
Effective Output Capacitance, Charge Related
Co(er)
5
Effective Output Capacitance, Energy Related
Max
39
9835
130
825
VGS = 0V, VDS = 25V
f = 1MHz
Co(cr)
Typ
Unit
S
pF
335
VGS = 0V, VDS = 0V to 667V
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
td(on)
Turn-On Delay Time
tr
td(off)
tf
170
305
55
145
44
40
150
38
VGS = 0 to 10V, ID = 18A,
VDS = 500V
Resistive Switching
VDD = 667V, ID = 18A
Current Rise Time
RG = 2.2Ω 6 , VGG = 15V
Turn-Off Delay Time
Current Fall Time
nC
ns
Source-Drain Diode Characteristics
Symbol
IS
ISM
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) 1
VSD
Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
dv/dt
Test Conditions
MOSFET symbol
showing the
integral reverse p-n
junction diode
(body diode)
Peak Recovery dv/dt
Min
Typ
D
Max
Unit
25
A
G
140
S
ISD = 18A, TJ = 25°C, VGS = 0V
ISD = 18A 3
diSD/dt = 100A/µs, TJ = 25°C
ISD ≤ 18A, di/dt ≤1000A/µs, VDD = 100V,
TJ = 125°C
1
1165
33
V
ns
µC
10
V/ns
1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature.
2 Starting at TJ = 25°C, L = 13.36mH, RG = 2.2Ω, IAS = 18A.
3 Pulse test: Pulse Width < 380µs, duty cycle < 2%.
050-8100
Rev B 5-2009
4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS.
5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of
VDS less than V(BR)DSS, use this equation: Co(er) = -2.85E-7/VDS^2 + 5.04E-8/VDS + 9.75E-11.
6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)
Microsemi reserves the right to change, without notice, the specifications and information contained herein.
APT25M100J
120
40
V
GS
= 10V
T = 125°C
J
35
V
GS
TJ = -55°C
80
60
TJ = 25°C
40
20
TJ = 125°C
25
20
5V
15
10
4.5V
5
TJ = 150°C
0
0
5
10
15
20
25
30
VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V)
0
5
10
15
20
25
30
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 2, Output Characteristics
140
NORMALIZED TO
VDS> ID(ON) x RDS(ON) MAX.
VGS = 10V @ 18A
250µSEC. PULSE TEST
@ <0.5 % DUTY CYCLE
120
2.5
ID, DRAIN CURRENT (A)
2.0
1.5
1.0
0.5
100
80
TJ = -55°C
60
TJ = 25°C
40
TJ = 125°C
20
0
0
-55 -25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (°C)
Figure 3, RDS(ON) vs Junction Temperature
0
1
2
3
4
5
6
7
8
VGS, GATE-TO-SOURCE VOLTAGE (V)
Figure 4, Transfer Characteristics
20,000
50
Ciss
40
TJ = -55°C
C, CAPACITANCE (pF)
gfs, TRANSCONDUCTANCE
10,000
TJ = 25°C
30
TJ = 125°C
20
Coss
100
10
0
Crss
10
0
5
10
15
20
ID, DRAIN CURRENT (A)
Figure 5, Gain vs Drain Current
25
0
200
400
600
800
1000
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 6, Capacitance vs Drain-to-Source Voltage
16
140
14
12
VDS = 200V
10
VDS = 500V
8
6
VDS = 800V
4
2
0
0
50 100 150 200 250 300 350 400
Qg, TOTAL GATE CHARGE (nC)
Figure 7, Gate Charge vs Gate-to-Source Voltage
ISD, REVERSE DRAIN CURRENT (A)
ID = 18A
VGS, GATE-TO-SOURCE VOLTAGE (V)
1000
120
100
80
TJ = 25°C
60
TJ = 150°C
40
20
0
0
0.3
0.6
0.9
1.2
1.5
VSD, SOURCE-TO-DRAIN VOLTAGE (V)
Figure 8, Reverse Drain Current vs Source-to-Drain Voltage
Rev B 5-2009
RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE
Figure 1, Output Characteristics
3.0
= 6, 7, 8 & 9V
30
050-8100
0
ID, DRIAN CURRENT (A)
ID, DRAIN CURRENT (A)
100
APT25M100J
200
200
100
100
IDM
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
IDM
10
13µs
100µs
1ms
10ms
1
Rds(on)
100ms
10
13µs
100µs
Rds(on)
TJ = 150°C
TC = 25°C
1
TJ = 125°C
TC = 75°C
1
100ms
DC line
Scaling for Different Case & Junction
Temperatures:
ID = ID(T = 25°C)*(TJ - TC)/125
DC line
0.1
1ms
10ms
0.1
10
100
1000
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 9, Forward Safe Operating Area
C
1
10
100
1000
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 10, Maximum Forward Safe Operating Area
D = 0.9
0.20
0.7
0.15
0.5
Note:
PDM
ZθJC, THERMAL IMPEDANCE (°C/W)
0.25
0.10
0.3
t2
t1 = Pulse Duration
0.05
t
0.1
0
t1
Duty Factor D = 1/t2
Peak TJ = PDM x ZθJC + TC
SINGLE PULSE
0.05
10-5
10-4
10-3
10-2
10-1
RECTANGULAR PULSE DURATION (seconds)
Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration
1.0
SOT-227 (ISOTOP®) Package Outline
11.8 (.463)
12.2 (.480)
31.5 (1.240)
31.7 (1.248)
7.8 (.307)
8.2 (.322)
r = 4.0 (.157)
(2 places)
W=4.1 (.161)
W=4.3 (.169)
H=4.8 (.187)
H=4.9 (.193)
(4 places)
Rev B 5-2009
25.2 (0.992)
0.75 (.030) 12.6 (.496) 25.4 (1.000)
0.85 (.033) 12.8 (.504)
4.0 (.157)
4.2 (.165)
(2 places)
3.3 (.129)
3.6 (.143)
050-8100
8.9 (.350)
9.6 (.378)
Hex Nut M4
(4 places)
14.9 (.587)
15.1 (.594)
1.95 (.077)
2.14 (.084)
* Source
30.1 (1.185)
30.3 (1.193)
Drain
* Emitter terminals are shorted
internally. Current handling
capability is equal for either
Source terminal.
38.0 (1.496)
38.2 (1.504)
* Source
Gate
Dimensions in Millimeters and (Inches)
ISOTOP® is a registered trademark of ST Microelectronics NV. Microsemi's products are covered by one or more of U.S.patents 4,895,810 5,045,903 5,089,434 5,182,234
5,019,522 5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 and foreign patents. US and Foreign patents pending. All Rights Reserved.
Similar pages