BVDSS = 60 V RDS(on) typ = 18 Pȍ HFW50N06A ID = 50 A 60V N-Channel MOSFET D2-PAK 2 FEATURES Originative New Design 1 Superior Avalanche Rugged Technology Robust Gate Oxide Technology 3 1.Gate 2. Drain 3. Source Very Low Intrinsic Capacitances Excellent Switching Characteristics Unrivalled Gate Charge : 27 nC (Typ.) Extended Safe Operating Area Lower RDS(ON) : ȍ(Typ.) @VGS=10V 100% Avalanche Tested Absolute Maximum Ratings Symbol VDSS TC=25 unless otherwise specified Parameter Drain-Source Voltage Value Units 60 V Drain Current – Continuous (TC = 25) 50 A Drain Current – Continuous (TC = 100) 35.4 A IDM Drain Current – Pulsed 200 A VGS Gate-Source Voltage ρ25 V EAS Single Pulsed Avalanche Energy (Note 2) 490 mJ IAR Avalanche Current (Note 1) 50 A EAR Repetitive Avalanche Energy (Note 1) 12 mJ Power Dissipation (TA = 25) * 3.75 W PD Power Dissipation (TC = 25) - Derate above 25 120 W TJ, TSTG Operating and Storage Temperature Range TL Maximum lead temperature for soldering purposes, 1/8” from case for 5 seconds ID 0.8 W/ -55 to +175 300 Thermal Resistance Characteristics Typ. Max. RșJC Symbol Junction-to-Case Parameter -- 1.24 RșJA Junction-to-Ambient * -- 40 RșJA Junction-to-Ambient -- 62.5 Units /W * When mounted on the minimum pad size recommended (PCB Mount) క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͢͝ΔΥ͑ͣͦ͑͢͡ HFW50N06A Oct 2015 Symbol Parameter unless otherwise specified Test Conditions Min Typ Max Units On Characteristics VGS RDS(ON) gFS Gate Threshold Voltage VDS = VGS, ID = 250 Ꮃ 2.0 -- 4.0 V Static Drain-Source On-Resistance VGS = 10 V, ID = 25 A -- 18 22 m Forward Transconductance VDS = 25 V, ID = 25 A -- 22 -- S VGS = 0 V, ID = 250 Ꮃ 60 -- -- V VDS = 60 V, VGS = 0 V -- -- 1 Ꮃ VDS = 48 V, TJ = 125 -- -- 10 Ꮃ VGS = ρ25 V, VDS = 0 V -- -- ρ100 Ꮂ -- 1290 1675 Ꮔ -- 445 580 Ꮔ -- 84 110 Ꮔ -- 15 40 Ꭸ -- 105 220 Ꭸ -- 80 180 Ꭸ -- 85 180 Ꭸ -- 27 34 nC -- 5.0 -- nC -- 10.2 -- nC Off Characteristics BVDSS Drain-Source Breakdown Voltage IDSS Zero Gate Voltage Drain Current IGSS Gate-Body Leakage Current Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz Switching Characteristics td(on) Turn-On Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDS = 30 V, ID = 25 A, RG = 25 VDS = 48 V, ID = 50 A VGS = 10 V Source-Drain Diode Maximum Ratings and Characteristics IS Continuous Source-Drain Diode Forward Current -- -- 50 ISM Pulsed Source-Drain Diode Forward Current -- -- 200 VSD Source-Drain Diode Forward Voltage IS = 50 A, VGS = 0 V -- -- 1.5 V trr Reverse Recovery Time -- 45 -- Ꭸ Qrr Reverse Recovery Charge IS = 50 A, VGS = 0 V diF/dt = 100 A/ȝV -- 70 -- ȝ& A Notes ; 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L=230ȝH, IAS=50A, VDD=25V, RG=25:, Starting TJ =25qC 3. Pulse Test : Pulse Width ȝV'XW\&\FOH 4. Essentially Independent of Operating Temperature క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͢͝ΔΥ͑ͣͦ͑͢͡ HFW50N06A Electrical Characteristics TJ=25 qC HFW50N06A Typical Characteristics Figure 1. On Region Characteristics Figure 2. Transfer Characteristics Figure 3. On Resistance Variation vs Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation with Source Current and Temperature Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͢͝ΔΥ͑ͣͦ͑͢͡ HFW50N06A Typical Characteristics (continued) Figure 7. Breakdown Voltage Variation vs Temperature Figure 8. On-Resistance Variation vs Temperature Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current vs Case Temperature ZTJC(t), Thermal Response 100 D=0.5 * Notes : 1. ZTJC(t) = 1.24 oC/W Max. 2. Duty Factor, D=t1/t2 3. TJM - TC = PDM * ZTJC(t) 0.2 0.1 10-1 0.05 PDM 0.02 0.01 single pulse t1 -2 10 10-5 10-4 10-3 10-2 10-1 t2 100 101 t1, Square Wave Pulse Duration [sec] Figure 11. Transient Thermal Response Curve క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͢͝ΔΥ͑ͣͦ͑͢͡ HFW50N06A Fig 12. Gate Charge Test Circuit & Waveform .ȍ 12V VGS Same Type as DUT Qg 200nF 10V 300nF VDS VGS Qgs Qgd DUT 3mA Charge Fig 13. Resistive Switching Test Circuit & Waveforms RL VDS VDS 90% VDD RG ( 0.5 rated VDS ) Vin DUT 10V 10% tr td(on) td(off) t on tf t off Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD L VDS VDD ID BVDSS IAS RG 10V ID (t) DUT VDS (t) VDD tp Time క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͢͝ΔΥ͑ͣͦ͑͢͡ HFW50N06A Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS _ IS L Driver RG VGS VGS ( Driver ) Same Type as DUT VDD • dv/dt controlled by RG • IS controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current IS ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt Vf VDD Body Diode Forward Voltage Drop క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͢͝ΔΥ͑ͣͦ͑͢͡ HFW50N06A Package Dimension kYTwhrG O{vTY]ZPG క͑΄Ͷ;ͺΈ͑Ͷ·͟Ͳ͢͝ΔΥ͑ͣͦ͑͢͡