19-1580; Rev 0; 12/99 Dual, 8-Bit, 40MHz, Current/Voltage, Alternate-Phase Output DACs The MAX5188/MAX5191 are designed to provide a high level of signal integrity for the least amount of power dissipation. Both DACs operate from a +2.7V to +3.3V single supply. Additionally, these DACs have three modes of operation: normal, low-power standby, and full shutdown. A full shutdown provides the lowest possible power dissipation with a maximum shutdown current of 1µA. A fast wake-up time (0.5µs) from standby mode to full DAC operation allows for power conservation by activating the DACs only when required. The MAX5188/MAX5191 are available in a 28-pin QSOP package and are specified for the extended (-40°C to +85°C) temperature range. For pin-compatible 10-bit versions, refer to the MAX5182/MAX5185 data sheet. Features ♦ +2.7V to +3.3V Single-Supply Operation ♦ Wide Spurious-Free Dynamic Range: 70dB at fOUT = 2.2MHz ♦ Fully Differential Outputs for Each DAC ♦ ±0.5% FSR Gain Mismatch Between DAC Outputs ♦ Low-Current Standby or Full Shutdown Modes ♦ Internal +1.2V Low-Noise Bandgap Reference ♦ Small 28-Pin QSOP Package Ordering Information PART TEMP. RANGE PIN-PACKAGE MAX5188BEEI MAX5191BEEI -40°C to +85°C -40°C to +85°C 28 QSOP 28 QSOP Pin Configuration Applications Signal Reconstruction Applications Digital Signal Processing Arbitrary Waveform Generators Imaging Applications TOP VIEW CREF1 1 28 CREF2 OUT1P 2 27 OUT2P OUT1N 3 26 OUT2N AGND 4 25 REFO AVDD 5 DACEN 6 24 REFR MAX5188 MAX5191 23 DGND PD 7 22 DVDD CS 8 21 D7 CLK 9 20 D6 N.C. 10 19 D5 REN 11 18 D4 DGND 12 17 D3 DGND 13 16 D2 D0 14 15 D1 QSOP ________________________________________________________________ Maxim Integrated Products 1 For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 1-800-835-8769. MAX5188/MAX5191 General Description The MAX5188 is a dual 8-bit, alternate-phase-update, current-output digital-to-analog converter (DAC) designed for superior performance in systems requiring analog signal reconstruction with low distortion and low-power operation. The MAX5191 provides equal specifications, with on-chip output resistors for voltageoutput operation. Both devices are designed for 10pVs glitch operation to reduce distortion and minimize unwanted spurious signal components at the output. An on-board +1.2V bandgap circuit provides a well-regulated, low-noise reference that may be disabled for external reference operation. MAX5188/MAX5191 Dual, 8-Bit, 40MHz, Current/Voltage, Alternate-Phase Output DACs ABSOLUTE MAXIMUM RATINGS AVDD, DVDD to AGND, DGND .................................-0.3V to +6V Digital Inputs to DGND.............................................-0.3V to +6V OUT1P, OUT1N, OUT2P, OUT2N, CREF1, CREF2 to AGND ....................................................-0.3V to +6V VREF to AGND ..........................................................-0.3V to +6V AVDD to DVDD .....................................................................±3.3V AGND to DGND.....................................................-0.3V to +0.3V Maximum Current into Any Pin............................................50mA Continuous Power Dissipation (TA = +70°C) 28-Pin QSOP (derate 9.00mW/°C above +70°C)..........725mW Operating Temperature Ranges MAX5188/MAX5191BEEI ..................................-40°C to +85°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (AVDD = DVDD = +3V ±10%, AGND = DGND = 0, fCLK = 40MHz, IFS = 1mA, 400Ω differential output, CL = 5pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS STATIC PERFORMANCE Resolution N 8 Integral Nonlinearity INL -1 ±0.25 +1 LSB Differential Nonlinearity DNL Guaranteed monotonic -1 ±0.25 +1 LSB MAX5188 -1 +1 LSB MAX5191 -4 +4 LSB (Note 1) -20 +20 LSB Zero-Scale Error Full-Scale Error Bits ±4 DYNAMIC PERFORMANCE Output Settling Time To ±0.5LSB error band Glitch Impulse Spurious-Free Dynamic Range to Nyquist SFDR fCLK = 40MHz Total Harmonic Distortion to Nyquist THD fCLK = 40MHz Signal-to-Noise Ratio to Nyquist SNR fCLK = 40MHz fOUT = 550kHz fOUT = 2.2MHz 25 ns 10 pVs 72 57 fOUT = 550kHz -70 fOUT = 2.2MHz -68 fOUT = 550kHz fOUT = 2.2MHz dBc 70 -63 52 46 dB dB 52 DAC-to-DAC Output Isolation fOUT = 2.2MHz -60 dB Clock and Data Feedthrough All 0s to all 1s 50 nVs 10 pA/√Hz Output Noise Gain Mismatch Between DAC Outputs fOUT = 2.2MHz ±0.5 ±1 LSB ANALOG OUTPUT Full-Scale Output Voltage VFS 400 Voltage Compliance of Output Output Leakage Current Full-Scale Output Current DAC External Output Resistor Load 2 IFS mV -0.3 0.8 V DACEN = 0, MAX5188 only -1 1 µA MAX5188 only 0.5 1.5 mA MAX5188 only 1 400 ________________________________________________________________________________________ Ω Dual, 8-Bit, 40MHz, Current/Voltage, Alternate-Phase Output DACs (AVDD = DVDD = +3V ±10%, AGND = DGND = 0, fCLK = 40MHz, IFS = 1mA, 400Ω differential output, CL = 5pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 1.12 1.2 1.28 V REFERENCE Output Voltage Range VREF Output Voltage Temperature Drift TCVREF 50 ppm/°C Reference Output Drive Capability IREFOUT 10 µA Reference Supply Rejection Current Gain (IFS / IREF) 0.5 mV/V 8 mA/mA POWER REQUIREMENTS Analog Power-Supply Voltage AVDD Analog Supply Current IAVDD Digital Power-Supply Voltage DVDD Digital Supply Current Standby Current Shutdown Current 2.7 PD = 0, DACEN = 1, digital inputs at 0 or DVDD 2.7 2.7 3.3 V 5 mA 3.3 V IDVDD PD = 0, DACEN = 1, digital inputs at 0 or DVDD 4.2 5 mA ISTANDBY PD = 0, DACEN = 0, digital inputs at 0 or DVDD 1 1.5 mA ISHDN PD = 1, DACEN = X, digital inputs at 0 or DVDD (X = don’t care) 0.5 1 µA LOGIC INPUTS AND OUTPUTS Digital Input High Voltage VIH Digital Input Low Voltage VIL Digital Input Current IIN Digital Input Capacitance CIN 2 V 0.8 VIN = 0 or DVDD ±1 10 V µA pF TIMING CHARACTERISTICS DAC1 DATA to CLK Rise Setup Time tDS1 10 ns DAC2 DATA to CLK Fall Setup Time tDS2 10 ns DAC1 CLK Rise to DATA Hold Time tDH1 0 ns DAC2 CLK Fall to DATA Hold Time tDH2 0 ns CS Fall to CLK Rise Time 5 ns CS Fall to CLK Fall Time 5 ns 0.5 µs 50 µs DACEN Rise Time to VOUT PD Fall Time to VOUT Clock Period tCLK 25 ns Clock High Time tCH 10 ns Clock Low Time tCL 10 ns Note 1: Excludes reference and reference resistor (MAX5191) tolerance. _______________________________________________________________________________________ 3 MAX5188/MAX5191 ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (AVDD = DVDD = +3V, AGND = DGND = 0, 400Ω differential output, IFS = 1mA, CL = 5pF, TA = +25°C, unless otherwise noted.) 0.075 0.100 0.050 DNL (LSB) 0.050 0.025 0.025 0 0 -0.025 -0.025 -0.050 -0.050 -0.075 32 64 96 128 160 192 224 256 MAX5188 2.25 32 64 96 128 160 192 224 256 2.5 3.0 3.5 4.0 4.5 5.0 SUPPLY VOLTAGE (V) ANALOG SUPPLY CURRENT vs. TEMPERATURE DIGITAL SUPPLY CURRENT vs. SUPPLY VOLTAGE DIGITAL SUPPLY CURRENT vs. TEMPERATURE 2.50 MAX5188 2.25 MAX5188 6 MAX5191 4 2 0 -15 10 35 60 MAX5188 3.75 MAX5191 3.50 3.25 3.00 2.5 85 3.0 3.5 4.0 4.5 5.0 5.5 -40 -15 10 35 60 TEMPERATURE (°C) SUPPLY VOLTAGE (V) TEMPERATURE (°C) STANDBY CURRENT vs. SUPPLY VOLTAGE STANDBY CURRENT vs. TEMPERATURE SHUTDOWN CURRENT vs. SUPPLY VOLTAGE MAX5191 590 STANDBY CURRENT (µA) MAX5191 600 590 MAX5188 580 580 570 MAX5188 85 MAX5188/91-09 610 3.8 SHUTDOWN CURRENT (µA) 600 MAX5188/91-07 620 5.5 MAX5188/91-06 8 4.00 DIGITAL SUPPLY CURRENT (mA) MAX5191 2.75 10 MAX5188/91-05 MAX5188/91-04 ANALOG SUPPLY CURRENT (mA) 2.50 INPUT CODE 2.00 3.7 MAX5188 3.6 MAX5191 3.5 560 570 560 550 2.5 3.0 3.5 4.0 4.5 SUPPLY VOLTAGE (V) 4 MAX5191 INPUT CODE 3.00 -40 2.75 2.00 0 DIGITAL SUPPLY CURRENT (mA) 0 MAX5188/91-08 INL (LSB) 0.075 3.00 ANALOG SUPPLY CURRENT (mA) 0.125 ANALOG SUPPLY CURRENT vs. SUPPLY VOLTAGE MAX5188/91-02 0.100 MAX5188/91-01 0.150 DIFFERENTIAL NONLINEARITY vs. INPUT CODE MAX5188/91-03 INTEGRAL NONLINEARITY vs. INPUT CODE STANDBY CURRENT (µA) MAX5188/MAX5191 Dual, 8-Bit, 40MHz, Current/Voltage, Alternate-Phase Output DACs 5.0 5.5 3.4 -40 -15 10 35 TEMPERATURE (°C) 60 85 2.5 3.0 3.5 4.0 4.5 SUPPLY VOLTAGE (V) _______________________________________________________________________________________ 5.0 5.5 Dual, 8-Bit, 40MHz, Current/Voltage, Alternate-Phase Output DACs 1.26 MAX5188 1.25 MAX5191 1.26 MAX5188 1.25 MAX5191 MAX5188/91-13 1.27 OUTPUT CURRENT (mA) 1.27 4 MAX5188/91-12 MAX5188/91-11 1.28 REFERENCE VOLTAGE (V) 3 2 1 1.24 1.24 0 1.23 1.23 2.5 3.0 3.5 4.0 4.5 5.0 -40 5.5 -15 10 35 60 0 85 100 DYNAMIC RESPONSE RISE TIME 200 OUT_N 150mV/div OUT_N 150mV/div 50ns/div 50ns/div FFT PLOT, DAC2 FFT PLOT, DAC1 MAX5188/91-16 0 -10 fCLK = 40MHz fOUT = 2.2MHz -20 -30 -40 -50 -60 -40 -50 -60 -70 -70 -80 -80 -90 -90 -100 -110 -120 -100 -110 -120 0 2 4 6 8 10 12 14 16 18 20 OUTPUT FREQUENCY (MHz) fCLK = 40MHz fOUT = 2.2MHz -20 -30 (dBc) (dBc) 0 -10 MAX5188/91-17 SETTLING TIME 12.5ns/div 500 MAX5188/91-15 MAX5188/91-14 OUT_P 150mV/div OUT_P 100mV/div 400 DYNAMIC RESPONSE FALL TIME OUT_P 150mV/div OUT_N 100mV/div 300 REFERENCE CURRENT (µA) TEMPERATURE (°C) SUPPLY VOLTAGE (V) 0 2 4 6 8 MAX5188/91-18 REFERENCE VOLTAGE (V) 1.28 OUTPUT CURRENT vs. REFERENCE CURRENT INTERNAL REFERENCE VOLTAGE vs. TEMPERATURE INTERNAL REFERENCE VOLTAGE vs. SUPPLY VOLTAGE 10 12 14 16 18 20 OUTPUT FREQUENCY (MHz) _______________________________________________________________________________________ 5 MAX5188/MAX5191 Typical Operating Characteristics (continued) (AVDD = DVDD = +3V, AGND = DGND = 0, 400Ω differential output, IFS = 1mA, CL = 5pF, TA = +25°C, unless otherwise noted.) Typical Operating Characteristics (continued) (AVDD = DVDD = +3V, AGND = DGND = 0, 400Ω differential output, IFS = 1mA, CL = 5pF, TA = +25°C, unless otherwise noted.) SPURIOUS-FREE DYNAMIC RANGE vs. CLOCK FREQUENCY SPURIOUS-FREE DYNAMIC RANGE vs. OUTPUT FREQUENCY AND CLOCK FREQUENCY, DAC1 90 MAX5188/91-20 78 MAX5188/91-19 100 fCLK = 40MHz 76 fCLK = 60MHz 74 SFDR (dBc) SFDR (dBc) 80 DAC2 70 DAC1 60 fCLK = 20MHz 72 fCLK = 50MHz 70 fCLK = 10MHz 50 68 40 66 fCLK = 30MHz 10 15 20 25 30 35 40 45 50 55 60 500 700 900 1100 1300 1500 1700 1900 2100 2300 CLOCK FREQUENCY (MHz) OUTPUT FREQUENCY (kHz) SPURIOUS-FREE DYNAMIC RANGE vs. OUTPUT FREQUENCY AND CLOCK FREQUENCY, DAC2 SIGNAL-TO-NOISE PLUS DISTORTION vs. OUTPUT FREQUENCY 76 62.5 MAX5188/91-23 fCLK = 50MHz fCLK = 20MHz fCLK = 40MHz MAX5188/91-21 78 62.0 SINAD (dB) 72 fCLK = 10MHz 70 61.5 DAC2 61.0 DAC1 fCLK = 60MHz 60.5 68 fCLK = 30MHz 60.0 66 500 700 900 1100 1300 1500 1700 1900 2100 2300 0 500 1000 1500 2000 2500 OUTPUT FREQUENCY (kHz) OUPUT FREQUENCY (kHz) MULTITONE SPURIOUS-FREE DYNAMIC RANGE vs. OUTPUT FREQUENCY SPURIOUS-FREE DYNAMIC RANGE vs. FULL-SCALE OUTPUT CURRENT 74 MAX5188/91-24 0 -10 -20 MAX5188/91-26 SFDR (dBc) 74 72 70 SFDR (dBc) -30 SFDR (dBc) MAX5188/MAX5191 Dual, 8-Bit, 40MHz, Current/Voltage, Alternate-Phase Output DACs -40 -50 -60 68 66 64 -70 62 -80 60 -120 0 2 4 6 8 10 12 14 16 18 20 OUTPUT FREQUENCY (MHz) 6 0.50 0.75 1.00 1.25 1.50 FULL-SCALE OUTPUT CURRENT (mA) _______________________________________________________________________________________ Dual, 8-Bit, 40MHz, Current/Voltage, Alternate-Phase Output DACs PIN NAME FUNCTION 1 CREF1 Reference Bias Bypass, DAC1 2 OUT1P Positive Analog Output, DAC1. Current output for the MAX5188; voltage output for the MAX5191. 3 OUT1N Negative Analog Output, DAC1. Current output for the MAX5188; voltage output for the MAX5191. 4 AGND Analog Ground 5 AVDD Analog Positive Supply, +2.7V to +3.3V DAC Enable, Digital Input 0: Enter DAC standby mode with PD = DGND 1: Power-up DAC with PD = DGND X: Enter shutdown mode with PD = DVDD (X = don’t care) 6 DACEN 7 PD Power-Down Select 0: Enter DAC standby mode (DACEN = DGND) or power-up DAC (DACEN = DVDD) 1: Enter shutdown mode 8 CS Active-Low Chip Select 9 CLK Clock Input 10 N.C. Not Connected. Do not connect to this pin. 11 REN Active-Low Reference Enable. Connect to DGND to activate on-chip +1.2V reference. 12, 13, 23 DGND 14 D0 Data Bit D0 (LSB) 15–20 D1–D6 Data Bits D1–D6 21 D7 22 DVDD Digital Supply, +2.7V to +3.3V 24 REFR Reference Input 25 REFO Reference Output 26 OUT2N Negative Analog Output, DAC2. Current output for the MAX5188; voltage output for the MAX5191. 27 OUT2P Positive Analog Output, DAC2. Current output for the MAX5188; voltage output for the MAX5191. 28 CREF2 Reference Bias Bypass, DAC2 Digital Ground Data Bit D7 (MSB) _______________________________________________________________________________________ 7 MAX5188/MAX5191 Pin Description MAX5188/MAX5191 Dual, 8-Bit, 40MHz, Current/Voltage, Alternate-Phase Output DACs REN AVDD AGND CS DACEN PD 1.2V REF REFO CREF1 CURRENTSOURCE ARRAY REFR CREF2 OUT1P 9.6k* OUT1N DAC 1 SWITCHES OUT2P DAC 2 SWITCHES MSB DECODE CLK MSB DECODE INPUT LATCHES INPUT LATCHES MAX5188 MAX5191 DVDD *INTERNAL 400Ω AND 9.6kΩ RESISTORS FOR MAX5191 ONLY. 400Ω* 400Ω* 400Ω* 400Ω* OUTPUT LATCHES OUTPUT LATCHES OUT2N DGND D7–D0 Figure 1. Functional Diagram Detailed Description The MAX5188/MAX5191 are dual 8-bit digital-to-analog converters (DACs) capable of operating with clock speeds up to 40MHz. Each of these dual converters consists of separate input and DAC registers, followed by a current-source array capable of generating up to 1.5mA full-scale output current (Figure 1). An integrated +1.2V voltage reference and control amplifier determine the data converters’ full-scale output currents/ voltages. Careful reference design ensures close gain matching and excellent drift characteristics. The MAX5191’s voltage output operation features matched 400Ω on-chip resistors that convert the current from the current array into a voltage. Due to its limited 10µA output drive capability, the REFO pin must be buffered with an external amplifier if heavier loading is required. The MAX5188/MAX5191 also employ a control amplifier, designed to simultaneously regulate the full-scale output current IFS for both MAX5188/MAX5191 outputs. The output current is calculated as follows: IFS = 8 · IREF Internal Reference and Control Amplifier where I REF is the reference output current (I REF = VREFO / RSET) and IFS is the full-scale output current. R SET is the reference resistor that determines the amplifier’s output current (Figure 2) on the MAX5188. This current is mirrored into the current-source array, where it is equally distributed between matched current segments and summed to valid output current readings for the DACs. The MAX5188/MAX5191 provide an integrated 50ppm/°C, +1.2V, low-noise bandgap reference that can be disabled and overridden by an external reference voltage. REFO serves either as an input for an external reference or as an output for the integrated reference. If REN is connected to DGND, the internal reference is selected and REFO provides a +1.2V output. Inside the MAX5191, each output current (DAC1 and DAC2) is converted to an output voltage (V OUT1 , VOUT2) with two internal, ground-referenced, 400Ω load resistors. Using the internal +1.2V reference voltage, the integrated reference output current resistor of the MAX5191 (RSET = 9.6kΩ) sets IREF to 125µA and IFS to 1mA. 8 _______________________________________________________________________________________ Dual, 8-Bit, 40MHz, Current/Voltage, Alternate-Phase Output DACs MAX5188/MAX5191 OPTIONAL EXTERNAL BUFFER FOR HEAVIER LOADS DGND REN +1.2V BANDGAP REFERENCE MAX4040 REFO CCOMP* AGND IREF = VREF RSET RSET CURRENTSOURCE ARRAY IREF REFR IFS RSET** 9.6k MAX5188 MAX5191 AGND *COMPENSATION CAPACITOR (CCOMP = 100nF) **9.6kΩ REFERENCE CURRENT SET RESISTOR INTERNAL TO MAX5191 ONLY. USE EXTERNAL RSET FOR MAX5188. Figure 2. Setting IFS with the Internal +1.2V Reference and Control Amplifier External Reference To disable the MAX5188/MAX5191’s internal reference, connect REN to DVDD. A temperature-stable external reference may now be applied to drive the REFO pin (Figure 3) to set the full-scale output. Choose a reference that can supply at least 150µA to drive the bias circuit that generates the cascode current for the current array. For improved accuracy and drift performance, choose a fixed output voltage reference such as the +1.2V, 25ppm/°C MAX6520 bandgap reference. Standby Mode To enter the lower-power standby mode, connect digital inputs PD and DACEN to DGND. In standby, both the reference and the control amplifier are active with the current array inactive. To exit this condition, DACEN must be pulled high with PD held at DGND. The MAX5188/MAX5191 typically require 50µs to wake up and allow both the outputs and the reference to settle. Shutdown Mode For lowest power consumption, the MAX5188/MAX5191 provide a power-down mode in which the reference, control amplifier, and current array are inactive and the DAC’s supply current is reduced to 1µA. To enter this mode, connect PD to DVDD. To return to active mode, connect PD to DGND and DACEN to DVDD. About 50µs are required for the devices to leave shutdown mode and settle their outputs to the values prior to shutdown. Table 1 lists the power-down mode selection. Table 1. Power-Down Mode Selection PD (POWER-DOWN SELECT) DACEN (DAC ENABLE) POWER-DOWN MODE 0 0 Standby 0 1 Wake-Up 1 X Shutdown OUTPUT STATE MAX5188 High-Z MAX5191 AGND Last state prior to standby mode MAX5188 High-Z MAX5191 AGND X = Don’t care _______________________________________________________________________________________ 9 MAX5188/MAX5191 Dual, 8-Bit, 40MHz, Current/Voltage, Alternate-Phase Output DACs DVDD 10µF 0.1µF DGND REN +1.2V BANDGAP REFERENCE AVDD EXTERNAL +1.2V REFERENCE REFO IFS CURRENTSOURCE ARRAY REFR MAX6520 IREF AGND 9.6k* RSET MAX5188 MAX5191 AGND *9.6kΩ REFERENCE CURRENT SET RESISTOR INTERNAL TO MAX5191 ONLY. USE EXTERNAL RSET FOR MAX5188. Figure 3. MAX5188/MAX5191 Using an External Reference tCLK tCL tCH CLK N-1 D0–D7 N-1 DAC1 DAC2 OUT1 OUT2 DAC1 tDS2 tDS1 N N DAC2 DAC1 N+1 DAC2 tDH2 tDH1 N-1 N-1 N+1 N N N+1 N+1 Figure 4. Timing Diagram 10 ______________________________________________________________________________________ Dual, 8-Bit, 40MHz, Current/Voltage, Alternate-Phase Output DACs Outputs The MAX5188 outputs are designed to supply 1mA fullscale output currents into 400Ω loads in parallel with a capacitive load of 5pF. The MAX5191 features integrat- ed 400Ω resistors that restore the array currents into proportional, differential voltages of 400mV. These differential output voltages can then be used to drive a balun transformer or a low-distortion, high-speed operational amplifier to convert the differential voltage into a single-ended voltage. Applications Information Static and Dynamic Performance Definitions Integral Nonlinearity Integral nonlinearity (INL) (Figure 5a) is the deviation of the values on an actual transfer function from either a best-straight-line fit (closest approximation to the actual transfer curve) or a line drawn between the endpoints 7 6 5 4 AT STEP 011 (1/2 LSB ) 3 2 DIFFERENTIAL LINEARITY ERROR (-1/4 LSB) 4 3 1 LSB 2 AT STEP 001 (1/4 LSB ) 1 1 LSB 5 ANALOG OUTPUT VALUE ANALOG OUTPUT VALUE 6 DIFFERENTIAL LINEARITY ERROR (+1/4 LSB) 1 0 0 000 001 010 011 100 101 110 000 111 001 IDEAL DIAGRAM IDEAL OFFSET POINT 0 000 001 OFFSET ERROR (+1 1/4 LSB) ANALOG OUTPUT VALUE ANALOG OUTPUT VALUE 2 1 101 GAIN ERROR (-1 1/4 LSB) 6 IDEAL DIAGRAM ACTUAL FULL-SCALE OUTPUT 5 4 0 010 011 000 100 101 110 111 DIGITAL INPUT CODE DIGITAL INPUT CODE Figure 5c. Offset Error 100 IDEAL FULL-SCALE OUTPUT 7 ACTUAL DIAGRAM ACTUAL OFFSET POINT 011 Figure 5b. Differential Nonlinearity Figure 5a. Integral Nonlinearity 3 010 DIGITAL INPUT CODE DIGITAL INPUT CODE Figure 5d. Gain Error ______________________________________________________________________________________ 11 MAX5188/MAX5191 Timing Information Both internal DAC cells write to their outputs in alternate phase (Figure 4). The input latch of the first DAC (DAC1) is loaded after the clock signal transitions high. When the clock signal transitions low, the input latch of the second DAC (DAC2) is loaded. The contents of the first input latch are shifted into the DAC1 register on the rising edge of the clock; the contents of the second input latch are shifted into the input register of DAC2 on the falling edge of the clock. Both outputs are updated on alternate phases of the clock. MAX5188/MAX5191 Dual, 8-Bit, 40MHz, Current/Voltage, Alternate-Phase Output DACs of the transfer function once offset and gain errors have been nullified. For a DAC, the deviations are measured at every single step. Differential Nonlinearity Differential nonlinearity (DNL) (Figure 5b) is the difference between an actual step height and the ideal value of 1LSB. A DNL error specification of less than 1LSB guarantees no missing codes and a monotonic transfer function. Offset Error Offset error (Figure 5c) is the difference between the ideal and the actual offset point. For a DAC, the offset point is the step value when the digital input is zero. This error affects all codes by the same amount and can usually be compensated by trimming. Gain Error Gain error (Figure 5d) is the difference between the ideal and the actual full-scale output voltage on the transfer curve, after nullifying the offset error. This error alters the slope of the transfer function and corresponds to the same percentage error in each step. Settling Time The settling time is the amount of time required from the start of a transition until the DAC output settles its new output value to within the converter’s specified accuracy. Digital Feedthrough Digital feedthrough is the noise generated on a DAC’s output when any digital input transitions. Proper board layout and grounding will significantly reduce this noise, but there will always be some feedthrough caused by the DAC itself. Total Harmonic Distortion Total harmonic distortion (THD) is the ratio of the RMS sum of the input signal’s first five harmonics to the fundamental itself. This is expressed as: THD = 20 ⋅ log (V22 + V32 + V42 + V52 ) V1 where V1 is the fundamental amplitude, and V2 through V5 are the amplitudes of the 2nd- through 5th-order harmonics. Differential to Single-Ended Conversion The MAX4108 low-distortion, high input-bandwidth amplifier may be used to generate a voltage from the MAX5188’s current-array output. The differential voltage across OUT1P (or OUT2P) and OUT1N (or OUT2N) is converted into a single-ended voltage by designing an appropriate operational amplifier configuration as shown in Figure 6. Grounding and Power-Supply Decoupling Grounding and power-supply decoupling strongly influence the performance of the MAX5188/MAX5191. Unwanted digital crosstalk may couple through the input, reference, power-supply, and ground connections, which may affect dynamic specifications like SNR or SFDR. In addition, electromagnetic interference (EMI) can either couple into or be generated by the MAX5188/MAX5191. Therefore, grounding and powersupply decoupling guidelines for high-speed, high-frequency applications should be closely followed. First, a multilayer PC board with separate ground and power-supply planes is recommended. High-speed signals should run on controlled impedance lines directly above the ground plane. Since the MAX5188/ MAX5191 have separate analog and digital ground buses (AGND and DGND, respectively), the PC board should also have separate analog and digital ground sections with only one point connecting the two. Digital signals should run above the digital ground plane, and analog signals should run above the analog ground plane. Both devices have two power-supply inputs: analog VDD (AVDD) and digital VDD (DVDD). Each AVDD input should be decoupled with parallel 10µF and 0.1µF ceramic-chip capacitors as close to the pin as possible. Their opposite ends should have the shortest possible connection to the ground plane. The DVDD pins should also have separate 10µF and 0.1µF capacitors, again adjacent to their respective pins. Try to minimize the analog load capacitance for proper operation. For best performance, bypass CREF1 and CREF2 with lowESR, 0.1µF capacitors to AVDD. The power-supply voltages should also be decoupled with large tantalum or electrolytic capacitors at the point they enter the PC board. Ferrite beads with additional decoupling capacitors forming a pi network could also improve performance. Spurious-Free Dynamic Range Spurious-free dynamic range (SFDR) is the ratio of RMS amplitude of the fundamental (maximum signal component) to the RMS value of the next-largest distortion component. 12 ______________________________________________________________________________________ Dual, 8-Bit, 40MHz, Current/Voltage, Alternate-Phase Output DACs MAX5188/MAX5191 AVDD AVDD +3V 10µF +3V 0.1µF 0.1µF 10µF 0.1µF 0.1µF 402Ω DVDD CREF1 AVDD CREF2 CLK +5V 402Ω OUT1P OUTPUT1 400Ω* MAX5188 MAX5191 D0–D7 -5V MAX4108 OUT1N 402Ω 402Ω 400Ω* 402Ω REFO 402Ω 0.1µF +5V OUT2P OUTPUT2 400Ω* REFR -5V RSET** MAX4108 OUT2N 402Ω 402Ω 400Ω* DGND REN AGND **MAX5188 ONLY *400Ω RESISTORS INTERNAL TO MAX5191 ONLY. Figure 6. Differential to Single-Ended Conversion Using the MAX4108 Low-Distortion Amplifier Chip Information TRANSISTOR COUNT: 9464 SUBSTRATE CONNECTED TO GND ______________________________________________________________________________________ 13 Dual, 8-Bit, 40MHz, Current/Voltage, Alternate-Phase Output DACs QSOP.EPS MAX5188/MAX5191 Package Information 14 ______________________________________________________________________________________ Dual, 8-Bit, 40MHz, Current/Voltage, Alternate-Phase Output DACs MAX5188/MAX5191 NOTES ______________________________________________________________________________________ 15 MAX5188/MAX5191 Dual, 8-Bit, 40MHz, Current/Voltage, Alternate-Phase Output DACs NOTES Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 16 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 1999 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.