TI LM7812CT Lm340-n/lm78xx series 3-terminal positive regulator Datasheet

LM340-N, LM78xx
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LM340-N/LM78XX Series 3-Terminal Positive Regulators
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FEATURES
DESCRIPTION
•
•
The LM140/LM340A/LM340-N/LM78XXC monolithic
3-terminal positive voltage regulators employ internal
current-limiting, thermal shutdown and safe-area
compensation, making them essentially indestructible.
If adequate heat sinking is provided, they can deliver
over 1.0A output current. They are intended as fixed
voltage regulators in a wide range of applications
including local (on-card) regulation for elimination of
noise and distribution problems associated with
single-point regulation. In addition to use as fixed
voltage regulators, these devices can be used with
external components to obtain adjustable output
voltages and currents.
1
2
•
•
•
•
•
•
Complete Specifications at 1A Load
Output Voltage Tolerances of ±2% at Tj = 25°C
and ±4% Over the Temperature Range
(LM340A)
Line Regulation of 0.01% of VOUT/V of ΔVIN at
1A Load (LM340A)
Load Regulation of 0.3% of VOUT/A (LM340A)
Internal Thermal Overload Protection
Internal Short-circuit Current Limit
Output Transistor Safe Area Protection
P+ Product Enhancement Tested
Considerable effort was expended to make the entire
series of regulators easy to use and minimize the
number of external components. It is not necessary to
bypass the output, although this does improve
transient response. Input bypassing is needed only if
the regulator is located far from the filter capacitor of
the power supply.
The 5V, 12V, and 15V regulator options are available
in the steel TO-3 power package. The
LM340A/LM340-N/LM78XXC series is available in the
TO-220 plastic power package, and the LM340-N-5.0
is available in the SOT-223 package, as well as the
LM340-5.0 and LM340-12 in the surface-mount
DDPAK/TO-263 package.
Typical Applications
*Required if the regulator is located far from the power supply filter.
**Although no output capacitor is needed for stability, it does help
transient response. (If needed, use 0.1 μF, ceramic disc).
Figure 1. Fixed Output Regulator
VOUT = 5V + (5V/R1 + IQ) R2 5V/R1 > 3 IQ,
load regulation (Lr) ≈ [(R1 + R2)/R1] (Lr of LM340-5).
Figure 2. Adjustable Output Regulator
1
2
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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LM340-N, LM78xx
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SOT-223
DDPAK/TO-263
ΔIQ = 1.3 mA over line and load changes.
Figure 3. Current Regulator
Figure 4. Comparison between SOT-223 and
DDPAK/TO-263 Packages
Scale 1:1
Connection Diagrams
Figure 5. DDPAK/TO-263 Surface-Mount Package
Top View
See Package Number KTT0003B
Figure 6. 3-Lead SOT-223
Top View
See Package Number DCY
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1) (2) (3)
DC Input Voltage
35V
Internal Power Dissipation (4)
Internally Limited
Maximum Junction Temperature
150°C
−65°C to +150°C
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
ESD Susceptibility
(1)
(2)
(3)
(4)
(5)
TO-3 Package (NDS)
300°C
TO-220 Package (NDE), DDPAK/TO-263
Package (KTT)
230°C
(5)
2 kV
Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Conditions are conditions under which
the device functions but the specifications might not be ensured. For ensured specifications and test conditions see the Electrical
Characteristics.
Military datasheets are available upon request. At the time of printing, the military datasheet specifications for the LM140K-5.0/883,
LM140K-12/883, and LM140K-15/883 complied with the min and max limits for the respective versions of the LM140. The LM140H and
LM140K may also be procured as JAN devices on slash sheet JM38510/107.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
The maximum allowable power dissipation at any ambient temperature is a function of the maximum junction temperature for operation
(TJMAX = 125°C or 150°C), the junction-to-ambient thermal resistance (θJA), and the ambient temperature (TA). PDMAX = (TJMAX −
TA)/θJA. If this dissipation is exceeded, the die temperature will rise above TJMAX and the electrical specifications do not apply. If the die
temperature rises above 150°C, the device will go into thermal shutdown. For the TO-3 package (NDS), the junction-to-ambient thermal
resistance (θJA) is 39°C/W. When using a heatsink, θJA is the sum of the 4°C/W junction-to-case thermal resistance (θJC) of the TO-3
package and the case-to-ambient thermal resistance of the heatsink. For the TO-220 package (NDE), θJA is 54°C/W and θJC is 4°C/W. If
SOT-223 is used, the junction-to-ambient thermal resistance is 174°C/W and can be reduced by a heatsink (see Applications Hints on
heatsinking).If the DDPAK\TO-263 package is used, the thermal resistance can be reduced by increasing the PC board copper area
thermally connected to the package: Using 0.5 square inches of copper area, θJA is 50°C/W; with 1 square inch of copper area, θJAis
37°C/W; and with 1.6 or more inches of copper area, θJA is 32°C/W.
ESD rating is based on the human body model, 100 pF discharged through 1.5 kΩ.
Operating Conditions (1)
(1)
2
Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Conditions are conditions under which
the device functions but the specifications might not be ensured. For ensured specifications and test conditions see the Electrical
Characteristics.
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Operating Conditions(1) (continued)
LM140
Temperature Range (TA) (2)
(2)
−55°C to +125°C
LM340A, LM340-N
0°C to +125°C
LM7808C
0°C to +125°C
The maximum allowable power dissipation at any ambient temperature is a function of the maximum junction temperature for operation
(TJMAX = 125°C or 150°C), the junction-to-ambient thermal resistance (θJA), and the ambient temperature (TA). PDMAX = (TJMAX −
TA)/θJA. If this dissipation is exceeded, the die temperature will rise above TJMAX and the electrical specifications do not apply. If the die
temperature rises above 150°C, the device will go into thermal shutdown. For the TO-3 package (NDS), the junction-to-ambient thermal
resistance (θJA) is 39°C/W. When using a heatsink, θJA is the sum of the 4°C/W junction-to-case thermal resistance (θJC) of the TO-3
package and the case-to-ambient thermal resistance of the heatsink. For the TO-220 package (NDE), θJA is 54°C/W and θJC is 4°C/W. If
SOT-223 is used, the junction-to-ambient thermal resistance is 174°C/W and can be reduced by a heatsink (see Applications Hints on
heatsinking).If the DDPAK\TO-263 package is used, the thermal resistance can be reduced by increasing the PC board copper area
thermally connected to the package: Using 0.5 square inches of copper area, θJA is 50°C/W; with 1 square inch of copper area, θJAis
37°C/W; and with 1.6 or more inches of copper area, θJA is 32°C/W.
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LM340A Electrical Characteristics
IOUT = 1A, 0°C ≤ TJ ≤ + 125°C (LM340A) unless otherwise specified (1)
Output Voltage
Symbol
Input Voltage (unless otherwise noted)
Parameter
VO
5V
Output
Voltage
Conditions
10V
Line
Regulation
19V
Units
Max
Min
Typ
Max
Min
Typ
Max
TJ = 25°C
4.9
5
5.1
11.75
12
12.25
14.7
15
15.3
V
PD ≤ 15W, 5 mA ≤ IO ≤ 1A
4.8
5.2
11.5
12.5
14.4
15.6
V
(7.5 ≤ VIN ≤ 20)
IO = 500 mA
ΔVIN
(7.5 ≤ VIN ≤ 20)
3
10
4
5 mA ≤ IO ≤ 1.5A
10
250 mA ≤ IO ≤
750 mA
Over Temperature,
V
4
mV
(16 ≤ VIN ≤ 22)
25
12
22
(17.5 ≤ VIN ≤ 30)
30
(8 ≤ VIN ≤ 12)
mV
(17.9 ≤ VIN ≤ 30)
9
12
ΔVIN
V
22
18
(14.5 ≤ VIN ≤ 27)
4
Over Temperature
(17.9 ≤ VIN ≤ 30)
18
(14.8 ≤ VIN ≤ 27)
(7.5 ≤ VIN ≤ 20)
TJ = 25°C
TJ =
25°C
(14.8 ≤ VIN ≤ 27)
10
ΔVIN
Load
Regulation
23V
Typ
TJ = 25°C
ΔVO
15V
Min
VMIN ≤ VIN ≤ VMAX
ΔVO
12V
V
10
mV
30
mV
(20 ≤ VIN ≤ 26)
V
12
35
mV
32
15
19
21
mV
25
60
75
mV
5 mA ≤ IO ≤ 1A
IQ
ΔIQ
Quiescent
Current
TJ = 25°C
Quiescent
Current
Change
5 mA ≤ IO ≤ 1A
Over Temperature
6
6
mA
6.5
6.5
mA
0.5
TJ = 25°C, IO = 1A
0.5
0.8
VMIN ≤ VIN ≤ VMAX
(7.5 ≤ VIN ≤ 20)
IO = 500 mA
(14.8 ≤ VIN ≤ 27)
TA = 25°C, 10 Hz ≤ f ≤ 100
kHz
Ripple
Rejection
TJ = 25°C, f = 120 Hz, IO =
1A
68
or f = 120 Hz, IO = 500 mA,
68
(15 ≤ VIN ≤ 30)
40
80
72
61
mA
(17.9 ≤ VIN ≤ 30)
V
0.8
mA
(17.9 ≤ VIN ≤ 30)
V
90
μV
70
dB
75
61
mA
0.8
0.8
(8 ≤ VIN ≤ 25)
Output Noise
Voltage
0.5
0.8
0.8
VMIN ≤ VIN ≤ VMAX
VN
6
6.5
60
60
dB
(18.5 ≤ VIN ≤ 28.5)
V
Over Temperature,
VMIN ≤ VIN ≤ VMAX
RO
VIN
(1)
4
Dropout
Voltage
TJ = 25°C, IO = 1A
Output
Resistance
(8 ≤ VIN ≤ 18)
(15 ≤ VIN ≤ 25)
2.0
2.0
2.0
V
f = 1 kHz
8
18
19
mΩ
Short-Circuit
Current
TJ = 25°C
2.1
1.5
1.2
A
Peak Output
Current
TJ = 25°C
2.4
2.4
2.4
A
Average TC
of VO
Min, TJ = 0°C, IO = 5 mA
−0.6
−1.5
−1.8
mV/°C
Input Voltage TJ = 25°C
Required to
Maintain Line
Regulation
7.5
14.5
17.5
V
All characteristics are measured with a 0.22 μF capacitor from input to ground and a 0.1 μF capacitor from output to ground. All
characteristics except noise voltage and ripple rejection ratio are measured using pulse techniques (tw ≤ 10 ms, duty cycle ≤ 5%).
Output voltage changes due to changes in internal temperature must be taken into account separately.
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LM140 Electrical Characteristics (1)
−55°C ≤ TJ ≤ +150°C unless otherwise specified
Output Voltage
Symb
ol
Input Voltage (unless otherwise noted)
Parameter
VO
5V
Conditions
10V
Min
Typ
Output Voltage TJ = 25°C, 5 mA ≤ IO ≤ 1A
4.8
5
PD ≤ 15W, 5 mA ≤ IO ≤ 1A
4.75
VMIN ≤ VIN ≤ VMAX
ΔVO
Line
Regulation
IO = 500
mA
12V
19V
Min
Typ
Max
5.2
11.5
12
5.25
11.4
3
ΔVIN
Load
Regulation
TJ =
25°C
10
250 mA ≤ IP ≤
750 mA
V
V
V
mV
120
150
(17.5 ≤ VIN ≤ 30)
120
V
150
mV
(18.5 ≤ VIN ≤ 30)
120
(14.6 ≤ VIN ≤ 27)
(8 ≤ VIN ≤ 12)
5 mA ≤ IO ≤
1.5A
15.6
15.75
4
25
ΔVIN
ΔVO
15
14.25
(15 ≤ VIN ≤ 27)
(7.5 ≤ VIN ≤ 20)
−55°C ≤ TJ ≤
+150°C
14.4
12.6
Units
Max
(18.5 ≤ VIN ≤ 30)
50
ΔVIN
12.5
(14.5 ≤ VIN ≤ 30)
(8 ≤ VIN ≤ 20)
TJ = 25°C
Typ
4
50
ΔVIN
Min
(15.5 ≤ VIN ≤ 27)
50
(7 ≤ VIN ≤ 25)
−55°C ≤ TJ ≤
+150°C
IO ≤ 1A
23V
Max
(8 ≤ VIN ≤ 20)
TJ = 25°C
15V
V
150
mV
(17.7 ≤ VIN ≤ 30)
60
V
75
mV
(16 ≤ VIN ≤ 22)
(20 ≤ VIN ≤ 26)
V
12
12
150
mV
50
120
25
60
75
mV
50
120
150
mV
TJ = 25°C
6
6
6
mA
−55°C ≤ TJ ≤
+150°C
7
7
7
mA
−55°C ≤ TJ ≤ +150°C,
5 mA ≤ IO ≤ 1A
IQ
ΔIQ
Quiescent
Current
IO ≤ 1A
Quiescent
Current
Change
5 mA ≤ IO ≤ 1A
0.5
TJ = 25°C, IO ≤ 1A
0.8
VMIN ≤ VIN ≤ VMAX
(8 ≤ VIN ≤ 20)
IO = 500 mA, −55°C ≤ TJ ≤
+150°C
Output Noise
Voltage
Ripple
Rejection
RO
(1)
TA = 25°C, 10 Hz ≤ f ≤ 100
kHz
f = 120
Hz
IO ≤ 1A, TJ =
25°C or
68
IO ≤ 500 mA,
−55°C ≤ TJ
≤+150°C
68
0.5
0.8
(15 ≤ VIN ≤ 27)
0.8
VMIN ≤ VIN ≤ VMAX
VN
0.5
mA
0.8
mA
(18.5 ≤ VIN ≤ 30)
0.8
V
0.8
mA
(8 ≤ VIN ≤ 25)
(15 ≤ VIN ≤ 30)
(18.5 ≤ VIN ≤ 30)
V
40
75
90
μV
70
dB
80
61
72
60
61
60
dB
VMIN ≤ VIN ≤ VMAX
(8 ≤ VIN ≤ 18)
(15 ≤ VIN ≤ 25)
(18.5 ≤ VIN ≤ 28.5)
V
Dropout
Voltage
TJ = 25°C, IO = 1A
2.0
2.0
2.0
V
Output
Resistance
f = 1 kHz
8
18
19
mΩ
Short-Circuit
Current
TJ = 25°C
2.1
1.5
1.2
A
Peak Output
Current
TJ = 25°C
2.4
2.4
2.4
A
Average TC of
VOUT
0°C ≤ TJ ≤ +150°C, IO = 5
mA
−0.6
−1.5
−1.8
mV/°C
All characteristics are measured with a 0.22 μF capacitor from input to ground and a 0.1 μF capacitor from output to ground. All
characteristics except noise voltage and ripple rejection ratio are measured using pulse techniques (tw ≤ 10 ms, duty cycle ≤ 5%).
Output voltage changes due to changes in internal temperature must be taken into account separately.
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LM140 Electrical Characteristics(1) (continued)
−55°C ≤ TJ ≤ +150°C unless otherwise specified
Output Voltage
Symb
ol
5V
Input Voltage (unless otherwise noted)
Parameter
VIN
Conditions
12V
10V
Min
Typ
15V
19V
Max
Min
Typ
23V
Max
Min
Typ
Units
Max
TJ = 25°C, IO ≤ 1A
Input Voltage
Required to
Maintain Line
Regulation
7.5
14.6
17.7
V
LM340-N Electrical Characteristics (1)
0°C ≤ TJ ≤ +125°C unless otherwise specified
Output Voltage
Symbol
Input Voltage (unless otherwise noted)
Parameter
VO
5V
Output Voltage
Line Regulation
10V
19V
Max
Min
Typ
Max
Min
Typ
Max
TJ = 25°C, 5 mA ≤ IO ≤ 1A
4.8
5
5.2
11.5
12
12.5
14.4
15
15.6
V
PD ≤ 15W, 5 mA ≤ IO ≤ 1A
4.75
5.25
11.4
12.6
14.25
15.75
V
IO = 500
mA
IO ≤ 1A
(7.5 ≤ VIN ≤ 20)
(14.5 ≤ VIN ≤ 27)
(17.5 ≤ VIN ≤ 30)
V
3
4
4
mV
TJ = 25°C
ΔVIN
(8 ≤ VIN ≤ 20)
TJ = 25°C
50
(8 ≤ VIN ≤ 12)
5 mA ≤ IO ≤
1.5A
10
75
V
mV
(16 ≤ VIN ≤ 22)
(20 ≤ VIN ≤ 26)
V
12
12
150
mV
50
120
75
mV
5 mA ≤ IO ≤ 1A, 0°C ≤ TJ
≤ +125°C
50
120
150
mV
IO ≤ 1A
Quiescent
Current Change
5 mA ≤ IO ≤ 1A
TJ = 25°C
8
8
8
mA
0°C ≤ TJ ≤
+125°C
8.5
8.5
8.5
mA
0.5
TJ = 25°C, IO ≤ 1A
(7.5 ≤ VIN ≤ 20)
f = 120
Hz
IO ≤ 1A, TJ =
25°C
62
or IO ≤ 500
mA,
0°C ≤ TJ ≤
+125°C
62
VMIN ≤ VIN ≤ VMAX
0.5
1.0
(14.8 ≤ VIN ≤ 27)
1.0
TA = 25°C, 10 Hz ≤ f ≤
100 kHz
Ripple Rejection
0.5
1.0
VMIN ≤ VIN ≤ VMAX
6
60
mV
60
IO ≤ 500 mA, 0°C ≤ TJ ≤
+125°C
(1)
150
(17.7 ≤ VIN ≤ 30)
V
25
Quiescent
Current
Output Noise
Voltage
120
V
mV
250 mA ≤ IO ≤
750 mA
VMIN ≤ VIN ≤ VMAX
VN
150
(18.5 ≤ VIN ≤ 30)
(14.6 ≤ VIN ≤ 27)
25
150
(17.5 ≤ VIN ≤ 30)
120
(15 ≤ VIN ≤ 27)
(7.5 ≤ VIN ≤ 20)
ΔVIN
120
(14.5 ≤ VIN ≤ 30)
50
0°C ≤ TJ ≤
+125°C
Load Regulation TJ =
25°C
50
(7 ≤ VIN ≤ 25)
ΔVIN
ΔIQ
Units
Typ
ΔVIN
IQ
23V
Min
0°C ≤ TJ ≤
+125°C
ΔVO
15V
Conditions
VMIN ≤ VIN ≤ VMAX
ΔVO
12V
mA
1.0
(17.9 ≤ VIN ≤ 30)
1.0
1.0
mA
V
mA
(7 ≤ VIN ≤ 25)
(14.5 ≤ VIN ≤ 30)
(17.5 ≤ VIN ≤ 30)
V
40
75
90
μV
70
dB
80
55
72
55
(8 ≤ VIN ≤ 18)
(15 ≤ VIN ≤ 25)
54
54
dB
(18.5 ≤ VIN ≤ 28.5)
V
All characteristics are measured with a 0.22 μF capacitor from input to ground and a 0.1 μF capacitor from output to ground. All
characteristics except noise voltage and ripple rejection ratio are measured using pulse techniques (tw ≤ 10 ms, duty cycle ≤ 5%).
Output voltage changes due to changes in internal temperature must be taken into account separately.
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LM340-N Electrical Characteristics(1) (continued)
0°C ≤ TJ ≤ +125°C unless otherwise specified
Output Voltage
Symbol
Input Voltage (unless otherwise noted)
Parameter
RO
5V
Conditions
10V
Min
Dropout Voltage TJ = 25°C, IO = 1A
VIN
12V
Typ
15V
19V
Max
Min
23V
Typ
Max
Min
Typ
Units
Max
2.0
2.0
2.0
V
Output
Resistance
f = 1 kHz
8
18
19
mΩ
Short-Circuit
Current
TJ = 25°C
2.1
1.5
1.2
A
Peak Output
Current
TJ = 25°C
2.4
2.4
2.4
A
Average TC of
VOUT
0°C ≤ TJ ≤ +125°C, IO = 5
mA
−0.6
−1.5
−1.8
mV/°C
Input Voltage
Required to
Maintain Line
Regulation
TJ = 25°C, IO ≤ 1A
7.5
14.6
17.7
V
LM7808C
Electrical Characteristics
0°C ≤ TJ ≤ +150°C, VI = 14V, IO = 500 mA, CI = 0.33 μF, CO = 0.1 μF, unless otherwise specified
Symbol
Conditions (1)
Parameter
VO
Output Voltage
TJ = 25°C
ΔVO
Line Regulation
TJ = 25°C
LM7808C
Units
Min
Typ
Max
7.7
8.0
8.3
V
10.5V ≤ VI ≤ 25V
6.0
160
mV
11.0V ≤ VI ≤ 17V
2.0
80
5.0 mA ≤ IO ≤ 1.5A
12
160
ΔVO
Load Regulation
TJ = 25°C
VO
Output Voltage
11.5V ≤ VI ≤ 23V, 5.0 mA ≤ IO ≤ 1.0A, P ≤ 15W
IQ
Quiescent Current
TJ = 25°C
ΔIQ
Quiescent
With Line
11.5V ≤ VI ≤ 25V
Current Change
With Load
5.0 mA ≤ IO ≤ 1.0A
250 mA ≤ IO ≤ 750 mA
4.0
7.6
4.3
mV
80
8.4
V
8.0
mA
1.0
mA
0.5
VN
Noise
TA = 25°C, 10 Hz ≤ f ≤ 100 kHz
ΔVI/ΔVO
Ripple Rejection
f = 120 Hz, IO = 350 mA, TJ = 25°C
VDO
Dropout Voltage
IO = 1.0A, TJ = 25°C
2.0
V
RO
Output Resistance
f = 1.0 kHz
16
mΩ
IOS
Output Short Circuit Current
TJ = 25°C, VI = 35V
0.45
A
IPK
Peak Output Current
TJ = 25°C
2.2
A
ΔVO/ΔT
Average Temperature Coefficient of
Output Voltage
IO = 5.0 mA
0.8
mV/°C
(1)
56
52
μV
72
dB
All characteristics are measured with a 0.22 μF capacitor from input to ground and a 0.1 μF capacitor from output to ground. All
characteristics except noise voltage and ripple rejection ratio are measured using pulse techniques (tw ≤ 10 ms, duty cycle ≤ 5%).
Output voltage changes due to changes in internal temperature must be taken into account separately.
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Typical Performance Characteristics
Maximum Average Power Dissipation
Maximum Average Power Dissipation
Figure 7.
Figure 8.
Maximum Power Dissipation (DDPAK/TO-263)
(See Note 2)
Output Voltage (Normalized to 1V at TJ = 25°C)
Figure 9.
8
Shaded area refers to LM340A/LM340-N, LM7805C, LM7812C and
LM7815C.
Figure 10.
Ripple Rejection
Ripple Rejection
Figure 11.
Figure 12.
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Typical Performance Characteristics (continued)
Output Impedance
Dropout Characteristics
Figure 13.
Figure 14.
Quiescent Current
Peak Output Current
Shaded area refers to LM340A/LM340-N, LM7805C, LM7812C and
LM7815C.
Figure 15.
Dropout Voltage
Figure 16.
Quiescent Current
Shaded area refers to LM340A/LM340-N, LM7805C, LM7812C and
LM7815C.
Figure 17.
Figure 18.
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Typical Performance Characteristics (continued)
Line Regulation
140AK-5.0, IOUT = 1A, TA = 25°C
Line Regulation
140AK-5.0, VIN = 10V, TA = 25°C
Figure 19.
Figure 20.
Equivalent Schematic
10
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SNOSBT0I – FEBRUARY 2000 – REVISED MARCH 2013
APPLICATION HINTS
The LM340-N/LM78XX series is designed with thermal protection, output short-circuit protection and output
transistor safe area protection. However, as with any IC regulator, it becomes necessary to take precautions to
assure that the regulator is not inadvertently damaged. The following describes possible misapplications and
methods to prevent damage to the regulator.
SHORTING THE REGULATOR INPUT
When using large capacitors at the output of these regulators, a protection diode connected input to output
(Figure 21) may be required if the input is shorted to ground. Without the protection diode, an input short will
cause the input to rapidly approach ground potential, while the output remains near the initial VOUTbecause of the
stored charge in the large output capacitor. The capacitor will then discharge through a large internal input to
output diode and parasitic transistors. If the energy released by the capacitor is large enough, this diode, low
current metal and the regulator will be destroyed. The fast diode in Figure 21 will shunt most of the capacitors
discharge current around the regulator. Generally no protection diode is required for values of output capacitance
≤ 10 μF.
RAISING THE OUTPUT VOLTAGE ABOVE THE INPUT VOLTAGE
Since the output of the device does not sink current, forcing the output high can cause damage to internal low
current paths in a manner similar to that just described in the “Shorting the Regulator Input” section.
REGULATOR FLOATING GROUND (Figure 22)
When the ground pin alone becomes disconnected, the output approaches the unregulated input, causing
possible damage to other circuits connected to VOUT. If ground is reconnected with power “ON”, damage may
also occur to the regulator. This fault is most likely to occur when plugging in regulators or modules with on card
regulators into powered up sockets. Power should be turned off first, thermal limit ceases operating, or ground
should be connected first if power must be left on.
TRANSIENT VOLTAGES
If transients exceed the maximum rated input voltage of the device, or reach more than 0.8V below ground and
have sufficient energy, they will damage the regulator. The solution is to use a large input capacitor, a series
input breakdown diode, a choke, a transient suppressor or a combination of these.
Figure 21. Input Short
Figure 22. Regulator Floating Ground
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Figure 23. Transients
When a value for θ(H–A) is found using the equation shown, a heatsink must be selected that has a value that is
less than or equal to this number.
θ(H–A) is specified numerically by the heatsink manufacturer in this catalog, or shown in a curve that plots
temperature rise vs power dissipation for the heatsink.
HEATSINKING DDPAK/TO-263 AND SOT-223 PACKAGE PARTS
Both the DDPAK/TO-263 (KTT) and SOT-223 (DCY) packages use a copper plane on the PCB and the PCB
itself as a heatsink. To optimize the heat sinking ability of the plane and PCB, solder the tab of the plane.
shows for the DDPAK/TO-263 the measured values of θ(J–A) for different copper area sizes using a typical PCB
with 1 ounce copper and no solder mask over the copper area used for heatsinking.
Figure 24. θ(J–A) vs Copper (1 ounce) Area for the DDPAK/TO-263 Package
As shown in the figure, increasing the copper area beyond 1 square inch produces very little improvement. It
should also be observed that the minimum value of θ(J–A) for the DDPAK/TO-263 package mounted to a PCB is
32°C/W.
As a design aid, Figure 25 shows the maximum allowable power dissipation compared to ambient temperature
for the DDPAK/TO-263 device (assuming θ(J–A) is 35°C/W and the maximum junction temperature is 125°C).
12
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SNOSBT0I – FEBRUARY 2000 – REVISED MARCH 2013
Figure 25. Maximum Power Dissipation vs TAMB for the DDPAK/TO-263 Package
Figure 26 and Figure 27 show the information for the SOT-223 package. Figure 26 assumes a θ(J–A) of 74°C/W
for 1 ounce copper and 51°C/W for 2 ounce copper and a maximum junction temperature of 125°C.
Figure 26. θ(J–A) vs Copper (2 ounce) Area
for the SOT-223 Package
Figure 27. Maximum Power Dissipation vs
TAMB for the SOT-223 Package
Please see AN-1028 (SNVA036) for power enhancement techniques to be used with the SOT-223 package.
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Typical Applications
INPUT
OUTPUT
VI
VO
+
+
0.22 PF
0.1 PF
GND
Bypass capacitors are recommended for optimum stability and transient response, and should be located as close as
possible to the regulator.
Figure 28. Fixed Output Regulator
INPUT
OUTPUT
VI
VO
0.22 PF
VI
0.1 PF
(NOTE 1)
GND
INPUT
OUTPUT
VO
GND
0.22 PF
0.1 PF
Figure 29. High Input Voltage Circuits
14
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SNOSBT0I – FEBRUARY 2000 – REVISED MARCH 2013
Q1
2N6133
IQ1
VI
R1
3.0:
IREG
IO MAX
OUTPUT
VO
INPUT
0.22 PF
0.1 PF
GND
Figure 30. High Current Voltage Regulator
RSC
Q1
2N6132
IN
Q2
2N6124
INPUT
OUT
R1
3.0:
OUTPUT
0.22 PF
GND
0.1 PF
Figure 31. High Output Current, Short Circuit Protected
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INPUT
OUTPUT
+
+ OUT
+
0.1 PF
GND
INPUT
OUTPUT
+
+
GND
0.1 PF
- OUT
Figure 32. Positive and Negative Regulator
16
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SNOSBT0I – FEBRUARY 2000 – REVISED MARCH 2013
REVISION HISTORY
Changes from Revision H (March 2013) to Revision I
•
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 16
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17
PACKAGE OPTION ADDENDUM
www.ti.com
1-Nov-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LM340AT-5.0
NRND
TO-220
NDE
3
45
TBD
Call TI
Call TI
0 to 70
LM340AT
5.0 P+
LM340AT-5.0/NOPB
ACTIVE
TO-220
NDE
3
45
Pb-Free (RoHS
Exempt)
CU SN
Level-1-NA-UNLIM
0 to 70
LM340AT
5.0 P+
LM340K-5.0
ACTIVE
TO-3
NDS
2
50
TBD
Call TI
Call TI
0 to 70
LM340K
-5.0 7805P+
LM340K-5.0/NOPB
ACTIVE
TO-3
NDS
2
50
Green (RoHS
& no Sb/Br)
POST-PLATE
Level-1-NA-UNLIM
0 to 70
LM340K
-5.0 7805P+
LM340MP-5.0
NRND
SOT-223
DCY
4
1000
TBD
Call TI
Call TI
0 to 70
N00A
LM340MP-5.0/NOPB
ACTIVE
SOT-223
DCY
4
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 70
N00A
LM340MPX-5.0/NOPB
ACTIVE
SOT-223
DCY
4
2000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 70
N00A
LM340S-12/NOPB
ACTIVE
DDPAK/
TO-263
KTT
3
45
Pb-Free (RoHS
Exempt)
CU SN
Level-3-245C-168 HR
0 to 70
LM340S
-12 P+
LM340S-5.0
NRND
DDPAK/
TO-263
KTT
3
45
TBD
Call TI
Call TI
0 to 70
LM340S
-5.0 P+
LM340S-5.0/NOPB
ACTIVE
DDPAK/
TO-263
KTT
3
45
Pb-Free (RoHS
Exempt)
CU SN
Level-3-245C-168 HR
0 to 70
LM340S
-5.0 P+
LM340SX-12
NRND
DDPAK/
TO-263
KTT
3
500
TBD
Call TI
Call TI
0 to 70
LM340S
-12 P+
LM340SX-12/NOPB
ACTIVE
DDPAK/
TO-263
KTT
3
500
Pb-Free (RoHS
Exempt)
CU SN
Level-3-245C-168 HR
0 to 70
LM340S
-12 P+
LM340SX-5.0
NRND
DDPAK/
TO-263
KTT
3
500
TBD
Call TI
Call TI
0 to 70
LM340S
-5.0 P+
LM340SX-5.0/NOPB
ACTIVE
DDPAK/
TO-263
KTT
3
500
Pb-Free (RoHS
Exempt)
CU SN
Level-3-245C-168 HR
0 to 70
LM340S
-5.0 P+
LM340T-12
NRND
TO-220
NDE
3
45
TBD
Call TI
Call TI
0 to 70
LM340T12
7812 P+
LM340T-12/NOPB
ACTIVE
TO-220
NDE
3
45
Green (RoHS
& no Sb/Br)
CU SN
Level-1-NA-UNLIM
0 to 70
LM340T12
7812 P+
LM340T-15
NRND
TO-220
NDE
3
45
TBD
Call TI
Call TI
0 to 70
LM340T15
7815 P+
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
1-Nov-2013
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LM340T-15/NOPB
ACTIVE
TO-220
NDE
3
45
Green (RoHS
& no Sb/Br)
CU SN
Level-1-NA-UNLIM
0 to 70
LM340T15
7815 P+
LM340T-5.0
NRND
TO-220
NDE
3
45
TBD
Call TI
Call TI
0 to 70
LM340T5
7805 P+
LM340T-5.0/LF01
ACTIVE
TO-220
NDG
3
45
Pb-Free (RoHS
Exempt)
CU SN
Level-4-260C-72 HR
LM340T-5.0/NOPB
ACTIVE
TO-220
NDE
3
45
Pb-Free (RoHS
Exempt)
CU SN
Level-1-NA-UNLIM
0 to 70
LM340T5
7805 P+
LM7812CT
NRND
TO-220
NDE
3
45
TBD
Call TI
Call TI
0 to 70
LM340T12
7812 P+
LM7812CT/NOPB
ACTIVE
TO-220
NDE
3
45
Green (RoHS
& no Sb/Br)
CU SN
Level-1-NA-UNLIM
0 to 70
LM340T12
7812 P+
LM340T5
7805 P+
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Addendum-Page 2
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
1-Nov-2013
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Apr-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
LM340MP-5.0
SOT-223
DCY
4
1000
330.0
16.4
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
7.0
7.5
2.2
12.0
16.0
Q3
LM340MP-5.0/NOPB
SOT-223
DCY
4
1000
330.0
16.4
7.0
7.5
2.2
12.0
16.0
Q3
LM340MPX-5.0/NOPB
SOT-223
DCY
4
2000
330.0
16.4
7.0
7.5
2.2
12.0
16.0
Q3
LM340SX-12
DDPAK/
TO-263
KTT
3
500
330.0
24.4
10.75
14.85
5.0
16.0
24.0
Q2
LM340SX-12/NOPB
DDPAK/
TO-263
KTT
3
500
330.0
24.4
10.75
14.85
5.0
16.0
24.0
Q2
LM340SX-5.0
DDPAK/
TO-263
KTT
3
500
330.0
24.4
10.75
14.85
5.0
16.0
24.0
Q2
LM340SX-5.0/NOPB
DDPAK/
TO-263
KTT
3
500
330.0
24.4
10.75
14.85
5.0
16.0
24.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Apr-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM340MP-5.0
SOT-223
DCY
4
1000
367.0
367.0
35.0
LM340MP-5.0/NOPB
SOT-223
DCY
4
1000
367.0
367.0
35.0
LM340MPX-5.0/NOPB
SOT-223
DCY
4
2000
367.0
367.0
35.0
LM340SX-12
DDPAK/TO-263
KTT
3
500
367.0
367.0
45.0
LM340SX-12/NOPB
DDPAK/TO-263
KTT
3
500
367.0
367.0
45.0
LM340SX-5.0
DDPAK/TO-263
KTT
3
500
367.0
367.0
45.0
LM340SX-5.0/NOPB
DDPAK/TO-263
KTT
3
500
367.0
367.0
45.0
Pack Materials-Page 2
MECHANICAL DATA
NDS0002A
www.ti.com
MECHANICAL DATA
NDE0003B
www.ti.com
MECHANICAL DATA
NDG0003F
T03F (Rev B)
www.ti.com
MECHANICAL DATA
MPDS094A – APRIL 2001 – REVISED JUNE 2002
DCY (R-PDSO-G4)
PLASTIC SMALL-OUTLINE
6,70 (0.264)
6,30 (0.248)
3,10 (0.122)
2,90 (0.114)
4
0,10 (0.004) M
3,70 (0.146)
3,30 (0.130)
7,30 (0.287)
6,70 (0.264)
Gauge Plane
1
2
0,84 (0.033)
0,66 (0.026)
2,30 (0.091)
4,60 (0.181)
1,80 (0.071) MAX
3
0°–10°
0,10 (0.004) M
0,25 (0.010)
0,75 (0.030) MIN
1,70 (0.067)
1,50 (0.059)
0,35 (0.014)
0,23 (0.009)
Seating Plane
0,08 (0.003)
0,10 (0.0040)
0,02 (0.0008)
4202506/B 06/2002
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters (inches).
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion.
Falls within JEDEC TO-261 Variation AA.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
KTT0003B
TS3B (Rev F)
BOTTOM SIDE OF PACKAGE
www.ti.com
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