M54HC393 RAD-HARD DUAL BINARY COUNTER ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 79 MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 54 SERIES 393 SPACE GRADE-1: ESA SCC QUALIFIED 50 krad QUALIFIED, 100 krad AVAILABLE ON REQUEST NO SEL UNDER HIGH LET HEAVY IONS IRRADIATION DEVICE FULLY COMPLIANT WITH SCC-9204-074 DESCRIPTION The M54HC393 is an high speed CMOS DUAL BINARY COUNTER fabricated with silicon gate C2MOS technology. This counter circuit contains independent ripple carry counters and two 4-bit ripple carry binary DILC-14 FPC-14 ORDER CODES PACKAGE FM EM DILC FPC M54HC14D M54HC14K M54HC14D1 M54HC14K1 counters, which can be cascaded to create a single divide by 256 counter. Each 4-bit counter is increases during the high to low transition (negative edge) of the clock input, and each has an independent clear input. When CLEAR is set to low, all four bits of each counter are set to a low level. This enables count truncation and allows the implementation of divide by N counter configurations. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION May 2004 Rev. 1 1/12 M54HC393 Figure 1: IEC Logic Symbols Figure 2: Input And Output Equivalent Circuit Table 1: Pin Description PIN N° 1, 13 2, 12 3, 4, 5, 6 11, 10, 9, 8 7 14 2/12 SYMBOL NAME AND FUNCTION Clock Input Divide by 2 1 CLOCK Section (HIGH to LOW 2 CLOCK Edge-Triggered) 1 CLEAR Asynchronous Master 2 CLEAR Reset Inputs 1QA to 1QD Flip Flop Outputs 2QA to 2QD Flip Flop Outputs GND Ground (0V) VCC Positive Supply Voltage M54HC393 Table 2: Truth Table INPUTS OUTPUTS CLOCK CLEAR QD QC QB QA X H L L L L L COUNT UP L NO CHANGE X : Don’t Care OUTPUTS COUNT 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 QD QC QB QA L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H 3/12 M54HC393 Figure 3: Logic Diagram This logic diagram has not be used to estimate propagation delays Figure 4: Timing Chart 4/12 M54HC393 Table 3: Absolute Maximum Ratings Symbol VCC Parameter Supply Voltage Value Unit -0.5 to +7 V VI DC Input Voltage -0.5 to VCC + 0.5 V VO DC Output Voltage -0.5 to VCC + 0.5 ± 20 V mA IIK DC Input Diode Current IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 25 mA ± 50 mA ICC or IGND DC VCC or Ground Current PD Power Dissipation Tstg Storage Temperature TL Lead Temperature (10 sec) 300 mW -65 to +150 °C 265 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied Table 4: Recommended Operating Conditions Symbol VCC Parameter Supply Voltage VI Input Voltage VO Output Voltage Top Operating Temperature Input Rise and Fall Time tr, tf Value Unit 2 to 6 V 0 to VCC V 0 to VCC V -55 to 125 °C VCC = 2.0V 0 to 1000 ns VCC = 4.5V 0 to 500 ns VCC = 6.0V 0 to 400 ns 5/12 M54HC393 Table 5: DC Specifications Test Condition Symbol VIH VIL VOH VOL II ICC 6/12 Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Leakage Current Quiescent Supply Current Value TA = 25°C VCC (V) Min. 2.0 4.5 6.0 2.0 4.5 6.0 Typ. Max. 1.5 3.15 4.2 -40 to 85°C -55 to 125°C Min. Min. Max. 1.5 3.15 4.2 0.5 1.35 1.8 Max. 1.5 3.15 4.2 0.5 1.35 1.8 Unit V 0.5 1.35 1.8 2.0 IO=-20 µA 1.9 2.0 1.9 1.9 4.5 IO=-20 µA 4.4 4.5 4.4 4.4 6.0 IO=-20 µA 5.9 6.0 5.9 5.9 4.5 IO=-4.0 mA 4.18 4.31 4.13 4.10 6.0 IO=-5.2 mA 5.68 5.8 5.63 5.60 2.0 IO=20 µA 0.0 0.1 0.1 0.1 4.5 IO=20 µA 0.0 0.1 0.1 0.1 V V 6.0 IO=20 µA 0.0 0.1 0.1 0.1 4.5 IO=4.0 mA 0.17 0.26 0.33 0.40 6.0 IO=5.2 mA 0.18 0.26 0.33 0.40 6.0 VI = VCC or GND ± 0.1 ±1 ±1 µA 6.0 VI = VCC or GND 4 40 80 µA V M54HC393 Table 6: AC Electrical Characteristics (CL = 50 pF, Input tr = tf = 6ns) Test Condition Symbol Parameter tTLH tTHL Output Transition Time tPLH tPHL Propagation Delay Time (CLOCK - QA) tPLH tPHL Propagation Delay Time (CLOCK - QB) tPLH tPHL Propagation Delay Time (CLOCK - QC) tPLH tPHL Propagation Delay Time (CLOCK - QD) tPHL fMAX Propagation Delay Time (CLEAR - Qn) Maximum Clock Frequency tW(H) tW(L) Minimum Pulse Width (CLOCK) tW(H) Minimum Pulse Width (CLEAR) tREM Minimum Removal Time Value TA = 25°C VCC (V) Min. 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 8.4 42 50 Typ. Max. 30 8 7 50 15 13 70 20 17 90 25 21 120 30 26 55 18 15 17 67 79 28 7 6 28 7 6 75 15 13 120 24 20 160 32 27 195 39 33 230 46 39 150 30 26 -40 to 85°C -55 to 125°C Min. Min. Max. 95 19 16 150 30 26 200 40 34 245 49 42 290 58 49 190 38 32 6.8 34 40 75 15 13 75 15 13 25 5 5 Max. 110 22 19 180 36 31 240 48 41 295 59 50 345 69 59 225 45 38 5.6 28 33 95 19 16 95 19 16 30 6 5 Unit ns ns ns ns ns ns MHz 110 22 19 110 22 19 35 7 6 ns ns ns Table 7: Capacitive Characteristics Test Condition Symbol Parameter VCC (V) Value TA = 25°C Typ. Max. CIN Input Capacitance Min. 5 10 CPD Power Dissipation Capacitance (note 1) 35 -40 to 85°C -55 to 125°C Min. Min. Max. 10 Unit Max. 10 pF pF 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/4 (per FLIP FLOP) 7/12 M54HC393 Figure 5: Test Circuit CL = 50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50Ω) Figure 6: Waveform - Minimum Removal And Propagation Delay Times, Minimum Pulse Width (f=1MHz; 50% duty cycle) 8/12 M54HC393 DILC-14 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. MIN. TYP. MAX. A 2.1 22.54 0.083 0.100 a1 3.00 3.70 0.118 0.146 a2 0.63 0.88 1.14 0.025 0.035 0.045 B 1.82 2.03 2.39 0.072 0.080 0.094 b 0.40 0.45 0.50 0.016 0.018 0.020 b1 0.20 0.254 0.30 0.008 0.010 0.012 D 18.79 19.00 19.20 0.740 0.748 0.756 e 7.36 7.62 7.87 0.290 0.300 0.310 e1 2.54 0.100 e2 15.11 15.24 15.37 0.595 0.600 0.605 e3 7.62 7.87 8.12 0.300 0.310 0.320 F 7.11 7.75 0.280 I 0.305 3.70 K 10.90 L 1.14 1.27 0.146 12.1 0.429 1.5 0.045 0.476 0.050 0.059 0016173H 9/12 M54HC393 FPC-14 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. MIN. TYP. MAX. A 6.75 6.91 7.06 0.266 0.272 0.278 B 9.76 9.95 10.14 0.384 0.392 0.399 C 1.49 1.95 0.059 D 0.10 0.127 0.15 0.004 0.005 0.006 E 7.50 7.62 7.75 0.295 0.300 0.305 F G 1.27 0.38 0.050 0.43 H L 0.077 0.48 0.015 0.017 6.0 0.019 0.236 18.75 22.0 0.738 0.866 M 0.38 0.015 N 4.31 0.170 G F D H 14 8 L N A 7 1 H E B 10/12 M C 016029E M54HC393 Table 8: Revision History Date Revision 10-May-2004 1 Description of Changes First Release 11/12 M54HC393 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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