MP8352 3V-6V Input, 6A, 600kHz Step-Down Converter with Synchronizable Gate Driver The Future of Analog IC Technology DESCRIPTION FEATURES The MP8352 is a monolithic step-down switch mode converter with a built in internal power MOSFET. It achieves 6A continuous output current over a wide input supply range with excellent load and line regulation. • • • • • • Current mode operation provides fast transient response and eases loop stabilization. • • • Fault condition protection includes cycle-by-cycle current limiting and thermal shutdown. The MP8352 requires a minimum number of readily available standard external components and is available in a space saving 3mm x 4mm 14-pin QFN package. • • • • 3V to 6V Operating Input Range 6A Continuous Output Current 45mΩ Internal Power MOSFET Switch External Power Supply Vcc Power Good Indicator Synchronous Gate Driver Delivers up to 95% Efficiency Fixed 600KHz Frequency Synchronizable Up to 1.5MHz Cycle-by-Cycle Over Current Protection with Hiccup Thermal Shutdown Output Adjustable from 0.8V Stable with Low ESR Output Ceramic Capacitors Available in a 3mm x 4mm 14-Pin QFN Package APPLICATIONS • • • • • Point of Load Regulator in Distributed Power System Digital Set Top Boxes Personal Video Recorders Broadband Communications Flat Panel Television and Monitors “MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION 12 External VCC IN BST SW VCC 2 VCC OFF ON 3 PG BG EN/SYNC GND FB 14 MP8352 Rev. 1.0 1/25/2010 L1 2.2uH 8, 9, 10 MP8352 PGOOD Efficiency vs. Output Current 11 13 1 M2 100 EFFICIENCY(%) 4, 5, 6 VIN 90 80 70 Vin=3V Vin=5V Vin=6V 60 0 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 1 2 3 4 5 LOAD CURRENT(A) 6 1 MP8352 – 3V to 6V INPUT, 6A, 600KHz STEP-DOWN WITH SYNCHRONOUS GATE DRIVER ORDERING INFORMATION Part Number* Package Top Marking Free Air Temperature (TA) MP8352DL 3x4 QFN14 8352 –40°C to +85°C * For Tape & Reel, add suffix –Z (eg. MP8352DL–Z). For RoHS compliant packaging, add suffix –LF (eg. MP8352DL–LF–Z) PACKAGE REFERENCE TOP VIEW FB 1 14 GND PG 2 13 BG EN/SYNC 3 12 VCC IN 4 11 BST IN 5 10 SW IN 6 9 SW N/C 7 8 SW EXPOSED PAD ON BACKSIDE ABSOLUTE MAXIMUM RATINGS (1) Supply Voltage VIN ...................................... 6.5V VSW ....................... -0.3V(-5V for < 10ns) to 7.5V VBS -VSW .......................................................... 6V All Other Pins .................................–0.3V to +6V (2) Continuous Power Dissipation (TA = +25°C) ………………………………………………....2.6W Junction Temperature ...............................150°C Lead Temperature ....................................260°C Storage Temperature.............. –65°C to +150°C Recommended Operating Conditions (3) Supply Voltage VIN Vcc .......................3V to 6V Operating Junct. Temp (TJ)..... –40°C to +125°C MP8352 Rev. 1.0 1/25/2010 Thermal Resistance (4) θJA θJC 3x4 QFN14..............................48.......11.... °C/W Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-to-ambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB. www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 2 MP8352 – 3V to 6V INPUT, 6A, 600KHz STEP-DOWN WITH SYNCHRONOUS GATE DRIVER ELECTRICAL CHARACTERISTICS VIN = 5V, VCC = 5V, TA = +25°C, unless otherwise noted. Parameters Feedback Voltage Feedback Current Switch On Resistance Switch Leakage Current Limit (5) Oscillator Frequency Fold-back Frequency Maximum Duty Cycle Minimum On Time VCC Under Voltage Lockout Threshold Rising VCC Under Voltage Lockout Threshold Hysteresis EN Input Low Voltage En Input High Voltage Symbol Condition VFB 3V ≤ VIN ≤ 6V IFB VFB = 0.8V RDS(ON) VEN = 0V, VSW = 0V fSW VFB = 0.6V VFB = 0V VFB = 0.6V Min 0.788 8 400 60 85 tON 600 150 90 100 2.8 800 240 200 0.4 VEN = 2V VEN = 0V FSYNCL FSYNCH TOFF VEN = 0V, VCC=5V VEN = 2V, VFB = 1V RSINK RSOURCE 0.69 VPG PG Sink 4mA 2 0.1 300 1.5 5.0 45 0.75 150 1 4 20 0.74 40 Units V nA mΩ µA A KHz KHz % ns V mV 2.0 EN Input Current Sync Frequency Range (Low) Sync Frequency Range (High) Enable Turnoff Delay Supply Current (Shutdown) Supply Current (Quiescent) Thermal Shutdown Gate Driver Sink Impedance Gate Driver Source Impedance Gate Drive Current Sense Trip Threshold Power Good Threshold Rising Power Good Threshold Hysteresis PG Pin Level Typ Max 0.808 0.828 10 45 0 10 V V µA 65 1.0 0.79 0.4 KHz MHz us µA mA °C Ω Ω mV V mV V Note: 5) Guaranteed by design. MP8352 Rev. 1.0 1/25/2010 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 3 MP8352 – 3V to 6V INPUT, 6A, 600KHz STEP-DOWN WITH SYNCHRONOUS GATE DRIVER TYPICAL PERFORMANCE CHARACTERISTICS VIN=5V, VCC=5V, VOUT=2.5V, TA = +25ºC, unless otherwise noted. 80 Vin=3V Vin=5V Vin=6V 0 1 2 3 4 5 6 900 800 700 600 500 3.0 3.5 LOAD CURRENT(A) 5.0 5.5 11 0 90 70 50 30 10 3.0 3.5 6.0 55 45 35 25 15 2 3 4 5 OUTPUT CURRENT(A) 6 0.01 12 0.00 10 9 8 5.0 5.5 6.0 Line Regulation 13 11 4.0 4.5 VCC VOLTAGE(V) Peak Current vs. Duty Cycle PEAK CURRENT(A) CASE TEMPERAETURE RISE(OC) 4.5 130 VCC VOLTAGE(V) Case Temperature Rise vs.Output Current 5 1 4.0 LINE REGULATION 60 1000 DISABLED SUPPLY CURRENT(uA) 90 ENABLED SUPPLY CURRENT( uA ) EFFICIENCY(%) 100 70 Disabled Supply Current vs.Vcc Voltage Enabled Supply Current vs.Vcc Voltage Efficiency vs. Output Current -0.01 -0.02 -0.03 -0.04 7 -0.05 6 10 20 30 40 50 60 70 80 90 -0.06 3.0 Io = 0A Io =3A Io =6A 3.5 DUTY CYCLE(% ) 4.0 4.5 5.0 5.5 6.0 INPUT VOLTAGE (V) Load Regulation LOAD REGULATION 0.005 -0.005 -0.015 -0.025 -0.035 -0.045 Vin=3V -0.055 Vin=5V -0.065 Vin=6V -0.075 0 1 2 3 4 5 6 LOAD CURRENT(A) MP8352 Rev. 1.0 1/25/2010 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 4 MP8352 – 3V to 6V INPUT, 6A, 600KHz STEP-DOWN WITH SYNCHRONOUS GATE DRIVER TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN=6V, VCC=5V, VOUT=2.5V, TA = +25ºC, unless otherwise noted. Hiccup with Short Output Short Recovery Enable Startup No Load VOUT 1V/div Inductor Current 5A/div Inductor Current 5A/div VSW 5V/div VOUT 1V/div VOUT 1V/div EN 5V/div SW 5V/div SW 5V/div Inductor Current 2A/div 1ms/div 1ms/div Enable Startup Vcc Startup Vcc Startup Full Load No Load Full Load VOUT 1V/div VOUT 1V/div VOUT 1V/div VSW 5V/div VSW 5V/div VSW 5V/div EN 5V/div Vcc 5V/div Vcc 5V/div Inductor Current 5A/div Inductor Current 2A/div Inductor Current 5A/div 1ms/div 1ms/div Input Ripple Voltage Output Ripple Voltage Load Transient Response Full Load Full Load Load:3A-6A with slew rate:1A/us VOUT 10mV/div VIN 200mV/div VSW 5V/div VSW 5V/div Inductor Current 5A/div 400ns/div MP8352 Rev. 1.0 1/25/2010 VOUT 20mV/div IO 2A/div 1 s/div www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 400 s/div 5 MP8352 – 3V to 6V INPUT, 6A, 600KHz STEP-DOWN WITH SYNCHRONOUS GATE DRIVER PIN FUNCTIONS Pin # 1 2 3 4, 5, 6 7 8, 9, 10 11 12 13 14 Description Feedback. An external resistor divider from the output to GND, tapped to the FB pin sets the output voltage. To prevent current limit run away during a short circuit fault FB condition the frequency foldback comparator lowers the oscillator frequency when the FB voltage is below 250mV. Power Good Indicator. Connect this pin to VCC or VOUT by a 100kΩ pull-up resistor. The output of this pin is low if the output voltage is 10% less than the nominal voltage, PG otherwise it is an open drain. EN/SYNC On/Off Control and External Frequency Synchronization Input. Supply Voltage. The MP8352 operates from a +3V to +6V unregulated input. C1 is IN needed to prevent large voltage spikes from appearing at the input. N/C No Connect. SW Switch Output. Bootstrap. This capacitor is needed to drive the power switch’s gate above the supply BST voltage. It is connected between SW and BST pins to form a floating supply across the power switch driver. VCC Need external Bias Power Supply. Decouple with a 1µF ceramic capacitor. BG Gate Driver Output. Connect this pin to the synchronous MOSFET Gate. Ground. This pin is the voltage reference for the regulated output voltage. For this GND, reason care must be taken in its layout. This node should be placed outside of the M2 Exposed Pad to C1 ground path to prevent switching current spikes from inducing voltage noise into the part. Connect exposed pad to GND plane for optimal thermal performance. MP8352 Rev. 1.0 1/25/2010 Name www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 6 MP8352 – 3V to 6V INPUT, 6A, 600KHz STEP-DOWN WITH SYNCHRONOUS GATE DRIVER OPERATION IN CURRENT SENSE AMPLIFIER + -- x40 VCC RSEN 5mΩ BST OSCILLATOR 600KHz EN/SYNC S + -- VCC REFERENCE C1 1pF C1 50pF VBG FB R1 300kΩ Q DRIVER R CURRENT LIMIT COMPARATOR R Q VCC VCC DRIVER + -- ERROR AMPLIFIER SW BG + -- PWM COMPARATOR PG VBG POWER GOOD GND Figure 1—Functional Block Diagram The MP8352 is a fixed frequency, synchronous, step-down switching regulator with an integrated high-side power MOSFET and a gate driver for a low-side external MOSFET. It achieves 6A continuous output current over a wide input supply range with excellent load and line regulation. It provides a single highly efficient solution with current mode control for fast loop response and easy compensation. The MP8352 operates in a fixed frequency, peak current control mode to regulate the output voltage. A PWM cycle is initiated by the internal clock. The integrated high-side power MOSFET is turned on and remains on until its current reaches the value set by the COMP voltage. When the power switch is off, it remains off until the next clock cycle starts. If, in 90% of one PWM period, the current in the power MOSFET does not reach the COMP set current value, the power MOSFET will be forced to turn off. MP8352 Rev. 1.0 1/25/2010 Error Amplifier The error amplifier compares the FB pin voltage with the internal 0.8V reference (REF) and outputs a current proportional to the difference between the two. This output current is then used to charge or discharge the internal compensation network to form the COMP voltage, which is used to control the power MOSFET current. The optimized internal compensation network minimizes the external component counts and simplifies the control loop design. www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 7 MP8352 – 3V to 6V INPUT, 6A, 600KHz STEP-DOWN WITH SYNCHRONOUS GATE DRIVER Enable/Synch Control The MP8352 has a dedicated Enable/Synch control pin (EN/SYNC). By pulling it high or low, the IC can be enabled and disabled by EN. Tie EN to VIN for automatic start up. To disable the part, EN must be pulled low for at least 5µs. The MP8352 can be synchronized to external clock range from 300KHz up to 1.5MHz through the EN/SYNC pin. The internal clock rising edge is synchronized to the external clock rising edge. VCC Under-Voltage Lockout (UVLO) Under-voltage lockout (UVLO) is implemented to protect the chip from operating at insufficient supply voltage. The MP8352 UVLO comparator monitors the output voltage of the internal regulator, VCC. The UVLO rising threshold is about 2.8V while its falling threshold is a consistent 2.6V. Internal Soft-Start The soft-start is implemented to prevent the converter output voltage from overshooting during startup. When the chip starts, the internal circuitry generates a soft-start voltage (SS) ramping up from 0V to 1.2V. When it is lower than the internal reference (REF), SS overrides REF so the error amplifier uses SS as the reference. When SS is higher than REF, REF regains control. Over-Current-Protection and Hiccup The MP8352 has cycle-by-cycle over current limit when the inductor current peak value exceeds the set current limit threshold. Meanwhile, output voltage starts to drop until FB is below the Under-Voltage (UV) threshold, typically 30% below the reference. Once a UV is triggered, the MP8352 enters hiccup mode to periodically restart the part. This protection mode is especially useful when the output is dead-short to ground. The average short circuit current is greatly reduced to alleviate the thermal issue and to protect the regulator. The MP8352 exits the hiccup mode once the over current condition is removed. MP8352 Rev. 1.0 1/25/2010 Thermal Shutdown Thermal shutdown is implemented to prevent the chip from operating at exceedingly high temperatures. When the silicon die temperature is higher than 150°C, it shuts down the whole chip. When the temperature is lower than its lower threshold, typically 140°C, the chip is enabled again. Floating Driver and Bootstrap Charging The floating power MOSFET driver is powered by an external bootstrap capacitor. This floating driver has its own UVLO protection. This UVLO’s rising threshold is 2.2V with a hysteresis of 150mV. The bootstrap capacitor voltage is regulated internally by VIN through D1, M3, C4, L1 and C2 (Figure 2). If (VIN-VSW) is more than 5V, U2 will regulate M1 to maintain a 5V BST voltage across C4. D1 VCC M3 + 5V + -- BST U2 -- C4 VOUT SW L1 C2 Figure 2—Internal Bootstrap Charging Circuit Startup and Shutdown If VIN, VCC and EN are higher than their appropriate thresholds, the chip starts. The reference block starts first, generating stable reference voltage and currents, and then the internal regulator is enabled. The regulator provides stable supply for the remaining circuitries. Three events can shut down the chip: EN low, VCC low and thermal shutdown. In the shutdown procedure, the signaling path is first blocked to avoid any fault triggering. The COMP voltage and the internal supply rail are then pulled down. The floating driver is not subject to this shutdown command. www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 8 MP8352 – 3V to 6V INPUT, 6A, 600KHz STEP-DOWN WITH SYNCHRONOUS GATE DRIVER APPLICATION INFORMATION Setting the Output Voltage The external resistor divider is used to set the output voltage (see the schematic on front page). The feedback resistor R1 also sets the feedback loop bandwidth with the internal compensation capacitor (see Figure 1). Choose R1 to be around 40.2kΩ for optimal transient response. R2 is then given by: R2 = R1 VOUT −1 0 .8 V VOUT (V) R1 (kΩ) R2 (kΩ) 1.8 2.5 3.3 40.2 (1%) 40.2 (1%) 40.2 (1%) 32.4 (1%) 19.1 (1%) 13 (1%) Selecting the Inductor A 1µH to 10µH inductor with a DC current rating of at least 25% percent higher than the maximum load current is recommended for most applications. For highest efficiency, the inductor DC resistance should be less than 15mΩ. For most designs, the inductance value can be derived from the following equation. VOUT × ( VIN − VOUT ) VIN × ∆IL × f OSC Where ∆IL is the inductor ripple current. Choose inductor current to be approximately 30% if the maximum load current, 6A. The maximum inductor peak current is: IL(MAX ) = ILOAD + ∆I L 2 Under light load conditions below 100mA, larger inductance is recommended for improved efficiency. MP8352 Rev. 1.0 1/25/2010 Table 2 lists example synchronous MOSFETs and manufacturers. Table 2—Synchronous MOSFET Selection Guide Table 1—Resistor Selection for Common Output Voltages L= Synchronous MOSFET The external synchronous MOSFET is used to supply current to the inductor when the internal high-side switch is off. It reduces the power loss significantly when compared against a Schottky rectifier. Part No. Manufacture AM4874 Si7848 Analog Power Vishay Selecting the Input Capacitor The input current to the step-down converter is discontinuous, therefore a capacitor is required to supply the AC current to the step-down converter while maintaining the DC input voltage. Use low ESR capacitors for the best performance. Ceramic capacitors with X5R or X7R dielectrics are highly recommended because of their low ESR and small temperature coefficients. For most applications, a 22µF capacitor is sufficient. Since the input capacitor (C1) absorbs the input switching current it requires an adequate ripple current rating. The RMS current in the input capacitor can be estimated by: I C1 = ILOAD × VOUT ⎛⎜ VOUT × 1− VIN ⎜⎝ VIN ⎞ ⎟ ⎟ ⎠ The worse case condition occurs at VIN = 2VOUT, where: IC1 = ILOAD 2 For simplification, choose the input capacitor whose RMS current rating greater than half of the maximum load current. www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 9 MP8352 – 3V to 6V INPUT, 6A, 600KHz STEP-DOWN WITH SYNCHRONOUS GATE DRIVER The input capacitor can be electrolytic, tantalum or ceramic. When using electrolytic or tantalum capacitors, a small, high quality ceramic capacitor, i.e. 0.1µF, should be placed as close to the IC as possible. When using ceramic capacitors, make sure that they have enough capacitance to provide sufficient charge to prevent excessive voltage ripple at input. The input voltage ripple caused by capacitance can be estimated by: ∆VIN = ⎛ ILOAD V V × OUT × ⎜⎜1 − OUT fS × C1 VIN ⎝ VIN ∆VOUT ⎞ ⎞ ⎛ 1 ⎟ ⎟⎟ × ⎜ R ESR + ⎜ 8 × f S × C2 ⎟⎠ ⎠ ⎝ Where L is the inductor value and RESR is the equivalent series resistance (ESR) value of the output capacitor. In the case of ceramic capacitors, the impedance at the switching frequency is dominated by the capacitance. The output voltage ripple is mainly caused by the capacitance. For simplification, the output voltage ripple can be estimated by: ∆VOUT = PCB layout is very important to achieve stable operation. It is highly recommended to duplicate EVB layout for optimum performance. If change is necessary, please follow these guidelines and take Figure 3 for references. 1) Keep the path of switching current short and minimize the loop area formed by Input cap, high-side MOSFET and low-side MOSFET/schottky diode (as the red dotted line loop shows). 2) Keep the connection of low-side MOSFET/schottky diode between SW pin and input power ground as short and wide as possible. 3) Bypass ceramic capacitors are suggested to be put close to the VIN and VCC Pin. 4) Ensure all feedback connections are short and direct. Place the feedback resistors and compensation components as close to the chip as possible. 5) Route SW away from sensitive analog areas such as FB. 6) Connect IN, SW, and especially GND respectively to a large copper area to cool the chip to improve thermal performance and long-term reliability. ⎞ ⎟⎟ ⎠ Selecting the Output Capacitor The output capacitor (C2) is required to maintain the DC output voltage. Ceramic, tantalum, or low ESR electrolytic capacitors are recommended. Low ESR capacitors are preferred to keep the output voltage ripple low. The output voltage ripple can be estimated by: ⎛ V V = OUT × ⎜⎜1 − OUT fS × L ⎝ VIN PCB Layout Guide ⎞ ⎛ V × ⎜⎜1 − OUT ⎟⎟ 2 V 8 × fS × L × C2 ⎝ IN ⎠ VOUT VOUT SGND In the case of tantalum or electrolytic capacitors, the ESR dominates the impedance at the switching frequency. For simplification, the output ripple can be approximated to: ∆VOUT = VOUT ⎛ V × ⎜⎜1 − OUT fS × L ⎝ VIN MP8352 Rev. 1.0 1/25/2010 GND BG External Blas Supply EN/SYNC VCC IN ⎞ ⎟⎟ × R ESR ⎠ The characteristics of the output capacitor also affect the stability of the regulation system. The MP8352 can be optimized for a wide range of capacitance and ESR values. FB PG CIN BST IN SW IN SW N/C SW Single Point Connection PGND L COUT VOUT Figure 3—PCB Layout Conceptual Drawing, Only Top Layer Shown, and a Ground Plane Is Assumed www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 10 MP8352 – 3V to 6V INPUT, 6A, 600KHz STEP-DOWN WITH SYNCHRONOUS GATE DRIVER External Bootstrap Diode An external bootstrap diode may enhance the efficiency of the regulator, the applicable conditions of external BST diode are: z Duty cycle is high: D= VOUT >65% VIN In these cases, an external BST diode is recommended from VCC to BST pin, as shown in Fig.4 External BST Diode IN4148 BST MP8352 SW CBST L External VCC 2.5V COUT Figure 4—Add Optional External Bootstrap Diode to Enhance Efficiency The recommended external BST diode is IN4148, and the BST cap is 0.1~1µF, when the BST diode is used. Vcc Bias Supply Consideration The MP8352 does not have the LDO inside. It needs external bias power supply to make the device work properly. MP8352 Rev. 1.0 1/25/2010 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 11 MP8352 – 3V to 6V INPUT, 6A, 600KHz STEP-DOWN WITH SYNCHRONOUS GATE DRIVER PACKAGE INFORMATION 3mm x 4mm QFN14 2.90 3.10 1.60 1.80 0.30 0.50 PIN 1 ID SEE DETAIL A PIN 1 ID MARKING 1 14 0.18 0.30 3.20 3.40 3.90 4.10 PIN 1 ID INDEX AREA 0.50 BSC 7 8 TOP VIEW BOTTOM VIEW 0.80 1.00 0.20 REF PIN 1 ID OPTION A 0.30x45º TYP. PIN 1 ID OPTION B R0.20 TYP. 0.00 0.05 SIDE VIEW DETAIL A 2.90 0.70 NOTE: 1.70 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH. 3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETER MAX. 4) JEDEC REFERENCE IS MO-229, VARIATION VGED-3. 5) DRAWING IS NOT TO SCALE. 0.25 3.30 0.50 RECOMMENDED LAND PATTERN NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP8352 Rev. 1.0 1/25/2010 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 12