Rohm BU4094BCF 8-bit compatible shift / store register Datasheet

Standard ICs
8-bit compatible shift / store register
BU4094BC / BU4094BCF / BU4094BCFV
The BU4094BC, BU4094BCF, and BU4094BCFV are shift / store registers, each consisting of an 8-bit register and
an 8-bit latch.
As the data in the shift register can be latched by an asynchronous strobe input, it is possible to hold the output in
the data transfer mode.
The tri-state parallel output can be connected directly with an 8-bit bus line.
These registers are suitable for in-line / parallel data conversion, data receivers and other similar applications.
•Logic circuit diagram
SERIAL
IN
•Block diagram
8-STAGE
SHIFT REGISTER
CLOCK
STROBE
1
16 VDD
SERIAL
IN
2
15
CLOCK
3
14 Q5
Q1
4
13 Q6
Q2
5
12 Q7
Q3
6
11 Q8
Q4
7
10 Q'S
VSS
8
9
QS
Q'S
SERIAL
OUTPUT
8-BIT
LATCHES
STROBE
3-STATE
OUTPUTS
OUTPUT
ENABLE
Q1
OUTPUT
ENABLE
Q8
PARALLEL OUTPUTS
QS
•Truth table
CLOCK
OUTPUT
STROBE SERIAL IN
ENABLE
NC: No Change
Parallel output
Serial output
Q1
Qn
QS
Q'S
L
Qn-1
Q7
NC
H
H
Qn-1
Q7
NC
X
NC
NC
Q7
NC
H
H
L
H
H
H
L
L
X
X
Z
Z
Q7
NC
H
X
X
NC
NC
NC
QS
L
X
X
Z
Z
NC
QS
Z: High Impedance
X: Irrelevant
1
Standard ICs
BU4094BC / BU4094BCF / BU4094BCFV
•Absolute maximum ratings (Ta = 25°C)
Symbol
Limits
Unit
Power supply voltage
Parameter
VDD
– 0.5 ~ + 20
V
Power dissipation
Pd
1000 (DIP), 500 (SOP)
400 (SSOP)
mW
Operating temperature
Topr
– 40 ~ + 85
°C
Storage temperature
Tstg
– 55 ~ + 150
°C
– 0.5 ~ VDD + 0.5
V
Input voltage
VIN
characteristics
•DCElectrical
characteristics (unless otherwise noted, V
SS
Parameter
Input high level voltage
Symbol
VIH
Input low level voltage
VIL
Input high level current
IIH
Input low level current
IIL
Output high level voltage
Output low level voltage
VOH
VOL
Min.
Typ.
Max.
3.5
—
—
7.0
—
—
Output low level current
IOL
Conditions
VDD (V)
5
V
10
—
—
—
15
—
—
1.5
5
—
—
3.0
—
—
4.0
—
—
0.3
µA
15
VIH = 15V
µA
15
VIL = 0V
—
—
– 0.3
4.95
—
—
9.95
—
—
14.95
—
—
—
—
0.05
—
—
0.05
V
10
—
15
5
V
10
IO = 0mA
15
5
V
10
IO = 0mA
—
0.05
15
– 0.44
—
—
5
VOH = 4.6V
– 1.1
—
—
10
VOH = 9.5V
mA
– 3.0
—
—
15
VOH = 13.5V
0.44
—
—
5
VOL = 0.4V
1.1
—
—
10
VOL = 0.5V
3.0
—
—
15
VOL = 1.5V
mA
Output high level
disable current
IDH
—
—
1.0
µA
15
VOUT = 15V
Output low level
disable current
IDL
—
—
– 1.0
µA
15
VOUT = 0V
—
—
20
—
—
40
—
—
80
Static current dissipation
2
IOH
Unit
11.0
—
Output high level current
= 0V, Ta = 25°C)
IDD
5
µA
10
15
VI = VDD, or GND
Standard ICs
BU4094BC / BU4094BCF / BU4094BCFV
Switching characteristics (unless otherwise noted, VSS = 0V, Ta = 25°C, CL = 50pF)
Parameter
Symbol
Output rise time
tTLH
Output fall time
tTHL
Propagation delay
time, CLOCK to Qs
tPLH
tPHL
Propagation delay
time, CLOCK to Qs
tPLH
tPHL
Propagation delay
time, CLOCK to Qn
tPLH
tPHL
Propagation delay
time, STROBE to Qn
tPLH
tPHL
3-state propagation
delay time,
Output Enable to Qn
tPHZ
tPZH
3-state propagation
delay time, Output
Enable to Qn
tPLZ
tPZL
Minimum setup time,
DATA to CLOCK
tSU
Minimum hold time,
CLOCK to DATA
tH
Minimum clock
pulse width
tW
Maximum clock rise
time and fall time
Min.
Typ.
Max.
Unit
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
100
50
40
100
50
40
350
125
95
230
110
75
420
195
135
290
145
100
140
75
55
140
75
55
20
8
6
10
10
5
100
50
40
—
—
—
—
—
—
600
250
190
460
220
150
840
390
270
580
290
200
280
150
110
280
150
110
125
55
35
40
20
15
200
100
80
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
—
1.25
2.5
3.0
—
—
—
5
10
12.5
100
40
35
—
—
—
200
80
70
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
µs
MHz
MHz
MHz
ns
ns
ns
—
5
—
pF
tr (CL)
tf (CL)
Maximum clock
frequency
fCL
Minimum strobe
pulse width
tWH
Input capacitance
CIN
NO Limit
VDD (V)
Conditions
Measurement
circuit
—
Fig.1
—
Fig.1
—
Fig.1
—
Fig.1
—
Fig.1
—
Fig.1
RL = 1kΩ
Fig.2
RL = 1kΩ
Fig.2
—
Fig.1
—
Fig.1
—
Fig.1
—
Fig.1
—
Fig.1
—
Fig.1
—
—
3
Standard ICs
BU4094BC / BU4094BCF / BU4094BCFV
•Measurement circuits
VDD
OUTPUT
ENABLE
OUTPUT
ENABLE
OUTPUT
DATA
50pF
50pF
STROBE
P.G.
CLOCK
GND
A: tPLZ, tPZL
B: tPHZ, tPZH
CLOCK
GND
Fig. 2 3-state delay time
Fig. 1 Switching waveform
tW
tr
90%
50%
CLOCK
50%
50%
50%
tf
90%
50%
10%
tSU
DATA
tH
50%
50%
tWH
50%
STROBE
OUTPUT
ENABLE
50%
tPLH
tPHL
tTLH
tTHL
50%
tPHZ
tPHL
50%
Q's
Fig. 3 Switching time test waveform
•Electrical characteristic curve
POWER DISSIPATION: Pd (mW)
1200
DIP16
1000
800
600
SOP16
400
SSOP - B16
200
0
0
25
50
75
100
125
AMBIENT TEMPERATURE: Ta (°C)
Fig. 4 Power dissipation vs.
ambient temperature
4
150
10%
50%
tPLH
tPZL
90%
10%
tPHL
tPLH
50%
tPLZ
50%
50%
Qs
50%
tPZH
90%
90%
50%
10%
90%
50%
10%
Q1 ~ Q8
tPLH
A
B
1kΩ
DATA
STROBE
P.G.
SW
OUTPUT
50%
Standard ICs
BU4094BC / BU4094BCF / BU4094BCFV
•External dimensions (Units: mm)
BU4094BC
BU4094BCF
10.0 ± 0.2
19.4 ± 0.3
8
6.2 ± 0.3
0.51Min.
0.3 ± 0.1
0.5 ± 0.1
0° ~ 15°
0.11
1.5 ± 0.1
3.2 ± 0.2 4.25 ± 0.3
7.62
2.54
9
1
8
1.27
0.4 ± 0.1
0.15 ± 0.1
1
16
4.4 ± 0.2
9
6.5 ± 0.3
16
0.3Min.
0.15
DIP16
SOP16
BU4094BCFV
1
8
4.4 ± 0.2
9
0.65
0.15 ± 0.1
1.15 ± 0.1
0.1
6.4 ± 0.3
5.0 ± 0.2
16
0.22 ± 0.1
0.3Min.
0.1
SSOP-B16
5
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