TI AM26LS32AMJ Quadruple differential line receiver Datasheet

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FEATURES
AM26LS32AC,, AM26LS32AI,, AM26LS33AC
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115E – OCTOBER 1980 – REVISED OCTOBER 2007
1
• AM26LS32A Devices Meet or Exceed the
Requirements of ANSI TIA/EIA-422-B,
TIA/EIA-423-B, and ITU Recommendations V.10
and V.11
• AM26LS32A Devices Have ±7-V
Common-Mode Range With ±200-mV
Sensitivity
• AM26LS33A Devices Have ±15-V
Common-Mode Range With ±500-mV
Sensitivity
• Input Hysteresis . . . 50 mV Typical
• Operate From a Single 5-V Supply
• Low-Power Schottky Circuitry
• 3-State Outputs
• Complementary Output-Enable Inputs
• Input Impedance . . . 12 kΩ Minimum
• Designed to Be Interchangeable With
Advanced Micro Devices AM26LS32™ and
AM26LS33™
2
AM26LS32AC . . . D, N, NS, OR PW PACKAGE
AM26LS32AI, AM26LS33AC . . . D, OR N PACKAGE
AM26LS32AM, AM26LS33AM . . .J PACKAGE
(TOP VIEW)
DESCRIPTION
The AM26LS32A and AM26LS33A devices are quadruple differential line receivers for balanced and unbalanced
digital data transmission. The enable function is common to all four receivers and offers a choice of active-high
or active-low input. The 3-state outputs permit connection directly to a bus-organized system. Fail-safe design
ensures that, if the inputs are open, the outputs always are high.
Compared to the AM26LS32 and the AM26LS33, the AM26LS32A and AM26LS33A incorporate an additional
stage of amplification to improve sensitivity. The input impedance has been increased, resulting in less loading of
the bus line. The additional stage has increased propagation delay; however, this does not affect
interchangeability in most applications.
The AM26LS32AC and AM26LS33AC are characterized for operation from 0°C to 70°C. The AM26LS32AI is
characterized for operation from –40°C to 85°C. The AM26LS32AM and AM26LS33AM are characterized for
operation over the full military temperature range of –55°C to 125°C.
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
AM26LS32, AM26LS33 are trademarks of Advanced Micro Devices, Inc..
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1980–2007, Texas Instruments Incorporated
AM26LS32AC,, AM26LS32AI,, AM26LS33AC
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
www.ti.com
SLLS115E – OCTOBER 1980 – REVISED OCTOBER 2007
FUNCTION TABLE
Each Receiver
ENABLES
DIFFERENTIAL
A–B
VID ≥ VIT+
VIT– ≤ VID ≤ VIT+
VID ≤ VIT–
X
Open
G
G
OUTPUT
Y
H
X
H
X
L
H
H
X
?
X
L
?
H
X
L
X
L
L
L
H
Z
H
X
H
X
L
H
LOGIC DIAGRAM (POSITIVE LOGIC)
G
G
1A
1B
2A
2B
3A
3B
4A
4B
4
12
2
3
1
1Y
6
5
7
2Y
10
11
9
3Y
14
13
15
4Y
Pin numbers are for D, N, NS, or PW packages only.
2
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Copyright © 1980–2007, Texas Instruments Incorporated
Product Folder Link(s): AM26LS32AC AM26LS32AI AM26LS33AC AM26LS32AM AM26LS33AM
AM26LS32AC,, AM26LS32AI,, AM26LS33AC
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
www.ti.com
SLLS115E – OCTOBER 1980 – REVISED OCTOBER 2007
SCHEMATICS OF INPUTS AND OUTPUTS
85 Ω
8.3 kΩ
100 kΩ
20 kΩ
960 Ω
960 Ω
100 kΩ
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted)
MIN
VCC
Supply voltage (2)
VI
Input voltage
VID
Differential input voltage (3)
7
Any differential input
TC
Tstg
(1)
(2)
(3)
(4)
±25
Other inputs
7
±25
Continuous total power dissipation
θJA
MAX
UNIT
V
V
V
See Dissipation Ratings Table
D package
73
N package
67
NS package
64
PW package
108
Case temperature for 60 seconds
FK package
260
°C
Lead temperature 1.6 mm (1/16 inch) from case for 10
seconds
D or N package
260
°C
Lead temperature 1.6 mm (1/16 inch) from case for 60
seconds
J package
300
°C
150
°C
Package thermal impedance (4)
Storage temperature range
–65
°C/W
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values, except differential voltages, are with respect to the network ground terminal.
Differential voltage values are at the noninverting (A) input terminals with respect to the inverting (B) input terminals.
The package thermal impedance is calculated in accordance with JESD 51-7.
Copyright © 1980–2007, Texas Instruments Incorporated
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Product Folder Link(s): AM26LS32AC AM26LS32AI AM26LS33AC AM26LS32AM AM26LS33AM
3
AM26LS32AC,, AM26LS32AI,, AM26LS33AC
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
www.ti.com
SLLS115E – OCTOBER 1980 – REVISED OCTOBER 2007
DISSIPATION RATINGS
PACKAGE
TA ≤ 25°C
POWER RATING
DERATION
FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 125°C
POWER RATING
FK
1375 mW
11.0 mW/°C
880 mW
275 mW
J
1375 mW
11.0 mW/°C
880 mW
275 mW
RECOMMENDED OPERATING CONDITIONS
VCC
Supply voltage
VIH
High-level input voltage
VIL
Low-level input voltage
MIN
NOM
MAX
AM26LS32AC, AM26LS32AI,
AM26LS33AC
4.75
5
5.25
AM26LS32AM, AM26LS33AM
4.5
5
5.5
UNIT
2
V
V
0.8
AM26LS32A
±7
AM26LS33A
±15
V
VIC
Common-mode input voltage
IOH
High-level output current
–440
μA
IOL
Low-level output current
8
mA
TA
Operating free-air temperature
AM26LS32AC, AM26LS33AC
0
V
70
AM26LS32AI
–40
85
AM26LS32AM, AM26LS33AM
–55
125
°C
ELECTRICAL CHARACTERISTICS
over recommended ranges of VCC, VIC, and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VIT+
Positive-going
input threshold voltage
VO = VOHmin, IOH = –440 μA
VIT–
Negative-going
input threshold voltage
VO = 0.45 V , IOL = 8 mA
Vhys
Hysteresis voltage
(VIT+ – VIT–)
VIK
Enable-input clamp voltage
VOH
High-level output voltage
TYP (1)
MAX
AM26LS32A
0.2
AM26LS33A
0.5
AM26LS32A
–0.2 (2)
AM26LS33A
–0.5 (2)
VCC = MIN,
VCC = MIN, VID = 1 V,
VI(G) = 0.8 V, IOH = –440 μA
II = –18 mA
2.7
AM26LS32AM,
AM26LS32AI,
AM26LS33AM
2.5
0.4
IOL= 8 mA
0.45
VO = 2.4 V
20
VO = 0.4 V
–20
VI = 15 V,
Other input at –10 V to
15 V
1.2
VI = –15 V,
Other input at –15 V to
10 V
–1.7
VCC = MIN, VID = –1 V,
VI(G) = 0.8 V
IOZ
Off-state
(high-impedance state)
output current
VCC = MAX
Line input current
V
V
IOL= 4 mA
Low-level output voltage
V
mV
–1.5
AM26LS32AC,
AM26LS33AC
UNIT
V
50
VOL
II
MIN
V
μA
mA
II(EN)
Enable input current
VI = 5.5 V
100
μA
IH
High-level enable current
VI = 2.7 V
20
μA
(1)
(2)
4
All typical values are at VCC = 5 V, TA = 25°C, and VIC = 0.
The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for
threshold levels only.
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Copyright © 1980–2007, Texas Instruments Incorporated
Product Folder Link(s): AM26LS32AC AM26LS32AI AM26LS33AC AM26LS32AM AM26LS33AM
AM26LS32AC,, AM26LS32AI,, AM26LS33AC
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
www.ti.com
SLLS115E – OCTOBER 1980 – REVISED OCTOBER 2007
ELECTRICAL CHARACTERISTICS (continued)
over recommended ranges of VCC, VIC, and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
IL
Low-level enable current
VI = 0.4 V
ri
Input resistance
VIC = –15 V to 15 V,
IOS
Short-circuit output
current (3)
VCC = MAX
ICC
Supply current
VCC = MAX,
(3)
MIN
One input to ac ground
12
TYP (1)
UNIT
mA
15
–15
All outputs disabled
MAX
–0.36
52
kΩ
–85
mA
70
mA
Not more than one output should be shorted to ground at a time, and duration of the short circuit should not exceed one second.
SWITCHING CHARACTERISTICS
VCC = 5 V, TA = 25°C
PARAMETER
tPLH
Propagation delay time, low-to-high-level
output
tPHL
Propagation delay time, high-to-low-level
output
tPZH
Output enable time to high level
tPZL
Output enable time to low level
tPHZ
Output disable time from high level
tPLZ
Output disable time from low level
(1)
TEST CONDITIONS
CL = 15 pF,
MIN
TYP (1)
MAX
20
35
22
35
17
22
20
25
21
30
30
40
See Figure 1
CL = 15 pF,
See Figure 1
CL = 15 pF,
See Figure 1
UNIT
ns
ns
ns
All typical values are at VCC = 5 V, TA = 25°C, and VIC = 0.
Copyright © 1980–2007, Texas Instruments Incorporated
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Product Folder Link(s): AM26LS32AC AM26LS32AI AM26LS33AC AM26LS32AM AM26LS33AM
5
AM26LS32AC,, AM26LS32AI,, AM26LS33AC
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
www.ti.com
SLLS115E – OCTOBER 1980 – REVISED OCTOBER 2007
PARAMETER MEASUREMENT INFORMATION
VCC
Test
Point
RL = 2 kΩ
2.5 V
S1
From Output
Under Test
CL
(see Note A)
Input
00
–2.5 V
5 kΩ
tPLH
See Note B
tPHL
VOH
Output
S2
1.3 V
1.3 V
VOL
S1 and S2 Closed
TEST CIRCUIT
VOLTAGE WAVEFORMS FOR tPLH, tPHL
≤5 ns
90%
Enable G
≤5 ns
3V
90%
10%
See Note C
90%
90%
10%
tPZH
S1 Open
S2 Closed
10%
3V
90%
90%
10%
VOH
1.3 V
Output
≈1.4 V
S1 Closed
S2 Closed
VOLTAGE WAVEFORMS FOR tPHZ, tPZH
3V
1.3 V
1.3 V
10%
S1 Closed
S2 Closed
tPZL
1.3 V
tPHZ
0
See Note C
0
0.5 V
3V
90%
1.3 V1.3 V
Enable G
10%
≤5 ns
10%
0
1.3 V
1.3 V
Enable G
90%
Enable G
1.3 V1.3 V
10%
Output
≤5 ns
≈1.4 V
tPLZ
S1 Closed
S2 Open
0
VOL
0.5 V
VOLTAGE WAVEFORMS FOR tPLZ, tPZL
NOTES: A. CL includes probe and jig capacitance.
B. All diodes are 1N3064 or equivalent.
C. Enable G is tested with G high; G is tested with G low.
Figure 1. Test Circuit and Voltage Waveforms
6
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Copyright © 1980–2007, Texas Instruments Incorporated
Product Folder Link(s): AM26LS32AC AM26LS32AI AM26LS33AC AM26LS32AM AM26LS33AM
AM26LS32AC,, AM26LS32AI,, AM26LS33AC
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
www.ti.com
SLLS115E – OCTOBER 1980 – REVISED OCTOBER 2007
TYPICAL CHARACTERISTICS
HIGH-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
High-Level Output Voltage, VOH (V)
High-Level Output Voltage, VOH (V)
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
High-Level Output Current, IOH (mA)
IOH = –440 μA
Free-Air Temperature, TA (°C)
Figure 3.
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
Low-Level Output Voltage, VOL (V)
Low-Level Output Votlage, VOL (V)
Figure 2.
Low-Level Output Current, IOL (mA)
Figure 4.
Copyright © 1980–2007, Texas Instruments Incorporated
Free-Air Temperature, TA (°C)
Figure 5.
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Product Folder Link(s): AM26LS32AC AM26LS32AI AM26LS33AC AM26LS32AM AM26LS33AM
7
AM26LS32AC,, AM26LS32AI,, AM26LS33AC
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
www.ti.com
SLLS115E – OCTOBER 1980 – REVISED OCTOBER 2007
TYPICAL CHARACTERISTICS (continued)
OUTPUT VOLTAGE
vs
ENABLE G VOLTAGE
OUTPUT VOLTAGE
vs
ENABLE G VOLTAGE
Load = 8 kΩ to GND
Output Voltage, VO (V)
Output Voltage, VO (V)
Load = 8 kΩ to GND
Enable G Voltage (V)
Figure 7.
OUTPUT VOLTAGE
vs
ENABLE G VOLTAGE
OUTPUT VOLTAGE
vs
ENABLE G VOLTAGE
Output Voltage, VO (V)
Output Voltage, VO (V)
Enable G Voltage (V)
Figure 6.
Load = 1 kΩ to VCC
Load = 1 kΩ to VCC
Enable G Voltage (V)
Figure 8.
8
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Enable G Voltage (V)
Figure 9.
Copyright © 1980–2007, Texas Instruments Incorporated
Product Folder Link(s): AM26LS32AC AM26LS32AI AM26LS33AC AM26LS32AM AM26LS33AM
AM26LS32AC,, AM26LS32AI,, AM26LS33AC
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
www.ti.com
SLLS115E – OCTOBER 1980 – REVISED OCTOBER 2007
TYPICAL CHARACTERISTICS (continued)
AM26LS33A
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
Output Voltage, VO (V)
Output Voltage, VO (V)
AM26LS32A
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
Differential Input Voltage, VID (mV)
Differential Input Voltage, VID (mV)
Figure 10.
Figure 11.
Input Current, II (mA)
INPUT CURRENT
vs
INPUT VOLTAGE
Input Voltage, VI (V)
The unshaded area shows requirements of
paragraph 4.2.1 of ANSI Standards
EIA/TIA-422-B and EIA/TIA-423-B.
Figure 12.
Copyright © 1980–2007, Texas Instruments Incorporated
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Product Folder Link(s): AM26LS32AC AM26LS32AI AM26LS33AC AM26LS32AM AM26LS33AM
9
AM26LS32AC,, AM26LS32AI,, AM26LS33AC
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
www.ti.com
SLLS115E – OCTOBER 1980 – REVISED OCTOBER 2007
APPLICATION INFORMATION
Figure 13. Circuit with Multiple Receivers
10
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Copyright © 1980–2007, Texas Instruments Incorporated
Product Folder Link(s): AM26LS32AC AM26LS32AI AM26LS33AC AM26LS32AM AM26LS33AM
PACKAGE OPTION ADDENDUM
www.ti.com
8-Jan-2010
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
5962-7802003M2A
ACTIVE
LCCC
FK
20
1
TBD
5962-7802003MEA
ACTIVE
CDIP
J
16
1
TBD
5962-7802003MFA
ACTIVE
CFP
W
16
1
TBD
5962-7802004M2A
ACTIVE
LCCC
FK
20
1
TBD
5962-7802004MEA
ACTIVE
CDIP
J
16
1
TBD
5962-7802004MFA
ACTIVE
CFP
W
16
1
AM26LS32ACD
ACTIVE
SOIC
D
16
40
AM26LS32ACDE4
ACTIVE
SOIC
D
16
40
AM26LS32ACDG4
ACTIVE
SOIC
D
16
40
AM26LS32ACDR
ACTIVE
SOIC
D
AM26LS32ACDRE4
ACTIVE
SOIC
AM26LS32ACDRG4
ACTIVE
AM26LS32ACN
Lead/Ball Finish
MSL Peak Temp (3)
POST-PLATE N / A for Pkg Type
A42
N / A for Pkg Type
A42
N / A for Pkg Type
POST-PLATE N / A for Pkg Type
A42
N / A for Pkg Type
TBD
A42
N / A for Pkg Type
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
ACTIVE
PDIP
N
16
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
AM26LS32ACNE4
ACTIVE
PDIP
N
16
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
AM26LS32ACNSR
ACTIVE
SO
NS
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
AM26LS32ACNSRG4
ACTIVE
SO
NS
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
AM26LS32ACPW
ACTIVE
TSSOP
PW
16
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
AM26LS32ACPWE4
ACTIVE
TSSOP
PW
16
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
AM26LS32ACPWG4
ACTIVE
TSSOP
PW
16
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
AM26LS32ACPWR
ACTIVE
TSSOP
PW
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
AM26LS32ACPWRE4
ACTIVE
TSSOP
PW
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
AM26LS32ACPWRG4
ACTIVE
TSSOP
PW
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
AM26LS32AID
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
AM26LS32AIDE4
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
AM26LS32AIDG4
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
AM26LS32AIDR
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
AM26LS32AIDRE4
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
8-Jan-2010
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
AM26LS32AIDRG4
ACTIVE
SOIC
D
16
AM26LS32AIN
ACTIVE
PDIP
N
16
25
AM26LS32AINE4
ACTIVE
PDIP
N
16
AM26LS32AMFKB
ACTIVE
LCCC
FK
AM26LS32AMJ
ACTIVE
CDIP
J
AM26LS32AMJB
ACTIVE
CDIP
AM26LS32AMWB
ACTIVE
AM26LS33ACD
ACTIVE
AM26LS33ACDE4
ACTIVE
AM26LS33ACDG4
2500 Green (RoHS &
no Sb/Br)
Lead/Ball Finish
MSL Peak Temp (3)
CU NIPDAU
Level-1-260C-UNLIM
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
20
1
TBD
16
1
TBD
A42
N / A for Pkg Type
J
16
1
TBD
A42
N / A for Pkg Type
CFP
W
16
1
TBD
A42
N / A for Pkg Type
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
AM26LS33ACDR
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
AM26LS33ACDRE4
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
AM26LS33ACDRG4
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
AM26LS33ACN
ACTIVE
PDIP
N
16
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
AM26LS33ACNE4
ACTIVE
PDIP
N
16
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
AM26LS33AMFKB
ACTIVE
LCCC
FK
20
1
TBD
AM26LS33AMJ
ACTIVE
CDIP
J
16
1
TBD
A42
N / A for Pkg Type
AM26LS33AMJB
ACTIVE
CDIP
J
16
1
TBD
A42
N / A for Pkg Type
AM26LS33AMWB
ACTIVE
CFP
W
16
1
TBD
A42
N / A for Pkg Type
POST-PLATE N / A for Pkg Type
POST-PLATE N / A for Pkg Type
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
8-Jan-2010
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF AM26LS32A, AM26LS32AM, AM26LS33A, AM26LS33AM :
• Enhanced Product: AM26LS32AM-EP
NOTE: Qualified Version Definitions:
• Enhanced Product - Supports Defense, Aerospace and Medical Applications
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
30-Jul-2010
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
AM26LS32ACDR
SOIC
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
8.0
16.0
Q1
D
16
2500
330.0
16.4
6.5
10.3
2.1
W
Pin1
(mm) Quadrant
AM26LS32ACDR
SOIC
D
16
2500
330.0
16.4
6.5
10.3
2.1
8.0
16.0
Q1
AM26LS32ACNSR
SO
NS
16
2000
330.0
16.4
8.2
10.5
2.5
12.0
16.0
Q1
AM26LS32ACPWR
TSSOP
PW
16
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
AM26LS32AIDR
SOIC
D
16
2500
330.0
16.4
6.5
10.3
2.1
8.0
16.0
Q1
AM26LS33ACDR
SOIC
D
16
2500
330.0
16.4
6.5
10.3
2.1
8.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
30-Jul-2010
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
AM26LS32ACDR
SOIC
D
16
2500
333.2
345.9
28.6
AM26LS32ACDR
SOIC
D
16
2500
346.0
346.0
33.0
AM26LS32ACNSR
SO
NS
16
2000
346.0
346.0
33.0
AM26LS32ACPWR
TSSOP
PW
16
2000
346.0
346.0
29.0
AM26LS32AIDR
SOIC
D
16
2500
333.2
345.9
28.6
AM26LS33ACDR
SOIC
D
16
2500
333.2
345.9
28.6
Pack Materials-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
18
17
16
15
14
13
NO. OF
TERMINALS
**
12
19
11
20
10
A
B
MIN
MAX
MIN
MAX
20
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
28
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
9
22
8
44
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
23
7
52
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
24
6
68
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
84
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
B SQ
A SQ
25
5
26
27
28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140 / D 10/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a metal lid.
The terminals are gold plated.
Falls within JEDEC MS-004
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
0,65
14
0,10 M
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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