ON NCN3411 4-differential channel 1:2 mux/demux switch for pci express gen3 Datasheet

NCN3411
4-Differential Channel 1:2
Mux/Demux Switch for
PCI Express Gen3
The NCN3411 is a 4−Channel differential SPDT switch designed to
route PCI Express Gen3 signals. When used in a PCI Express
application, the switch can handle up to two PCIe lanes. Due to the
ultra−low ON−state capacitance (2 pF typ) and resistance (7.5 W typ),
these switches are ideal for switching high frequency data signals up to
a signal bit rate of 8 Gbps. This switch pinout is designed to be used in
BTX form factor desktop PCs and is available in a space−saving 3.5 x
9 x 0.75 mm WQFN42 package.
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MARKING
DIAGRAM
1
Features
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NCN3411
AWLYYWWG
WQFN42
CASE 510AP
VDD Power Supply from 1.5 V to 2.0 V
4 Differential Channels 2:1 MUX/DEMUX
Compatible with PCIe 3.0
Data Rate: Supports 8 Gbps
Low Crosstalk −30 dB @ 4 GHz
Low Bit−to−Bit Skew: 5 ps
Low RON Resistance: 13 W max
Low CON Capacitance: 2 pF
Low Supply Current: 200 mA
Off Isolation: −20 dB @ 4 GHz
Space Saving Small WQFN−42 Package
This is a Pb−Free Device
XXXXX
A
WL
YY
WW
G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
Device
NCN3411MTTWG
Package
Shipping†
WQFN42 2000 / Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Typical Applications
• Notebook Computer
• Desktop computer
• Server/Storage Area Network
PCIe Slot
B0 +/−
B1 +/−
A0 +/−
A1 +/−
A2 +/−
NCN3411
A3 +/−
B3 +/−
C0 +/−
PCIe Slot
PCI Express
Controller
B2 +/−
C1 +/−
C2 +/−
C3 +/−
Figure 1. Application Schematic
© Semiconductor Components Industries, LLC, 2011
September, 2011 − Rev. 0
1
Publication Order Number:
NCN3411/D
NCN3411
A0+
B0+
A0−
B0−
A1+
B1+
A1−
B1−
C0+
C0−
C1+
C1−
A2+
B2+
A2−
B2−
A3+
B3+
A3−
B3−
C2+
C2−
C3+
C3−
SEL
Figure 2. NCN3411 Functional Block Diagram
(Top View)
TRUTH TABLE
Function
SEL
AN to BN
L
AN to CN
H
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2
VDD
GND
VDD
GND
42
41
40
39
NCN3411
GND
1
38
B0+
A0+
2
37
B0−
A0−
3
36
B1+
GND
4
35
B1−
VDD
5
34
C0+
A1+
6
33
C0−
A1−
7
32
C1+
VDD
8
31
C1−
SEL
9
30
VDD
GND
10
29
B2+
A2+
11
28
B2−
A2−
12
27
B3+
VDD
13
26
B3−
GND
14
25
C2+
A3+
15
24
C2−
A3−
16
23
C3+
GND
17
22
C3−
Exposed Pad
on
Underside
20
21
VDD
GND
19
GND
VDD
18
(Connect to Gnd)
Figure 3. Pin Description
(Top View)
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NCN3411
PIN FUNCTION AND DESCRIPTION
Pin
Pin Name
2
3
A0+
A0−
Signal I/0, Channel 0, Port A
Description
6
7
A1+
A1−
Signal I/0, Channel 1, Port A
11
12
A2+
A2−
Signal I/0, Channel 2, Port A
15
16
A3+
A3−
Signal I/0, Channel 3, Port A
38
37
B0+
B0−
Signal I/0, Channel 0, Port B
36
35
B1+
B1−
Signal I/0, Channel 1, Port B
29
28
B2+
B2−
Signal I/0, Channel 2, Port B
27
26
B3+
B3−
Signal I/0, Channel 3, Port B
34
33
C0+
C0−
Signal I/0, Channel 0, Port C
32
31
C1+
C1−
Signal I/0, Channel 1, Port C
25
24
C2+
C2−
Signal I/0, Channel 2, Port C
23
22
C3+
C3−
Signal I/0, Channel 3, Port C
9
SEL
Operational Mode Select (When SEL = 0: A → B,
When SEL = 1: A → C)
5, 8, 13, 18, 20, 30,
40, 42
VDD
DC Supply: 1.5 V to 2.0 V
1, 4, 10, 14, 17, 19,
21, 39, 41
GND
Power Ground
Exposed Pad
−
The exposed pad on the backside of package is internally connected to GND. Externally
the pad should also be user−connected to GND.
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NCN3411
MAXIMUM RATINGS
Symbol
Rating
Units
Power Supply Voltage
Parameter
VDD
−0.5 to 2.5
VDC
Input/Output Voltage Range of the Switch (AN, BN, CN)
VIS
−0.5 to VDD
VDC
VSEL
−0.5 to VDD
VDC
Continuous Current Through One Switch
Icc
±120
mA
Maximum Junction Temperature (Note 1)
TJ
150
°C
Selection Pin Voltages
Operating Ambient Temperature
TA
−40 to +85
°C
Storage Temperature Range
Tstg
−65 to +150
°C
Thermal Resistance, Junction−to−Air
RqJA
75
°C/W
ILU
±100
mA
Human Body Model (HBM) ESD Rating (Note 3)
ESD HBM
7000
V
Machine Model (MM) ESD Rating (Note 3)
ESD MM
400
V
MSL
Level 1
−
Latch−up Current (Note 2)
Moisture Sensitivity (Note 4)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded.
2. Latch up Current Maximum Rating: ±100 mA per JEDEC standard: JESD78.
3. This device series contains ESD protection and passes the following tests:
Human Body Model (HBM) ±7.0 kV per JEDEC standard: JESD22−A114 for all pins.
Machine Model (MM) ±400 V per JEDEC standard: JESD22−A115 for all pins.
4. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020A.
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NCN3411
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE (TA = −40°C to +85°C, VDD = 1.5 V to 2.0 V, GND = 0V)
Symbol
Pins
Parameters
Conditions (Note 5)
Min.
Typ
(Note 6)
Max.
Units
1.5
1.8
2.0
V
200
300
mA
1.2
V
POWER SUPPLY
VDD
VDD, GND
Supply Voltage Range
With respect to GND
IDD
VDD, GND
Quiescent Supply Current
VDD = 2 V, VSEL = GND or VDD
DATA SWITCH PERFORMANCE
VIS
AN, BN, CN
Data Input/Output
Voltage Range
0
RON
BN
On Resistance (BN)
VDD = 1.5 V, VIS = 0 V to 1.2 V,
IIS = 15 mA
7.5
13
W
RON
CN
On Resistance (CN)
VDD = 1.5 V, VIS = 0 V to 1.2 V,
IIS = 15 mA
8.0
13
W
RON(flat)
BN
On Resistance Flatness
VDD = 1.5 V, VIS = 0 V to 1.2 V,
IIS = 15 mA (Note 7)
0.1
1.24
W
RON(flat)
CN
On Resistance Flatness
VDD = 1.5 V, VIS = 0 V to 1.2 V,
IIS = 15 mA (Note 7)
0.1
1.24
W
DRON
BN
On Resistance
Matching(BN)
VDD = 1.5 V, VIS = 0 V,
IIS = 15 mA (Note 7)
0.35
W
DRON
CN
On Resistance
Matching(CN)
VDD = 1.5 V, VIS = 0 V,
IIS = 15 mA (Note 7)
0.35
W
CON
AN to BN,
AN to CN
On Capacitance
f = 1 MHz, Switch On, Open
Output
2.0
pF
COFF
AN to BN,
AN to CN
Off Capacitance
f = 1 MHz, Switch Off
1.5
pF
ION
AN to BN,
AN to CN
On Leakage Current
VDD = 2 V, VAN = 0 V, 1.2 V, Switch
On to BN/CN, BN/CN pins are
unconnected
−1
+1
mA
IOFF
AN to BN,
AN to CN
Off Leakage Current
VDD = 2 V, VAN = 0 V, 1.2 V, Switch
Off to BN/CN, VBN/VCN = 1.2 V, 0 V
−1
+1
mA
LOGIC INPUT CHARACTERISTICS (SEL Pin)
VIH
SEL
Input HIGH Voltage
(Note 7)
0.65 x
VDD
VDD
V
VIL
SEL
Input LOW Voltage
(Note 7)
0
0.35 x
VDD
V
VIK
SEL
Clamp Diode Voltage
VDD = Max, ISEL = −18mA
−1.2
V
IIH
SEL
Input HIGH Current
VDD = Max, VSEL = VDD
±5
mA
IIL
SEL
Input LOW Current
VDD = Max, VSEL = GND
±5
mA
−0.7
SWITCHING CHARACTERISTICS
tSELON
SEL, AN,
BN/CN
Line Enable Time
SEL to AN, BN, CN
RL = 50 W, CL = 20 pF
8.0
ns
tSELOFF
SEL, AN,
BN/CN
Line Disable Time
SEL to AN, BN, CN
RL = 50 W, CL = 20 pF
5.0
ns
tb−b
AN, BN/CN
Bit−to−bit skew
Within the same differential pair
5.0
ps
tch−ch
AN, BN
Channel−to channel skew
Maximum skew between all
channels
50
ps
5. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
6. Typical values are at VDD = 1.8 V, TA = 25°C ambient and maximum loading.
7. Guaranteed by design and/or characterization.
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NCN3411
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE (TA = −40°C to +85°C, VDD = 1.5 V to 2.0 V, GND = 0V)
Symbol
Pins
Conditions (Note 5)
Parameters
Min.
Typ
(Note 6)
Max.
Units
DYNAMIC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
BR
AN to BN,
AN to CN
Signal Bit Rate
DIL
AN to BN,
AN to CN
Differential Insertion Loss
DCTK
AN, BN, CN
Differential Crosstalk
DISO
AN to BN,
AN to CN
Differential Off Isolation
AN to BN,
AN to CN
Differential Return Loss
DRL
8.0
Gbps
f = 4 GHz
−2.0
dB
f = 100 MHz
−0.7
dB
f = 4 GHz
−30
dB
f = 100 MHz
−58
dB
f = 4 GHz
−20
dB
f = 100 MHz
−58
dB
f = 4 GHz
−9.0
dB
f = 100 MHz
−22
dB
5. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
6. Typical values are at VDD = 1.8 V, TA = 25°C ambient and maximum loading.
7. Guaranteed by design and/or characterization.
TYPICAL OPERATING CHARACTERISTICS
Figure 4. Reference PCIe 3.0 Eye Diagram
without Switch at 8 Gbps, 800 mVpp
Differential Swing
Figure 5. PCIe 3.0 Eye Diagram through
NCN3411 at 8 Gbps, 800 mVpp Differential
Swing
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NCN3411
0
0
−2
−10
−20
−4
−30
MAGNITUDE (dB)
MAGNITUDE (dB)
TYPICAL OPERATING CHARACTERISTICS
−6
−8
−10
−12
−40
−50
−60
−70
−80
−14
−90
−16
100000000
−100
1E+10 100000000
1E+09
1E+09
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 6. Differential Insertion Loss
Figure 7. Differential Crosstalk
0
1E+10
0
−10
−5
MAGNITUDE (dB)
−30
−40
−50
−60
−70
−10
−15
−20
−80
−25
−90
100000000
1E+09
1E+10
100000000
1E+09
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 8. Differential Off Isolation
Figure 9. Differential Return Loss
9
RON, ON RESISTANCE (W)
MAGNITUDE (dB)
−20
8.5
8
7.5
7
6.5
6
0
0.2
0.4
0.6
0.8
1
VIS (V)
Figure 10. RON vs. VIS
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8
1.2
1.4
1E+10
NCN3411
PARAMETER MEASUREMENT INFORMATION
Figure 11. Differential Insertion Loss (SDD21) and
Differential Return Loss (SDD11)
Figure 12. Differential Off Isolation (SDD21)
tskew = |tPLH1-tPLH2| or |tPHL1-tPHL2|
Figure 13. Differential Crosstalk (SDD21)
Figure 14. Bit−to−Bit and Channel−to−Channel Skew
Figure 15. tON and tOFF
Figure 16. Off State Leakage
Figure 17. On State Leakage
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NCN3411
PACKAGE DIMENSIONS
WQFN42 3.5x9, 0.5P
CASE 510AP−01
ISSUE O
PIN ONE
REFERENCE
ÇÇ
ÇÇ
ÇÇ
ÇÇ
ÇÇ
L
L
L1
DETAIL A
E
ALTERNATE TERMINAL
CONSTRUCTIONS
0.15 C
0.15 C
MOLD CMPD
DETAIL B
TOP VIEW
ALTERNATE
CONSTRUCTION
A
0.10 C
A3
DETAIL B
A1
SIDE VIEW
C
SEATING
PLANE
17
42X
9.30
42X
0.63
0.10 C A B
D2
MILLIMETERS
MIN
MAX
0.70
0.80
0.00
0.05
0.20 REF
0.20
0.30
3.50 BSC
1.95
2.15
9.00 BSC
7.45
7.65
0.50 BSC
0.20
−−−
0.30
0.50
0.00
0.15
RECOMMENDED
MOUNTING FOOTPRINT*
0.08 C
DETAIL A
DIM
A
A1
A3
b
D
D2
E
E2
e
K
L
L1
ÉÉ
ÉÉ
EXPOSED Cu
NOTE 4
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND 0.30 MM
FROM TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED PAD
AS WELL AS THE TERMINALS.
A B
D
0.50
PITCH
3.80 2.16
K
22
1
42X
L
0.35
PACKAGE
OUTLINE
DIMENSIONS: MILLIMETERS
42X b
0.10 C A B
0.05 C
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
E2
NOTE 3
1
38
0.10 C A B
e
e/2
BOTTOM VIEW
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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NCN3411/D
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