FSTU32160 16-Bit to 32-Bit Multiplexer/Demultiplexer Bus Switch with −2V Undershoot Protection General Description Features The Fairchild Switch FSTU32160 is a 16-bit to 32-bit highspeed CMOS TTL-compatible multiplexer/demultiplexer bus switch. The low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. ■ Undershoot hardened to −2V (A and B Ports). ■ Slower Output Enable times prevent signal disruption The device can be used in applications where two buses need to be addressed simultaneously. The FSTU32160 is designed so that the A Port demultiplexes into B1 or B2 or both. The A and B Ports have “undershoot hardened” circuit protection to support an extended range to 2.0V below ground. Fairchild’s integrated Undershoot Hardened Circuit (UHC®) senses undershoot at the I/O’s, and responds by preventing voltage differentials from developing and turning on the switch. ■ 4Ω switch connection between two ports. ■ Minimal propagation delay through the switch. ■ Low lCC. ■ Zero bounce in flow-through mode. ■ Control inputs compatible with TTL level. ■ See Applications Note AN-5008 for details Two select (S1, S2) inputs provide switch enable control. When S1, S2 are HIGH, the device precharges the B Port to a selectable bias voltage (Bias V) to minimize live insertion noise. Ordering Code: Order Number Package Number Package Description FSTU32160MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. UHC® is a registered trademark of Fairchild Semiconductor Corporation. © 2000 Fairchild Semiconductor Corporation DS500244 www.fairchildsemi.com FSTU32160 16-Bit to 32-Bit Multiplexer/Demultiplexer Bus Switch with −2V Undershoot Protection May 1999 Revised October 2006 FSTU32160 Connection Diagram Pin Descriptions Pin Name Description S1 , S2 Select Inputs A Bus A B1 , B2 Bus B Truth Table Inputs S1 S2 2 x A = x B1 L H H L x A = x B2 L L x A = x B1 and x B2 H H x B1, x B2 = BiasV Logic Diagram www.fairchildsemi.com Function Recommended Operating Conditions (Note 4) Supply Voltage (VCC) −0.5V to +7.0V DC Switch Voltage (VS) (Note 2) −2.0V to +7.0V Power Supply Operating (VCC) BiasV Voltage Range −0.5V to +7.0V Precharge Supply (BiasV) 1.5 to VCC Input Voltage (VIN) 0V to 5.5V Output Voltage (VOUT) 0V to 5.5V DC Input Control Pin Voltage −0.5V to +7.0V (VIN) (Note 3) DC Input Diode Current (lIK) VIN < 0V −50 mA DC Output Current (IOUT) Storage Temperature Range (TSTG) Input Rise and Fall Time (tr, tf) 128 mA Switch Control Input +/− 100 mA DC VCC/GND Current (ICC/IGND) 4.0V to 5.5V 0 ns/V to 5 ns/V Switch I/O −65°C to +150 °C 0 ns/V to DC −40 °C to +85 °C Free Air Operating Temperature (TA) Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 2: VS is the voltage observed/applied at either the A or B Ports across the switch. Note 3: The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. Note 4: Unused control inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics TA = −40 °C to +85 °C Symbol Parameter VCC Min Typ (V) Max Units Conditions (Note 5) −1.2 4.5 Clamp Diode Voltage VIH HIGH Level Input Voltage 4.0–5.5 VIL LOW Level Input Voltage 4.0–5.5 0.8 V II Input Leakage Current 5.5 ±1.0 µA 0 10 µA VIN = 5.5V mA BiasV = 2.4V, SX = 2.0V 2.0 V IIN = −18mA VIK V 0.25 0 ≤ VIN ≤ 5.5V IO Output Current 4.5 IOZH, IOZL OFF-STATE Leakage Current 5.5 ±1.0 µA 0 ≤ A, ≤ VCC, V IOZH, IOZL OFF-STATE Leakage Current 5.5 ±1.0 µA 0 ≤ B, ≤ VCC, V RON Switch On Resistance 4.5 4 7 Ω (Note 6) 4.5 4 7 Ω VIN = 0V, IIN = 30 mA 4.5 8 14 Ω VIN = 2.4V, IIN = 15 mA 4.0 11 VIN = 2.4V, IIN = 15 mA BX = 0 BiasV1 = BiasV2 = 5.5V BiasV1 = BiasV2 = FLOATING VIN = 0V, IIN = 64 mA 20 Ω ICC Quiescent Supply Current 5.5 3 µA VIN = VCC or GND, IOUT = 0 ∆ ICC Increase in ICC per Input 5.5 2.5 mA One input at 3.4V IBIAS Bias Pin Leakage Current 5.5 ±1.0 µA S1, S2 = 0V VIKU Voltage Undershoot 5.5 −2.0 V Other inputs at VCC or GND BX = 0V, BiasVX = 5.5V 0.0 mA ≥ IIN ≥ −50 mA S1, S2 = 5.5V Note 5: Typical values are at VCC = 5.0V and TA = +25°C Note 6: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the voltages on the two (A or B) pins. 3 www.fairchildsemi.com FSTU32160 Absolute Maximum Ratings(Note 1) FSTU32160 AC Electrical Characteristics TA = −40 °C to +85 °C, Symbol Parameter CL = 50 pF, RU= RD = 500Ω VCC = 4.5 − 5.5V Min tPHL, tPLH Max A or B, to B or A (Note 7) tPZH Output Enable Time, S to A, B tPZL Output Enable Time, S to A, B Output Disable Time, tPHZ S to A, B tPLZ Output Disable Time, S to A, B VCC = 4.0V Min Units Conditions Figure No. Max 0.25 0.25 ns 7.0 30.0 35.0 ns 7.0 30.0 35.0 ns 1.0 6.9 7.3 ns 1.0 7.7 7.7 ns VI = OPEN Figures 2, 3 VI = OPEN for tPZH Figures 2, 3 BiasV = GND VI = 7V for tPZL Figures 2, 3 BiasV = 3V VI = OPEN for tPHZ BiasV = GND VI = 7V for tPLZ, Figures 2, 3 Figures 2, 3 BiasV = 3V Note 7: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance). Capacitance Symbol (Note 8) Parameter Typ Max Units Conditions CIN Control pin Input Capacitance 4 pF VCC = 5.0V CI/O OFF Input/Output Capacitance “OFF State” 8 pF VCC = 5.0V, Switch OFF Note 8: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested. Undershoot Characteristic (Note 9) Symbol VOUTU Parameter Output Voltage During Undershoot Min Typ 2.5 VOH − 0.3 Max Units Conditions V Figure 1 Note 9: This test is intended to characterize the device’s protective capabilities by maintaining output signal integrity during an input transient voltage undershoot event. FIGURE 1. Device Test Conditions Parameter Value VIN see Waveform V R1 = R2 100K Ω VTRI 11.0 V VCC 5.5 V www.fairchildsemi.com Transient Input Voltage (VIN) Waveform Units 4 FSTU32160 AC Loading and Waveforms Note: Input driven by 50Ω source terminated in 50Ω Note: C L includes load and stray capacitance, CL = 50 pF Note: Input PRR = 1.0 MHz, tW = 500 ns FIGURE 2. AC Test Circuit FIGURE 3. AC Waveforms 5 www.fairchildsemi.com FSTU32160 16-Bit to 32-Bit Multiplexer/Demultiplexer Bus Switch with −2V Undershoot Protection Physical Dimensions inches (millimeters) unless otherwise noted 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Package Number MTD56 Technology Description The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its 74LVX3L384 (FST3384) bus switch product. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 6