TI1 LMT01ELPGQ1 Accurate 2-pin digital output temperature sensor with pulse count interface Datasheet

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LMT01-Q1
SNIS192 – NOVEMBER 2016
LMT01-Q1 0.5°C Accurate 2-Pin Digital Output Temperature Sensor with Pulse Count
Interface
1 Features
3 Description
•
The LMT01-Q1 is a high-accuracy, 2-pin temperature
sensor with an easy-to-use pulse count interface
which makes it an ideal digital replacement for PTC
or NTC thermistors both on and off board in
automotive, industrial, and consumer markets. The
LMT01-Q1 digital pulse count output and high
accuracy over a wide temperature range allow pairing
with any MCU without concern for integrated ADC
quality or availability, while minimizing software
overhead. TI’s LMT01-Q1 achieves flat ±0.5°C
accuracy with very fine resolution (0.0625°C) over a
wide temperature range of -20°C to 90°C without
system
calibration
or
hardware/software
compensation.
1
•
•
•
•
•
•
•
•
•
AEC-Q100 Qualified with the Following Results:
– Temperature Grade 0: –40°C to +150°C
– Temperature Grade 1: –40°C to +125°C
– HMB ESD Component Classification Level 2
– CDM ESD Component Classification Level C5
High Accuracy Over –40°C to 150°C Wide
Temperature Range (–20°C to 90°C: ±0.5°C
(max), 90°C to 150°C: ±0.62°C (max), –40°C to
–20°C: ±0.7°C (max))
Precision Digital Temperature Measurement
Simplified in a 2-Pin Package
Single-wire Pulse Count Digital Output Easily
Read by Processor
Pulse Count Proportional to Temperature with
0.0625°C Resolution
Communication Frequency: 88 kHz
Continuous Temperature Update Every 100 ms
Conversion Current: 34 µA
Floating 2 V to 5.5 V (VP–VN) Supply Operation
with Integrated EMI Immunity
2-Pin Package Offering: TO-92/LPG (3.1 mm × 4
mm × 1.5 mm) – ½ the Size of Traditional TO-92
Device Information
PART NUMBER
2 Applications
•
•
•
•
•
Unlike other digital IC temperature sensors, LMT01Q1’s single wire interface is designed to directly
interface with a GPIO or comparator input, thereby
simplifying hardware implementation. Similarly, the
LMT01's integrated EMI suppression and simple 2-pin
architecture makes it ideal for on-board and off-board
temperature sensing. The LMT01-Q1 offers all the
simplicity of analog NTC or PTC thermistors with the
added benefits of a digital interface, wide specified
performance, EMI immunity, and minimum processor
resources.
LMT01LPG
Automotive
Digital Output Wired Probes
HVAC
Power Supplies
Battery Management
1.
LMT01-Q1 Accuracy
1.0
VDD: 3.0V to 5.5V
0.8
Up to 2m
LMT01
MCU/
FPGA/
ASIC
VN
GPIO/
COMP
LMT01 Pulse Count Interface
Conversion Time
Temperature Accuracy (ƒC)
GPIO
Min 2.0V
BODY SIZE (NOM)
4.00 mm × 3.15 mm
For all available packages, see the orderable addendum at
the end of the data sheet.
2-Pin IC Temperature Sensor
VP
PACKAGE
TO-92 / LPG (2)
Max Limit
0.6
0.4
0.2
0.0
-0.2
-0.4
-0.6
Min Limit
-0.8
ADC Conversion Result
-1.0
Power Off
±50
Power On
±25
0
25
50
75
100
LMT01 Junction Temperaure (ƒC)
125
150
C014
Typical units plotted in center of curve.
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LMT01-Q1
SNIS192 – NOVEMBER 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
4
4
4
4
5
Absolute Maximum Ratings .....................................
ESD Ratings ............................................................
Recommended Operating Conditions ......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Electrical Characteristics - Pulse Count to
Temperature LUT.......................................................
6.7 Switching Characteristics ..........................................
6.8 Timing Specification Waveform ................................
6.9 Typical Characteristics ..............................................
7
7.3 Feature Description................................................. 11
7.4 Device Functional Modes........................................ 14
8
Application and Implementation ........................ 15
8.1 Application Information............................................ 15
8.2 Typical Applications ................................................ 16
8.3 System Examples .................................................. 19
9 Power Supply Recommendations...................... 20
10 Layout................................................................... 21
10.1 Layout Guidelines ................................................. 21
10.2 Layout Example .................................................... 21
11 Device and Documentation Support ................. 22
11.1
11.2
11.3
11.4
11.5
6
6
7
7
Detailed Description ............................................ 10
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
22
22
22
22
22
12 Mechanical, Packaging, and Orderable
Information ........................................................... 23
7.1 Overview ................................................................. 10
7.2 Functional Block Diagram ....................................... 10
4 Revision History
2
DATE
REVISION
NOTES
November 2016
*
Initial release.
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5 Pin Configuration and Functions
TO-92/LPG
2-Pin
VN
VP
Pin Functions
PIN NAME
I/O
VP
Input
VN
Output
DESCRIPTION
Positive voltage pin - may be connected to system power supply or bias resistor
Negative voltage pin - may be connected to system ground or a bias resistor
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6 Specifications
6.1 Absolute Maximum Ratings
(1) (2)
Voltage drop (VP-VN)
Storage temperature range, Tstg
(1)
(2)
MIN
MAX
−0.3V
6V
UNIT
V
−65
175°C
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Soldering process must comply with Reflow Temperature Profile specifications. Refer to www.ti.com/packaging.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per JESD22-A114, all
pins. (1)
±2000
Charged-device model (CDM), per JEDEC
specification JESD22-C101, all pins. (2)
±750
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
MAX
UNIT
Free-air temperature range
MIN
-40
150
°C
Voltage drop range (VP-VN)
2.0 (1)
5.5
V
(1)
NOM
During transmission of pulses at a high level.
6.4 Thermal Information
LMT01-Q1
THERMAL METRIC
(1)
TO-92/LPG
UNIT
2 PINS
RθJA
Junction-to-ambient thermal resistance
RθJC(top)
Junction-to-case (top) thermal resistance
94
RθJB
Junction-to-board thermal resistance
152
ψJT
Junction-to-top characterization parameter
33
ψJB
Junction-to-board characterization parameter
152
Stirred Oil thermal response time to 63% of final value
0.8
sec
Still air thermal response time to 63% of final value
28
sec
(1)
4
177
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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6.5 Electrical Characteristics
Over operating free-air temperature range and operating VP-VN range (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ACCURACY
Temperature accuracy
(1) (2)
150°C
-0.75
0.75
°C
120°C
-0.625
0.625
°C
110°C
-0.5625
0.5625
°C
100°C
-0.5625
0.5625
°C
-0.5
0.5
°C
0.5
°C
VP-VN of 2.15 V 90°C
to 5.5 V 25°C
-0.5
±0.125
-20°C
-0.5
0.5
°C
-30°C
-0.5625
0.5625
°C
-40°C
-0.625
0.625
°C
-50°C
±0.4
°C
PULSE COUNT TRANSFER FUNCTION
Number of pulses at 0°C
Output pulse range
800
Theoretical max (exceeds device
rating)
808
816
15
3228
1
4095
Resolution of one pulse
0.0625
°C
OUTPUT CURRENT
IOL
Output current variation
IOH
Low level
28
34
39
µA
High level
112.5
125
143
µA
3.1
3.7
4.5
40
133
m°C/V
0.002
1.3
µA
High to Low level output current
ratio
POWER SUPPLY
(1)
(2)
(3)
Accuracy sensitivity to change in
VP-VN
2.15 V ≤ VP-VN ≤ 5. 0 V (3)
Leakage Current VP-VN
VDD ≤ 0.4 V
Calculated using Pulse Count to Temperature LUT and 0.0625°C resolution per pulse, see section .
Error can be linearly interpolated between temperatures given in table as shown in the Accuracy vs Temperature curves in section
Typical Characteristics.
Limit is using end point calculation.
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6.6 Electrical Characteristics - Pulse Count to Temperature LUT
Over operating free-air temperature range and 2.15 V ≤ VP-VN ≤ 5. 0 V power supply operating range (unless otherwise
noted). LUT is short for Look-up Table.
PARAMETER
TEST CONDITIONS
MIN
-50°C
Digital output code
TYP
MAX
UNITS
26
-40°C
172
181
190
-30°C
329
338
347
-20°C
486
494
502
-10°C
643
651
659
0°C
800
808
816
10°C
958
966
974
20°C
1117
1125
1133
30°C
1276
1284
1292
40°C
1435
1443
1451
50°C
1594
1603
1611
60°C
1754
1762
1771
70°C
1915
1923
1931
80°C
2076
2084
2092
90°C
2237
2245
2254
100°C
2398
2407
2416
110°C
2560
2569
2578
120°C
2721
2731
2741
130°C
2883
2894
2905
140°C
3047
3058
3069
150°C
3208
3220
3231
pulses
6.7 Switching Characteristics
Over operating free-air temperature range and operating VP-VN range (unless otherwise noted).
PARAMETER
TEST CONDITIONS
tR, tF
Output current rise and fall
time
fP
Output current pulse
frequency
Output current duty cycle
tCONV
Temperature conversion
time (1)
tDATA
Data transmission time
(1)
6
MIN
CL=10 pF, RL=8 k
2.15 V to 5.5 V
TYP
MAX
UNITS
1.45
µs
82
88
94
kHz
40%
50%
60%
46
50
54
ms
44
47
50
ms
Conversion time includes power up time or device turn on time that is typically 3 ms after POR threshold of 1.2V is exceeded.
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6.8 Timing Specification Waveform
tCONV
tDATA
Power
125µA
34µA
tR
Power Off
Output
Current
tF
1/fP
6.9 Typical Characteristics
1.0
1.0
0.8
Max Limit
Temperature Accuracy (ƒC)
Temperature Accuracy (ƒC)
0.8
0.6
0.4
0.2
0.0
-0.2
-0.4
-0.6
Min Limit
-0.8
0.4
0.2
0.0
-0.2
-0.4
-0.6
Min Limit
-0.8
-1.0
-1.0
±50
±25
0
25
50
75
100
125
LMT01 Junction Temperaure (ƒC)
150
±50
±25
0
25
50
75
100
125
LMT01 Junction Temperaure (ƒC)
C017
Using
VP - VN = 2.15 V
150
C016
Using
VP - VN = 2.4 V
Figure 1. Accuracy vs LMT01-Q1 Junction Temperature
Figure 2. Accuracy vs LMT01-Q1 Junction Temperature
1.0
1.0
0.8
0.8
Max Limit
Temperature Accuracy (ƒC)
Temperature Accuracy (ƒC)
Max Limit
0.6
0.6
0.4
0.2
0.0
-0.2
-0.4
-0.6
Min Limit
-0.8
Max Limit
0.6
0.4
0.2
0.0
-0.2
-0.4
-0.6
Min Limit
-0.8
-1.0
-1.0
±50
±25
0
25
50
75
100
LMT01 Junction Temperaure (ƒC)
125
150
±50
Using
VP - VN = 2.7 V
±25
0
25
50
75
100
125
LMT01 Junction Temperaure (ƒC)
C015
150
C014
Using
VP - VN = 3 V
Figure 3. Accuracy vs LMT01-Q1 Junction Temperature
Figure 4. Accuracy vs LMT01-Q1 Junction Temperature
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Typical Characteristics (continued)
1.0
1.0
0.8
Max Limit
Temperature Accuracy (ƒC)
Temperature Accuracy (ƒC)
0.8
0.6
0.4
0.2
0.0
-0.2
-0.4
-0.6
Min Limit
-0.8
0.4
0.2
0.0
-0.2
-0.4
-0.6
Min Limit
-0.8
-1.0
-1.0
±50
±25
0
25
50
75
100
125
LMT01 Junction Temperaure (ƒC)
150
±50
±25
0
25
50
75
100
125
LMT01 Junction Temperaure (ƒC)
C013
Using
VP - VN = 4 V
150
C012
Using
VP - VN = 5 V
Figure 5. Accuracy vs LMT01-Q1 Junction Temperature
Figure 6. Accuracy vs LMT01-Q1 Junction Temperature
1.00
3.0
0.80
Max Limit
2.5
Temperature Accuracy (ƒC)
Temperature Accuracy (ƒC)
Max Limit
0.6
0.60
0.40
0.20
0.00
-0.20
-0.40
-0.60
Min Limit
-0.80
2.0
1.5
1.0
0.5
0.0
-0.5
-1.0
-1.00
±50
±25
0
25
50
75
100
125
LMT01 Junction Temperature (ƒC)
150
±50
±25
Using
VP - VN = 5.5 V
Figure 7. Accuracy vs LMT01-Q1 Junction Temperature
0
25
50
75
100
125
LMT01 Junction Temperaure (ƒC)
C011
150
C018
Using Temp = (PC/4096 x 256°C ) - 50°C
VP - VN = 2.15 V
Figure 8. Accuracy Using Linear Transfer Function
3.0
150
125
2.0
Output Current (µA)
Temperature Accuracy (ƒC)
2.5
1.5
1.0
0.5
0.0
75
Low Level Current
50
25
-0.5
-1.0
0
±50
±25
0
25
50
75
100
LMT01 Junction Temperaure (ƒC)
125
150
2
3
4
5
VP - VN (V)
C019
Using Temp = (PC/4096 x 256°C ) - 50°C
VP - VN = 5.5V
6
C004
TA = 30°C
Figure 9. Accuracy Using Linear Transfer Function
8
High Level Current
100
Figure 10. Output Current vs VP-VN Voltage
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Typical Characteristics (continued)
150
Percent of (Final - Initial) Value (%)
110
Output Current (µA)
125
High Level Current
100
75
Low Level Current
50
25
0
100
90
80
70
60
50
40
30
20
10
0
±50
0
±25
25
50
75
100
125
LMT01 Juntion Temperature (ƒC)
150
0
120 240 360 480 600 720 840 960 1080 1200
Time (seconds)
C003
VP-VN=3.3 V
TINITIAL=23°C,
VP – VN = 3.3 V
TFINAL=70°C
Figure 12. Thermal Response in Still Air
110
110
100
100
Percent of (Final - Initial) Value (%)
Percent of (Final - Initial) Value (%)
Figure 11. Output Current vs Temperature
C033
90
80
70
60
50
40
30
20
10
0
90
80
70
60
50
40
30
20
10
0
0
20
40
60
80
100 120 140 160 180 200
Time (seconds)
VP-VN=3.3 V
TINITIAL=23°C,
TFINAL=70°C
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0
Time (seconds)
C032
Air Flow=2.34
meters/sec
Figure 13. Thermal Response in Moving Air
VP-VN=3.3 V
TINITIAL=23°C,
C031
TFINAL=70°C
Figure 14. Thermal Response in Stirred Oil
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7 Detailed Description
7.1 Overview
The LMT01-Q1 temperature output is transmitted over a single wire using a train of current pulses that typically
change from 34 µA to 125 µA. A simple resistor can then be used to convert the current pulses to a voltage. With
a 10 kΩ the output voltage levels range from 340 mV to 1.25 V, typically. A simple microcontroller comparator or
external transistor can be used convert this signal to valid logic levels the microcontroller can process properly
through a GPIO pin. The temperature can be determined by gating a simple counter on for a specific time
interval to count the total number of output pulses. After power is first applied to the device the current level will
remain below 34 µA for at most 54ms while the LMT01-Q1 is determining the temperature. Once the temperature
is determined the pulse train will begin. The individual pulse frequency is typically 88 kHz. The LMT01-Q1 will
continuously convert and transmit data when the power is applied approximately every 104 ms (max).
The LMT01-Q1 uses thermal diode analog circuitry to detect the temperature. The temperature signal is then
amplified and applied to the input of a ΣΔ ADC that is driven by an internal reference voltage. The ΣΔ ADC
output is then processed through the interface circuitry into a digital pulse train. The digital pulse train is then
converted to a current pulse train by the output signal conditioning circuitry that includes high and low current
regulators. The voltage applied across the LMT01-Q1's pins is regulated by an internal voltage regulator to
provide a consistent Chip VDD that is used by the ADC and its associated circuitry.
7.2 Functional Block Diagram
VP
Chip VDD
Chip VSS
Thermal Diode
Analog Circuitry
Data
ADC
Interface
Voltage
Regulator
and
Output
Signal
Conditioning
VREF
LMT01
VN
10
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7.3 Feature Description
7.3.1 Output Interface
The LMT01-Q1 provides a digital output in the form of a pulse count that is transmitted by a train of current
pulses. After the LMT01-Q1 is powered up it will transmit a very low current of 34 µA for less than 54 ms while
the part executes a temperature to digital conversion, as shown in Figure 15. Once the temperature to digital
conversion has completed the LMT01-Q1 will start to transmit a pulse train that toggles from the low current of 34
µA to a high current level of 125 µA. The pulse train total time interval is at maximum 50 ms. The LMT01-Q1 will
transmit a series of pulses equivalent to the pulse count at a given temperature as described in . After the pulse
count has been transmitted the LMT01-Q1 current level will remain low for the remainder of the 50 ms. The total
time for the temperature to digital conversion and the pulse train time interval is 104 ms (max). If power is
continuously applied the pulse train output will repeat start every 104 ms (max).
Start of data
transmission
Power
ON
End of data
54ms
max
Start of next
conversion result data
End of data
104ms max
Power
50ms max
50ms max
Power
Off
Pulse
Train
Figure 15. Temperature to Digital Pulse Train Timing Cycle
The LMT01LMT01-Q1 can be powered down at any time thus conserving system power. Care should be taken
though, that a power down wait time of 50ms, minimum, be used before the device is turned on again.
7.3.2 Output Transfer Function
The LMT01-Q1 will output at minimum 1 pulse and a theoretical maximum 4095 pulses. Each pulse has a weight
of 0.0625°C. One pulse corresponds to a temperature less than -50°C while a pulse count of 4096 corresponds
to a temperature greater than 200°C. Note that the LMT01-Q1 is only guaranteed to operate up to 150°C.
Exceeding this temperature by more than 5°C may damage the device. The accuracy of the device degrades as
well when 150°C in exceeded.
Two different methods of converting the pulse count to a temperature value will be discussed in this section. The
first method that will be discussed is the least accurate and uses a first order equation. The second method is
the most accurate and uses linear interpolation of the values found in the look-up table (LUT) as described in .
The output transfer function appears to be linear and can be approximated by the following first order equation:
§ PC
·
Temp ¨
u 256qC ¸ 50qC
© 4096
¹
where
•
•
PC is the Pulse Count
Temp is the temperature reading
(1)
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Feature Description (continued)
Table 1 shows some sample calculations using Equation 1
Table 1. Sample Calculations Using Equation 1
TEMPERATURE (°C)
NUMBER OF PULSES
-49.9375
1
-49.875
2
-20
480
0
800
30
1280
50
1600
100
2400
150
3200
205.9375
4095
The curve shown in Figure 16 shows the output transfer function using equation Equation 1 (blue line) and the
look-up table (LUT) found in (red line). The LMT01-Q1 output transfer function as described by the LUT appears
to be linear, but upon close inspection it can be seen that it truly is not linear. To actually see the difference, the
accuracy obtained by the two methods must be compared.
4096
3584
Pulse Count
3072
2560
2048
1536
1024
512
0
±50 ±25
0
25
50
75
100 125 150 175 200 225
LMT01 Junction Temperature (ƒC)
C002
Figure 16. LMT01-Q1 Output Transfer Function
12
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For more exact temperature readings the output pulse count can be converted to temperature using linear
interpolation of the values found in and repeated here for convenience.
Table 2. Pulse Count to Temperature Look-Up Table
TEMPERATURE (°C)
PULSE COUNT
MINIMUM
TYPICAL
MAXIMUM
-50
15
26
37
-40
172
181
190
-30
329
338
347
-20
486
494
502
-10
643
651
659
0
800
808
816
10
958
966
974
20
1117
1125
1133
30
1276
1284
1292
40
1435
1443
1451
50
1594
1602
1610
60
1754
1762
1770
70
1915
1923
1931
80
2076
2084
2092
90
2237
2245
2253
100
2398
2407
2416
110
2560
2569
2578
120
2721
2731
2741
130
2883
2893
2903
140
3047
3057
3067
150
3208
3218
3228
3.0
1.0
2.5
0.8
Temperature Accuracy (ƒC)
Temperature Accuracy (ƒC)
The curves in Figure 17 and , show the accuracy of typical units when using the Equation 1 and linear
interpolation using , respectively. When compared, the improved performance when using the LUT linear
interpolation method can clearly be seen. For a limited temperature range of 25°C to 80°C the error shown in
Figure 17 is flat and thus the linear equation will provide good results. For a wide temperature range it is
recommended that linear interpolation and the LUT be used.
2.0
1.5
1.0
0.5
0.0
0.4
0.2
0.0
-0.2
-0.4
-0.6
-0.5
-0.8
-1.0
-1.0
±50
±25
0
25
50
75
100
LMT01 Junction Temperaure (ƒC)
125
150
Max Limit
0.6
Min Limit
±50
0
25
50
75
100
125
LMT01 Junction Temperaure (ƒC)
C018
Figure 17. LMT01-Q1 Typical Accuracy When Using First
Order Equation Equation 1 - 92 Typical Units Plotted at
(VP - VN) = 2.15 V
±25
150
C017
Figure 18. LMT01-Q1 Accuracy Using Linear Interpolation
of LUT Found in - 92 Typical Units Plotted at (VP - VN) =
2.15 V
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7.3.3 Current Output Conversion to Voltage
The minimum voltage drop across the LMT01-Q1 must be maintained at 2.15 V during the conversion cycle.
After the conversion cycle the minimum voltage drop can decrease to 2.0 V. Thus the LMT01-Q1 can be used for
low voltage applications See Application Information section on low voltage operation and other information on
picking the actual resistor value for different applications conditions. The resistor value is dependent on the
power supply level and it's variation and the threshold level requirements of the circuitry it's driving (i.e. MCU
GPIO or Comparator).
Stray capacitance can be introduced when connecting the LMT01-Q1 through a long wire. This stray capacitance
will influence the signal rise and fall times. The wire inductance has negligible effect on the AC signal integrity. A
simple RC time constant model as shown in Figure 19 can be used to determine the rise and fall times.
POWER
tHL
LMT01
VF
VHL
OUTPUT
C
100pF
34 and
125 µA
R
10k
VS
Figure 19. Simple RC Model for Rise and Fall Times
VF -VS
tHL = R×C× ln l
p
VF -VHL
where
•
•
•
•
RC as shown in Figure 19
VHL is the target high level
the final voltage VF = 125 µA × R
the start voltage VS = 34 µA × R
(2)
For the 10% to 90% level rise time (tr), Equation 2 simplifies to:
tr = R×C×2.197
(3)
Care should be taken to ensure under reverse bias conditions that the LMT01-Q1 voltage drop does not exceed
300mV, as given in the Absolute Maximum Ratings.
7.4 Device Functional Modes
The only functional mode the LMT01-Q1 has is that it provides a pulse count output that is directly proportional to
temperature.
14
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
8.1.1 Mounting, Temperature Conductivity and Self Heating
The LMT01-Q1 can be applied easily in the same way as other integrated-circuit temperature sensors. It can be
glued or cemented to a surface to ensure good temperature conductivity. The temperatures of the lands and
traces to the leads of the LMT01-Q1 will also affect the temperature reading so they should be a thin as possible.
Alternatively, the LMT01-Q1 can be mounted inside a sealed-end metal tube, and can then be dipped into a bath
or screwed into a threaded hole in a tank. As with any IC, the LMT01-Q1 and accompanying wiring and circuits
must be kept insulated and dry, to avoid excessive leakage and corrosion. Printed-circuit coatings are often used
to ensure that moisture cannot corrode the leads or circuit traces.
The LMT01-Q1's junction temperature is the actual temperature being measured by the device. The thermal
resistance junction-to-ambient (RθJA) is the parameter (from
Thermal Information) used to calculate the rise of a device junction temperature (self heating) due to its average
power dissipation. The average power dissipation of the LMT01-Q1 is dependent on the temperature it is
transmitting as it effects the output pulse count and the voltage across the device. Equation 4 is used to calculate
the self heating in the LMT01-Q1's die temperature (TSH).
:4096-PC;
PC :IOL +IOH ;
tCONV
tDATA
TSH = HlIOL ×
×V
p + FHF
×
G+F
×IOL GI ×
G ×VDATA I ×R JA
:tCONV +tDATA ; CONV
:tCONV +tDATA ;
2
4096
4096
where
•
•
•
•
•
•
•
•
TSH is the ambient temperature,
IOL and IOH are the output low and high current level respectively,
VCONV is the voltage across the LMT01-Q1 during conversion,
VDATA is the voltage across the LMT01-Q1 during data transmission,
tCONV is the conversion time,
tDATA is the data transmission time,
PC is the output pulse count,
RθJA is the junction to ambient package thermal resistance
(4)
Plotted in the curve Figure 20 are the typical average supply current (black line using left y axis) and the resulting
self heating (red and violet lines using right y axis) during continuous conversions. A temperature range of -50°C
to +150°C, a VCONV of 5 V (red line) and 2.15 V (violet line) were used for the self heating calculation. As can be
seen in the curve the average power supply current and thus the average self heating changes linearly over
temperature because the number of pulses increases with temperature. A negligible self heating of about 45m°C
is observed at 150°C with continuous conversions. If temperature readings are not required as frequently as
every 100ms, self heating can be minimized by shutting down power to the part periodically thus lowering the
average power dissipation.
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60
0.06
50
0.05
40
0.04
30
0.03
20
0.02
10
0.01
Average Current
Self Heating at VP-VN=5V
Self Heating at VP-VN=2.15V
0
-100
-50
0
50
100
150
Self Heating (ƒC)
Average Current (µA)
Application Information (continued)
0.00
200
Temperature (ƒC)
C001
Figure 20. Average Current Draw and Self Heating Over Temperature
8.2 Typical Applications
8.2.1 3.3V System VDD MSP430 Interface - Using Comparator Input
VDD 3.3V
MSP430
GPIO
Divider
2.73V
or
2.24V
VP
LMT01
VREF
TIMER2
VN
COMP_B
CLOCK
+
VR
IR = 34
and 125 µA
R
6.81k
1%
Figure 21. MSP430 Comparator Input Implementation
8.2.1.1 Design Requirements
The following design requirements will be used in the detailed design procedure.
VDD
3.3 V
VDD minimum
3.0 V
LMT01-Q1 VP – VN minimum during conversion
2.15 V
LMT01-Q1 VP – VN minimum during data transmission
2.0 V
Noise margin
50 mV min
Comparator input current over temperature range of interest
< 1 uA
Resistor tolerance
1%
16
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8.2.1.2 Detailed Design Procedure
First select the R and determine the maximum logic low voltage and the minimum logic high voltage while
ensuring, that when the LMT01-Q1 is converting, the minimum (VP - VN) requirement of 2.15 V is met.
1. Select R using minimum VP-VN during data transmission (2 V) and maximum output current of the LMT01Q1 (143.75 µA)
– R = (3.0 V – 2 V) / 143.75 µA = 6.993 k the closest 1% resistor is 6.980 k
– 6.993 k is the maximum resistance so if using 1% tolerance resistor the actual resistor value needs to be
1% less than 6.993 k and 6.98 k is 0.2% less than 6.993 k thus 6.81 k should be used.
2. Check to see if the LMT01-Q1's 2.15 V minimum voltage during conversion requirement is met with
maximum IOL of 39 µA and maximum R of 6.81 k + 1%:
– VLMT01 = 3 V - (6.81 k x 1.01) × 39 µA = 2.73 V
3. Find the maximum low level voltage range using maximum R of 6.81k and maximum IOL 39 µA:
– VRLmax = (6.81 k x 1.01) × 39 µA = 268 mV
4. Find the minimum high level voltage using the minimum R of 6.81k and minimum IOH of 112.5 uA:
– VRHmin = (6.81 k x 0.99) × 112.5 µA = 758 mV
Now select the MSP430 comparator threshold voltage that will enable the LMT01-Q1 to communicate to the
MSP430 properly.
1. The MSP430 voltage will be selected by selecting the internal VREF and then choosing the appropriate 1 of
n/32 settings for n of 1 to 31.
– VMID= (VRLmax–VRHmin )/2 + VRHmin = (758 mV - 268 mV)/2 + 268 mV= 513 mV
– n = (VMID / VREF ) × 32 = (0.513/2.5) × 32 = 7
2. In order to prevent oscillation of the comparator output hysteresis needs to implemented. The MSP430
allows this by enabling different n for rising edge and falling edge of the comparator output. Thus for a falling
comparator output transition N should be set to 6.
3. Determine the noise margin caused by variation in comparator threshold level. Even though the comparator
threshold level theoretically is set to VMID, the actual level will vary from device to device due to VREF
tolerance, resistor divider tolerance, and comparator offset. For proper operation the COMP_B worst case
input threshold levels must be within the minimum high and maximum low voltage levels presented across R,
VRHmin and VRLmax respectively
(N+N_TOL)
VCHmax =VREF ×:1+V_REF_TOL;×
+COMP_OFFSET
32
where
•
•
•
•
•
VREF is the MSP430 COMP_B reference voltage for this example 2.5V,
V_REF_TOL is the tolerance of the VREF of 1% or 0.01,
N is the divisor for the MSP430 or 7
N_TOL is the tolerance of the divisor or 0.5
COMP_OFFSET is the comparator offset specification or 10mV
(5)
(N-N_TOL)
VCLmin =VREF×:1-V_REF_TOL;×
-COMP_OFFSET
32
where
•
•
•
•
•
VREF is the MSP430 COMP_B reference voltage for this example 2.5V,
V_REF_TOL is the tolerance of the VREF of 1% or 0.01,
N is the divisor for the MSP430 for the hysteresis setting or 6,
N_TOL is the tolerance of the divisor or 0.5,
COMP_OFFSET is the comparator offset specification or 10mV
(6)
The noise margin is the minimum of the two differences:
(VRHmin–VCHmax) or (VCHmin–VRLmax)
(7)
which works out to be 145 mV.
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Comparator Threshold and VR
VDD
Pulse
Count
Signal
VRHmax
VRHmin
Noise Margin
VCHmax
VMID
VCHmin
Noise Margin
VRLmax
VRLmin
GND
Time (µs)
Figure 22. Pulse Count Signal Amplitude Variation
8.2.1.2.1 Setting the MSP430 Threshold and Hysteresis
The comparator hysteresis will determine the noise level that the signal can support without causing the
comparator to trip falsely thus resulting in an inaccurate pulse count. The comparator hysteresis is set by the
precision of the MSP430 and what thresholds it is capable of. For this case as the input signal transitions high
the comparator threshold is dropped by 77 mV thus if the noise on the signal as it transitions is kept below this
level the comparator will not trip falsely. In addition the MSP430 has a digital filter on the COMP_B output that be
used to further filter output transitions that occur too quickly.
8.2.1.3 Application Curves
Amplitude = 200 mV/div
Time Base = 10 µs/div
Δy at cursors = 500 mV
Δx at cursors = 11.7 µs
Figure 23. MSP430 COMP_B Input Signal No Capacitance
Load
18
Amplitude = 200 mV/div
Time Base = 10 µs/div
Δy at cursors = 484 mV
Δx at cursors = 11.7 µs
Figure 24. MSP430 COMP_B Input Signal 100pF
Capacitance Load
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8.3 System Examples
3.3V
VDD
MCU/
FPGA/
ASIC
VP
LMT01
100k
VN
GPIO
MMBT3904
34 and
125 µA
7.5k
Figure 25. Transistor Level Shifting
3V to 5.5V
3V to 5.5V
ISO734x
VCC1
VCC2
VDD
VP
ISOLATION
LMT01
MCU/FPGA/
ASIC
Min
2.0V
100k
VN
GPIO
MMBT3904
34 and
125 µA
7.5k
GND2
GND1
Figure 26. Isolation
VDD
3V to 5.5V
GPIO1
GPIO2
GPIO n
Up to 2.0m
VP
VP
VP
LMT01
U1
LMT01
U2
LMT01
Un
VN
VN
VN
MCU/FPGA/
ASIC
Min
2.0V
GPIO/
COMP
34 and
125 µA
6.81k
(for 3V)
Note: to turn off an LMT01-Q1 set the GPIO pin connected to VP to high impedance state as setting it low would
cause the off LMT01-Q1 to be reverse biased. Comparator input of MCU should be used.
Figure 27. Connecting Multiple Devices to One MCU Input Pin
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System Examples (continued)
3.3V
VDD
34 and
125 µA
7.5k
MCU/
FPGA/
ASIC
MMBT3906
VP
LMT01
GPIO
VN
100k
Note: the VN of the LMT01-Q1 must be connected to the MCU GND.
Figure 28. Common Ground With High Side Signal
9 Power Supply Recommendations
Since the LMT01-Q1 is only a 2-pin device the power pins are common with the signal pins, thus the LMT01-Q1
has a floating supply that can vary greatly. The LMT01-Q1 has an internal regulator that provides a stable
voltage to internal circuitry.
Care should be taken to prevent reverse biasing of the LMT01-Q1 as exceeding the absolute maximum ratings
may cause damage to the device.
Power supply ramp rate can effect the accuracy of the first result transmitted by the LMT01-Q1. As shown in
Figure 29 with a 1ms rise time the LMT01-Q1 output code is at 1286 which converts to 30.125°C. The scope
photo shown in Figure 30 reflects what happens when the rise time is too slow. As can be seen the power supply
(yellow trace) is still ramping up to final value while the LMT01-Q1 (red trace) has already started a conversion.
This causes the output pulse count to decrease from the 1286, shown previously, to 1282 or 29.875°C. Thus, for
slow ramp rates it is recommended that the first conversion be discarded. For even slower ramp rates more than
one conversion may have to be discarded as it is recommended that either the power supply be within final value
before a conversion is used or that ramp rates be faster than 2.5 ms.
20
Yellow trace = 1 V/div, Red trace = 100 mV/div, Time Base = 20
ms/div
TA= 30°C
LMT01 Pulse Count = 1286
VP-VN = 3.3 V
Rise Time = 1 ms
Yellow trace = 1V/div, Red trace = 100 mV/div, Time base = 20
ms/div
TA=30°C
LMT01 Pulse Count = 1282
VP-VN=3.3 V
Rise Time = 100 ms
Figure 29. Output Pulse Count With Appropriate Power
Supply Rise Time
Figure 30. Output Pulse Count With Slow Power Supply
Rise Time
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10 Layout
10.1 Layout Guidelines
The LMT01-Q1 can be mounted to a PCB as shown in Figure 31. Care should be taken to make the traces
leading to the LMT01-Q1's pads as small as possible in order to minimize their effect on the temperature the
LMT01-Q1 is measuring.
10.2 Layout Example
VP
VN
Figure 31. Layout Example
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11 Device and Documentation Support
11.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
11.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
11.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
22
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12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
29-Nov-2016
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LMT01ELPGMQ1
ACTIVE
TO-92
LPG
2
3000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 125
T01G0
LMT01ELPGQ1
ACTIVE
TO-92
LPG
2
1000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 125
T01G0
LMT01LPG
ACTIVE
TO-92
LPG
2
1000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
-50 to 150
LMT01
LMT01LPGM
ACTIVE
TO-92
LPG
2
3000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
-50 to 150
LMT01
LMT01QLPGMQ1
ACTIVE
TO-92
LPG
2
3000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 125
T01G1
LMT01QLPGQ1
ACTIVE
TO-92
LPG
2
1000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
-40 to 125
T01G1
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
29-Nov-2016
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LMT01, LMT01-Q1 :
• Catalog: LMT01
• Automotive: LMT01-Q1
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 2
PACKAGE OUTLINE
LPG0002A
TO-92 - 5.05 mm max height
SCALE 1.300
TO-92
4.1
3.9
3.25
3.05
3X
2.3
2.0
2
1
0.51
0.40
5.05
MAX
2 MAX
6X 0.076 MAX
2X
15.5
15.1
3X
0.48
0.33
3X
2X 1.27 0.05
0.51
0.33
2.64
2.44
2.68
2.28
1.62
1.42
2X (45° )
(0.55)
1
2
0.86
0.66
4221971/A 03/2015
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
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EXAMPLE BOARD LAYOUT
LPG0002A
TO-92 - 5.05 mm max height
TO-92
0.05 MAX
ALL AROUND
TYP
(1.07)
METAL
TYP
3X ( 0.75) VIA
(1.7)
(R0.05) TYP
SOLDER MASK
OPENING
TYP
(1.7)
2
1
(1.27)
(1.07)
(2.54)
LAND PATTERN EXAMPLE
NON-SOLDER MASK DEFINED
SCALE:20X
4221971/A 03/2015
www.ti.com
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